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2025-12-18 - 22:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack1slot6 (updated Thu Dec 18, 2025 12:46:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
"interval":200,5413
"cycles":100000000,5412
"load":"idle",5411
"condition":{5410
"clock":"2130"5408
"family":"x86",5407
"vendor":"Intel",5406
"processor":{5404
"dataset":"2024-01-08T15:39:30+0100"5402
"origin":"2024-01-08T12:43:23+0100",5401
"timestamps":{5400
"granularity":"microseconds"5398
8822:50:455396
84,22:50:415395
120,22:51:175394
117,22:51:145393
"maxima":[5392
022:49:175389
0,22:49:175388
0,22:49:175387
0,22:49:175386
0,22:49:175385
0,22:49:175384
0,22:49:175383
0,22:49:175382
0,22:49:175381
0,22:49:175380
0,22:49:175379
0,22:49:175378
0,22:49:175377
0,22:49:175376
0,22:49:175375
0,22:49:175374
0,22:49:175373
0,22:49:175372
0,22:49:175371
0,22:49:175370
0,22:49:175369
0,22:49:175368
0,22:49:175367
0,22:49:175366
0,22:49:175365
0,22:49:175364
0,22:49:175363
0,22:49:175362
0,22:49:175361
0,22:49:175360
0,22:49:175359
0,22:49:175358
0,22:49:175357
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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