You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-10-28 - 04:12

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #1, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  Intel
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack1slot6s.osadl.org (updated Tue Oct 28, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7112991064,51cyclictest0-21swapper/019:10:580
7112991064,51cyclictest0-21swapper/017:26:040
7116991044,51cyclictest0-21swapper/119:35:431
7112991023,43cyclictest9414-21latency_hist19:05:300
7116991015,51cyclictest0-21swapper/119:01:001
7116999940,13cyclictest0-21swapper/117:06:011
7116999940,13cyclictest0-21swapper/117:06:011
711299984,53cyclictest0-21swapper/017:20:340
7116999438,8cyclictest8435-21sshd21:15:511
7116999438,8cyclictest8435-21sshd21:15:511
39002940,4sleep3361ktimersoftd/320:00:443
7116999336,9cyclictest17795-21crond18:15:311
7116999138,10cyclictest0-21swapper/122:10:231
711299765,50cyclictest0-21swapper/016:55:340
711699728,46cyclictest0-21swapper/120:55:241
711699703,61cyclictest0-21swapper/117:28:551
711299703,47cyclictest29683-21awk20:55:240
711899685,17cyclictest5888-21iostat_ios18:55:523
711699654,43cyclictest4757-21cat18:55:301
711699652,44cyclictest27505-21cat18:35:321
711299655,51cyclictest0-21swapper/019:15:560
711299654,53cyclictest0-21swapper/019:35:580
7112996538,13cyclictest0-21swapper/019:45:280
711699643,42cyclictest25110-21cat20:45:271
711299643,43cyclictest9490-21latency_hist16:50:350
711699634,51cyclictest0-21swapper/119:25:291
711699634,43cyclictest4679-21cat21:10:251
711699633,43cyclictest23770-21cat21:50:231
711299634,52cyclictest0-21swapper/021:10:250
711299634,52cyclictest0-21swapper/016:55:470
711299633,44cyclictest21474-21cat21:45:240
711699624,41cyclictest892-21cat19:55:281
711699624,41cyclictest892-21cat19:55:281
711699623,53cyclictest0-21swapper/119:55:421
711299624,50cyclictest0-21swapper/017:44:530
711299624,50cyclictest0-21swapper/017:25:340
711299623,42cyclictest2120-21latency_hist21:05:250
223099620,6rtkit-daemon2229-21rtkit-daemon16:55:552
711699614,50cyclictest0-21swapper/118:05:431
711699614,42cyclictest5901-21cat17:50:331
711699614,42cyclictest5901-21cat17:50:331
711699613,50cyclictest0-21swapper/118:50:291
711299615,49cyclictest0-21swapper/017:15:350
711299615,48cyclictest0-21swapper/021:45:480
711299614,50cyclictest0-21swapper/021:22:510
711299614,50cyclictest0-21swapper/018:20:510
711299614,49cyclictest0-21swapper/020:36:020
711299614,49cyclictest0-21swapper/020:36:020
711299613,52cyclictest0-21swapper/018:01:580
711299613,51cyclictest0-21swapper/022:00:540
711299613,51cyclictest0-21swapper/022:00:540
711299613,50cyclictest0-21swapper/019:30:430
711699604,50cyclictest21272-21sed18:20:501
711699603,50cyclictest0-21swapper/122:00:481
711699603,50cyclictest0-21swapper/122:00:481
711699603,48cyclictest0-21swapper/119:10:411
711299605,48cyclictest0-21swapper/021:20:250
711299605,48cyclictest0-21swapper/021:20:250
711299605,48cyclictest0-21swapper/018:30:560
711299604,49cyclictest0-21swapper/019:55:570
711299604,49cyclictest0-21swapper/018:44:520
711299603,50cyclictest0-21swapper/020:15:420
711299603,44cyclictest3322-21latency_hist22:15:230
711299602,45cyclictest0-21swapper/020:43:000
7116995939,8cyclictest12113-21munin-node16:55:471
7116995938,9cyclictest21943-21cat17:15:481
711699593,51cyclictest0-21swapper/119:40:401
711699593,50cyclictest20238-21if_err_eth017:10:561
711699593,50cyclictest0-21swapper/117:21:011
711699593,49cyclictest0-21swapper/122:15:231
711699593,49cyclictest0-21swapper/119:30:471
711299594,48cyclictest0-21swapper/018:15:550
711299593,51cyclictest0-21swapper/020:10:380
711299593,50cyclictest0-21swapper/020:30:380
711299593,50cyclictest0-21swapper/020:30:380
711299592,44cyclictest0-21swapper/018:00:040
301552593,49sleep330233-21wc17:31:043
298492594,47sleep20-21swapper/217:30:582
7116995837,10cyclictest0-21swapper/120:25:551
711699583,50cyclictest0-21swapper/120:50:261
711699583,49cyclictest0-21swapper/120:56:021
711699583,49cyclictest0-21swapper/117:00:561
711699583,48cyclictest0-21swapper/121:25:241
711699583,42cyclictest0-21swapper/118:56:351
711299585,47cyclictest0-21swapper/018:56:010
711299585,46cyclictest0-21swapper/020:45:370
711299584,47cyclictest0-21swapper/018:05:430
7112995838,10cyclictest0-21swapper/020:20:560
7112995838,10cyclictest0-21swapper/019:53:080
7112995838,10cyclictest0-21swapper/019:53:080
711299583,49cyclictest0-21swapper/021:34:570
711299583,49cyclictest0-21swapper/020:55:470
711299583,49cyclictest0-21swapper/017:06:010
711299583,49cyclictest0-21swapper/017:06:010
711299583,48cyclictest0-21swapper/021:25:370
711299583,48cyclictest0-21swapper/019:20:590
711299583,48cyclictest0-21swapper/018:10:520
711799575,29cyclictest0-21swapper/217:06:082
711799575,29cyclictest0-21swapper/217:06:082
711699574,47cyclictest0-21swapper/122:00:231
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional