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2025-11-14 - 01:42

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #1, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot6s.osadl.org (updated Fri Nov 14, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27459999236,13cyclictest0-21swapper/123:01:521
2745999894,25cyclictest0-21swapper/120:07:181
27459998832,12cyclictest0-21swapper/119:32:131
27459998832,12cyclictest0-21swapper/119:32:131
2745999875,34cyclictest0-21swapper/119:57:101
2745999865,36cyclictest0-21swapper/121:47:051
27455998634,46cyclictest30569-21grep20:17:190
27455998634,46cyclictest30569-21grep20:17:190
27459998538,11cyclictest0-21swapper/120:41:451
2745999844,35cyclictest0-21swapper/122:41:571
2745599843,74cyclictest0-21swapper/019:12:220
2745999835,28cyclictest0-21swapper/123:23:491
2745599837,69cyclictest0-21swapper/022:31:530
2745999825,28cyclictest0-21swapper/119:47:011
2745999824,14cyclictest0-21swapper/122:11:401
27459998230,10cyclictest0-21swapper/119:42:491
27459998210,30cyclictest0-21swapper/121:41:541
2745599823,72cyclictest0-21swapper/023:16:190
27455998224,52cyclictest0-21swapper/021:11:430
2745599813,71cyclictest0-21swapper/021:57:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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