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2026-05-09 - 12:24

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #1, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot6s.osadl.org (updated Sat May 09, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1444099963,44cyclictest1099-21systemd-cgroups17:32:050
1444099944,43cyclictest0-21swapper/022:02:190
1444099943,42cyclictest24152-21switchtime21:37:260
1444099924,43cyclictest0-21swapper/019:22:190
1444099914,13cyclictest0-21swapper/019:57:220
1444099914,13cyclictest0-21swapper/019:57:220
1444599903,77cyclictest0-21swapper/218:55:542
1444099904,37cyclictest0-21swapper/020:51:580
1444099904,37cyclictest0-21swapper/020:51:580
14440999032,10cyclictest14895-21wc22:12:160
14440999032,10cyclictest14895-21wc22:12:160
1444599894,62cyclictest0-21swapper/219:09:312
14440998927,13cyclictest0-21swapper/019:12:180
14440998924,12cyclictest0-21swapper/020:39:460
1444599884,74cyclictest0-21swapper/220:37:092
1444099884,29cyclictest0-21swapper/020:52:200
1444599874,76cyclictest0-21swapper/217:27:272
14445998718,51cyclictest29139-21tail17:22:182
1444099874,40cyclictest0-21swapper/021:47:210
14440998719,13cyclictest0-21swapper/018:22:020
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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