You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-08-30 - 00:49

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #1, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  Intel
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack1slot6s.osadl.org (updated Fri Aug 29, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2230991040,6rtkit-daemon0-21swapper/206:02:022
223099870,4rtkit-daemon2229-21rtkit-daemon06:21:542
30482760,4sleep334-21rcuc/307:51:583
205002740,6sleep220499-21sed07:21:502
205002740,6sleep220499-21sed07:21:502
130092730,4sleep013011-21head08:12:020
3940997019,32cyclictest22888-21crond10:51:203
3940996917,45cyclictest196411munin-node07:21:473
3940996917,45cyclictest196411munin-node07:21:473
223099690,9rtkit-daemon0-21swapper/309:09:470
3940996620,37cyclictest4529-21unixbench-2d09:01:573
394099657,50cyclictest0-21swapper/309:21:473
3940996524,34cyclictest7983-21tr09:11:383
3940996514,33cyclictest0-21swapper/308:41:563
223099640,5rtkit-daemon17001-21http_loadtime06:06:543
3940996311,32cyclictest0-21swapper/307:27:003
3940996216,39cyclictest19639-21munin-node10:41:503
3940996212,44cyclictest0-21swapper/309:08:043
3940996211,44cyclictest0-21swapper/309:01:253
3940996115,30cyclictest0-21swapper/308:41:263
3940996111,29cyclictest0-21swapper/308:46:443
3940996111,29cyclictest0-21swapper/308:46:443
3940996018,36cyclictest1265-21runrttasks07:04:023
3940996015,28cyclictest1160-21snmpd09:20:503
3940996014,39cyclictest0-21swapper/307:07:423
3940996014,29cyclictest0-21swapper/310:21:533
3940996012,41cyclictest0-21swapper/306:57:163
3940996011,41cyclictest7435-21hddtemp_smartct05:46:523
313472603,48sleep20-21swapper/207:46:222
223099600,6rtkit-daemon0-21swapper/205:51:403
223099600,6rtkit-daemon0-21swapper/205:42:103
182522603,50sleep00-21swapper/006:11:320
3940995916,36cyclictest0-21swapper/308:11:553
3940995912,40cyclictest19449-21latency_hist09:36:243
3940995912,40cyclictest19449-21latency_hist09:36:243
3940995816,33cyclictest1265-21runrttasks10:29:073
3940995816,31cyclictest26391-21sed10:56:413
3940995815,36cyclictest0-21swapper/308:34:093
3940995815,26cyclictest26813-21munin-node07:36:563
3940995812,39cyclictest0-21swapper/308:16:393
3940995811,24cyclictest0-21swapper/306:21:473
3940995810,41cyclictest0-21swapper/306:02:043
3940995810,31cyclictest0-21swapper/308:06:273
3940995810,31cyclictest0-21swapper/308:06:273
223099580,5rtkit-daemon0-21swapper/206:12:023
394099578,41cyclictest0-21swapper/310:16:223
394099572,37cyclictest0-21swapper/308:01:273
3940995719,22cyclictest0-21swapper/306:41:553
3940995718,32cyclictest5082-21munin-run06:51:303
3940995714,25cyclictest24278-21sed10:51:453
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional