You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-21 - 21:06

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #1, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  Intel
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack1slot6s.osadl.org (updated Tue Jul 21, 2026 12:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7675999715,14cyclictest0-21swapper/111:00:371
7675999622,51cyclictest0-21swapper/108:00:101
7675999622,51cyclictest0-21swapper/108:00:101
767599954,28cyclictest14873-21cpuspeed_turbos09:29:471
767599954,22cyclictest23447-21ls11:19:571
767599934,28cyclictest30541-21aten_r1power_po09:04:501
767599934,28cyclictest0-21swapper/108:47:551
767599934,25cyclictest0-21swapper/108:56:241
767599934,24cyclictest0-21swapper/110:12:151
219499930,7rtkit-daemon0-21swapper/106:51:261
219499930,6rtkit-daemon0-21swapper/108:09:001
219499930,6rtkit-daemon0-21swapper/107:56:531
219499930,6rtkit-daemon0-21swapper/107:56:531
219499930,6rtkit-daemon0-21swapper/107:41:241
219499930,6rtkit-daemon0-21swapper/107:13:171
767599924,26cyclictest0-21swapper/111:24:491
767599924,26cyclictest0-21swapper/111:24:491
767599924,24cyclictest0-21swapper/110:45:451
767599924,24cyclictest0-21swapper/110:45:451
767599924,24cyclictest0-21swapper/107:07:321
7670999218,66cyclictest1228-21latency_hist09:09:370
219499920,7rtkit-daemon0-21swapper/107:17:471
219499920,7rtkit-daemon0-21swapper/107:17:471
219499920,6rtkit-daemon0-21swapper/110:49:461
219499920,6rtkit-daemon0-21swapper/109:56:031
219499920,6rtkit-daemon0-21swapper/109:47:491
219499920,6rtkit-daemon0-21swapper/109:21:421
219499920,6rtkit-daemon0-21swapper/109:21:421
219499920,6rtkit-daemon0-21swapper/108:42:291
219499920,6rtkit-daemon0-21swapper/108:15:301
219499920,6rtkit-daemon0-21swapper/108:11:371
219499920,6rtkit-daemon0-21swapper/107:36:311
219499920,6rtkit-daemon0-21swapper/107:31:161
219499920,6rtkit-daemon0-21swapper/106:49:111
219499920,6rtkit-daemon0-21swapper/106:38:491
219499920,6rtkit-daemon0-21swapper/106:28:491
767599914,26cyclictest0-21swapper/110:24:401
219499910,6rtkit-daemon0-21swapper/110:43:011
219499910,6rtkit-daemon0-21swapper/110:16:251
219499910,6rtkit-daemon0-21swapper/110:05:401
219499910,6rtkit-daemon0-21swapper/109:41:341
219499910,6rtkit-daemon0-21swapper/109:35:491
219499910,6rtkit-daemon0-21swapper/109:28:341
219499910,6rtkit-daemon0-21swapper/109:00:431
219499910,6rtkit-daemon0-21swapper/108:51:361
219499910,6rtkit-daemon0-21swapper/108:36:591
219499910,6rtkit-daemon0-21swapper/108:36:591
219499910,6rtkit-daemon0-21swapper/108:32:371
219499910,6rtkit-daemon0-21swapper/108:27:591
219499910,6rtkit-daemon0-21swapper/108:20:371
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional