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2026-03-31 - 03:39

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #1, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack1slot6s.osadl.org (updated Tue Mar 31, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2485991120,5rtkit-daemon2484-21rtkit-daemon22:38:580
345421030,5sleep13451-21cut20:23:581
433699995,13cyclictest0-21swapper/019:34:030
433699994,14cyclictest0-21swapper/020:19:000
248599980,4rtkit-daemon31968-21ssh21:06:392
4339999745,11cyclictest6524-21grep18:39:012
433699974,27cyclictest0-21swapper/020:13:550
4336999715,14cyclictest0-21swapper/020:00:160
433699964,15cyclictest0-21swapper/020:41:170
433699957,20cyclictest0-21swapper/022:33:570
433699954,81cyclictest0-21swapper/022:29:050
433699954,22cyclictest0-21swapper/021:56:260
4339999414,28cyclictest0-21swapper/220:50:542
433699944,27cyclictest0-21swapper/019:33:400
433699944,26cyclictest0-21swapper/022:43:460
4336999410,69cyclictest0-21swapper/022:49:020
4336999410,69cyclictest0-21swapper/022:49:020
434099934,81cyclictest0-21swapper/322:23:463
433699935,78cyclictest0-21swapper/022:18:550
433699935,24cyclictest0-21swapper/020:49:040
433699934,66cyclictest0-21swapper/017:53:430
433699934,25cyclictest0-21swapper/021:49:590
4336999322,54cyclictest0-21swapper/019:53:590
434099924,80cyclictest0-21swapper/320:02:163
433699925,78cyclictest0-21swapper/020:47:300
433699924,29cyclictest0-21swapper/019:44:030
433699923,72cyclictest0-21swapper/022:13:170
433699923,72cyclictest0-21swapper/022:13:170
434099912,48cyclictest0-21swapper/320:08:523
433699914,62cyclictest0-21swapper/021:43:550
4336999132,51cyclictest0-21swapper/022:07:260
4336999132,51cyclictest0-21swapper/022:07:260
4336999119,13cyclictest0-21swapper/022:23:500
433699905,76cyclictest0-21swapper/019:09:100
433699904,77cyclictest23049-21grep20:53:520
433699904,77cyclictest0-21swapper/021:03:510
433699904,28cyclictest0-21swapper/018:44:010
433699904,28cyclictest0-21swapper/018:44:010
433699904,25cyclictest0-21swapper/019:42:060
433699903,24cyclictest0-21swapper/021:09:510
434099895,76cyclictest0-21swapper/319:51:463
434099894,78cyclictest0-21swapper/322:18:563
433699894,77cyclictest0-21swapper/021:26:150
433699894,77cyclictest0-21swapper/021:26:150
433699894,76cyclictest0-21swapper/020:58:570
433699894,26cyclictest7467-21gltestperf22:53:530
433699893,79cyclictest0-21swapper/020:29:250
433699893,30cyclictest5483-21ssh20:28:040
434099885,61cyclictest0-21swapper/321:56:553
434099884,66cyclictest0-21swapper/322:49:233
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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