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2025-12-06 - 13:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Sat Dec 06, 2025 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
252512887866,13sleep10-21swapper/107:08:131
253202714691,16sleep00-21swapper/007:08:520
25466995094,494cyclictest0-21swapper/007:10:020
2546699492397,88cyclictest0-21swapper/007:25:190
2546799475413,46cyclictest0-21swapper/107:10:021
2546799438373,22cyclictest31626-21memory07:25:191
216899900,5rtkit-daemon2167-21rtkit-daemon11:43:541
25466997339,28cyclictest0-21swapper/009:23:280
25466997221,32cyclictest78950irq/46-eth0-tx-09:55:510
25466997218,48cyclictest78950irq/46-eth0-tx-12:32:400
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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