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2025-12-09 - 17:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue Dec 09, 2025 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2009099841763,70cyclictest0-21swapper/007:47:050
2009199838774,33cyclictest0-21swapper/107:47:051
2009199386308,48cyclictest0-21swapper/107:10:071
2009099376297,51cyclictest0-21swapper/007:10:070
198122299276,16sleep00-21swapper/007:07:370
216899850,5rtkit-daemon2167-21rtkit-daemon10:09:010
216899850,5rtkit-daemon2167-21rtkit-daemon10:09:000
216899840,6rtkit-daemon2167-21rtkit-daemon07:07:171
216899760,4rtkit-daemon2167-21rtkit-daemon09:19:580
216899720,4rtkit-daemon2167-21rtkit-daemon11:22:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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