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2026-05-12 - 09:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue May 12, 2026 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20439917991749,43cyclictest0-21swapper/019:30:200
15532775756,11sleep10-21swapper/119:05:271
18072708684,15sleep00-21swapper/019:07:590
2043995594,527cyclictest0-21swapper/019:10:030
204499479401,45cyclictest0-21swapper/119:10:031
204499292262,15cyclictest10105-21strings19:30:201
221012990,3sleep113-21rcu_preempt23:20:231
2044999415,58cyclictest0-21swapper/121:07:581
2044998716,55cyclictest0-21swapper/123:35:591
228699840,4rtkit-daemon2285-21rtkit-daemon21:08:480
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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