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2026-07-07 - 17:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue Jul 07, 2026 12:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
598199846802,28cyclictest0-21swapper/107:10:191
598099845770,38cyclictest6736-21memory07:10:190
58682677653,16sleep00-21swapper/007:09:130
598099562468,84cyclictest0-21swapper/008:05:010
5981994692,6cyclictest25822-21crond08:05:011
57752329309,14sleep10-21swapper/107:08:161
843221660,15sleep0598099cyclictest10:50:010
5980991254,30cyclictest0-21swapper/011:22:580
5980991185,106cyclictest0-21swapper/008:51:590
228699800,4rtkit-daemon2285-21rtkit-daemon07:45:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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