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2025-09-16 - 22:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue Sep 16, 2025 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
172119919001826,60cyclictest2815-21ps07:58:480
172129912791219,41cyclictest13-21rcu_preempt07:58:491
1553121011991,13sleep10-21swapper/107:05:101
1721199375299,68cyclictest0-21swapper/007:10:080
1721299320267,27cyclictest0-21swapper/107:10:081
216899810,3rtkit-daemon2167-21rtkit-daemon10:59:241
216899780,4rtkit-daemon2167-21rtkit-daemon07:50:201
216899770,4rtkit-daemon2167-21rtkit-daemon12:35:421
216899770,4rtkit-daemon2167-21rtkit-daemon10:20:021
216899760,4rtkit-daemon2167-21rtkit-daemon12:33:511
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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