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2026-08-18 - 21:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue Aug 18, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
249099797734,47cyclictest0-21swapper/107:10:031
248999795735,52cyclictest0-21swapper/007:10:030
6292682661,15sleep00-21swapper/007:05:020
248999420370,38cyclictest13-21rcu_preempt07:20:190
249099398344,14cyclictest6896-21expr07:20:191
21042387365,15sleep10-21swapper/107:06:521
248999797,16cyclictest0-21swapper/007:25:150
248999796,14cyclictest0-21swapper/010:41:300
2489997829,43cyclictest88850irq/46-eth0-tx-10:15:160
2489997828,44cyclictest88850irq/46-eth0-tx-10:05:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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