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2026-06-09 - 13:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue Jun 09, 2026 12:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
123492773753,13sleep10-21swapper/107:05:431
12613275024,32sleep00-21swapper/007:08:210
1281899551435,46cyclictest0-21swapper/107:10:031
1281899508428,49cyclictest0-21swapper/107:28:051
1281799483375,50cyclictest0-21swapper/007:10:030
1281799427349,52cyclictest0-21swapper/007:28:050
128179912566,53cyclictest0-21swapper/012:29:580
2286991040,18rtkit-daemon2285-21rtkit-daemon10:31:061
228699980,4rtkit-daemon2285-21rtkit-daemon07:46:381
228699980,4rtkit-daemon2285-21rtkit-daemon07:46:381
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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