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2026-05-19 - 09:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue May 19, 2026 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2160799883796,79cyclictest0-21swapper/019:10:060
2160899806732,40cyclictest0-21swapper/119:10:051
2160899452403,24cyclictest0-21swapper/119:34:231
213002191172,13sleep10-21swapper/119:07:181
2286991280,27rtkit-daemon12466-21df_inode00:25:120
2286991130,4rtkit-daemon2285-21rtkit-daemon23:07:061
2286991080,4rtkit-daemon2285-21rtkit-daemon21:36:241
2286991080,4rtkit-daemon2285-21rtkit-daemon21:36:231
2286991070,4rtkit-daemon2285-21rtkit-daemon00:01:321
2286991050,4rtkit-daemon2285-21rtkit-daemon21:06:581
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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