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2026-04-29 - 07:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Wed Apr 29, 2026 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
169732716693,16sleep00-21swapper/019:06:460
1733099523408,83cyclictest0-21swapper/119:10:021
1733099461405,40cyclictest21740-21strings19:20:201
1732999330287,33cyclictest0-21swapper/019:20:210
2286991030,11rtkit-daemon0-21swapper/122:48:450
228699960,12rtkit-daemon0-21swapper/022:33:200
228699860,4rtkit-daemon2285-21rtkit-daemon21:26:380
17329998565,15cyclictest0-21swapper/021:47:580
228699790,4rtkit-daemon2285-21rtkit-daemon19:33:170
228699780,12rtkit-daemon0-21swapper/020:05:370
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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