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2026-08-25 - 22:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Tue Aug 25, 2026 12:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
187439918471751,88cyclictest0-21swapper/007:10:140
185532926903,15sleep10-21swapper/107:08:261
186132831808,15sleep00-21swapper/007:09:030
1874699481438,28cyclictest0-21swapper/107:10:151
1874699448381,37cyclictest0-21swapper/109:13:261
1874399370301,40cyclictest0-21swapper/009:13:250
18743991018,73cyclictest2877-21rm12:16:590
228699990,5rtkit-daemon0-21swapper/011:14:360
228699960,4rtkit-daemon2285-21rtkit-daemon09:36:141
1874399875,64cyclictest0-21swapper/009:55:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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