You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-12 - 07:53
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Fri Dec 12, 2025 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
208229919101842,44cyclictest0-21swapper/019:10:060
208229918091732,51cyclictest0-21swapper/020:33:450
2082399463384,47cyclictest0-21swapper/120:33:451
2082399365294,38cyclictest0-21swapper/119:10:061
207652220199,14sleep10-21swapper/119:09:521
20822991079,92cyclictest0-21swapper/023:40:590
208229910214,74cyclictest0-21swapper/022:17:590
208229910213,25cyclictest0-21swapper/021:54:590
20822999662,19cyclictest31832-21diskmemload22:24:580
20822999269,14cyclictest0-21swapper/022:52:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional