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2026-01-12 - 07:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Mon Jan 12, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
188372868825,14sleep10-21swapper/119:07:081
19151995234,12cyclictest0-21swapper/019:29:380
19152994844,463cyclictest0-21swapper/119:10:171
1915199483421,55cyclictest0-21swapper/019:10:170
187782353329,16sleep00-21swapper/019:06:350
1915299348284,57cyclictest0-21swapper/119:29:381
2286991270,3rtkit-daemon2285-21rtkit-daemon22:04:161
19151991205,108cyclictest0-21swapper/019:59:590
228699960,10rtkit-daemon0-21swapper/119:19:451
228699940,10rtkit-daemon0-21swapper/120:07:401
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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