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2026-03-21 - 20:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot8.osadl.org (updated Sat Mar 21, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
212812774752,15sleep00-21swapper/007:06:090
2170099767710,18cyclictest13311-21ssh09:30:540
2170199735688,24cyclictest0-21swapper/109:30:541
2170099375294,69cyclictest0-21swapper/007:12:040
2158528339,33sleep10-21swapper/107:09:131
228699810,4rtkit-daemon2285-21rtkit-daemon11:10:421
21700998035,11cyclictest2528-21memory10:10:180
21700997527,42cyclictest9613-21uname09:25:190
21700997225,16cyclictest23599-21ssh11:45:350
2170199705,49cyclictest0-21swapper/107:43:001
21700996835,24cyclictest0-21swapper/011:20:220
21700996831,9cyclictest23888-21munin-run10:50:010
21700996830,33cyclictest14870-21aten2.4-expect09:35:120
21700996829,34cyclictest27622-21ssh10:55:230
21700996825,15cyclictest3965-21latency_hist07:50:020
21700996745,17cyclictest0-21swapper/009:50:110
21700996739,23cyclictest0-21swapper/011:05:160
21700996738,23cyclictest3847-21latency_hist12:10:010
21700996642,17cyclictest0-21swapper/011:58:440
21700996641,20cyclictest0-21swapper/012:25:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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