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2026-01-08 - 12:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot8.osadl.org (updated Thu Jan 08, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
72912598574,17sleep10-21swapper/119:08:221
748799437384,15cyclictest7865-21df19:10:130
748899426392,18cyclictest7866-21runrttasks19:10:131
72522398375,16sleep00-21swapper/019:08:010
748799915,9cyclictest0-21swapper/019:22:000
7488997811,9cyclictest8250irq/14-pata_sch19:55:011
228699770,4rtkit-daemon2285-21rtkit-daemon21:38:440
748899765,18cyclictest0-21swapper/100:13:571
748899757,19cyclictest0-21swapper/122:54:351
7487997530,31cyclictest8250irq/14-pata_sch20:55:000
7487997530,31cyclictest8250irq/14-pata_sch20:55:000
748899746,17cyclictest0-21swapper/121:42:521
748899738,16cyclictest0-21swapper/123:20:111
748899736,18cyclictest0-21swapper/121:53:371
748899736,18cyclictest0-21swapper/100:35:401
748899735,15cyclictest0-21swapper/100:33:261
748799739,46cyclictest0-21swapper/000:30:050
748799734,64cyclictest0-21swapper/021:45:260
748799734,48cyclictest0-21swapper/022:48:280
7487997317,49cyclictest0-21swapper/023:50:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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