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2026-05-21 - 21:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot8.osadl.org (updated Thu May 21, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
190872843819,16sleep00-21swapper/007:07:590
2286998180,808rtkit-daemon0-21swapper/107:08:251
1932499470414,15cyclictest19538-21sh07:10:110
1932599455379,47cyclictest0-21swapper/109:13:061
1932499421342,38cyclictest1189-21snmpd09:13:050
228699950,10rtkit-daemon0-21swapper/112:12:391
228699940,11rtkit-daemon0-21swapper/111:04:091
228699890,4rtkit-daemon2285-21rtkit-daemon10:49:430
19324998711,70cyclictest0-21swapper/009:40:590
1932499857,26cyclictest0-21swapper/009:15:130
1932499828,26cyclictest0-21swapper/011:32:440
19324998212,54cyclictest0-21swapper/012:04:310
19324998113,54cyclictest0-21swapper/008:13:590
19324998112,62cyclictest0-21swapper/011:53:220
228699800,6rtkit-daemon2285-21rtkit-daemon10:11:330
1932499808,24cyclictest0-21swapper/012:27:280
1932499805,29cyclictest0-21swapper/009:27:060
1932499805,27cyclictest0-21swapper/011:29:440
19324998017,10cyclictest0-21swapper/010:40:250
1932499795,29cyclictest0-21swapper/009:53:030
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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