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2026-06-01 - 14:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot8.osadl.org (updated Mon Jun 01, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
280362528508,13sleep10-21swapper/107:07:581
2827399465408,16cyclictest32022-21munin-node07:20:200
2827499448395,26cyclictest0-21swapper/107:20:211
2827399444362,52cyclictest0-21swapper/007:10:010
279712443419,17sleep00-21swapper/007:07:210
2827499426347,47cyclictest0-21swapper/107:10:021
228699860,5rtkit-daemon2285-21rtkit-daemon11:43:171
28273997712,59cyclictest88850irq/46-eth0-tx-11:24:380
28274997456,13cyclictest0-21swapper/112:12:441
28273997446,22cyclictest0-21swapper/010:20:000
28273997347,20cyclictest0-21swapper/010:51:560
28273997339,28cyclictest0-21swapper/009:39:170
28273997239,28cyclictest0-21swapper/008:32:480
28273997142,24cyclictest0-21swapper/010:35:500
28273997121,44cyclictest88850irq/46-eth0-tx-11:12:080
28273997121,33cyclictest88850irq/46-eth0-tx-12:18:170
2827399706,56cyclictest0-21swapper/010:42:200
28273997040,24cyclictest0-21swapper/010:00:440
2827399704,52cyclictest0-21swapper/011:26:520
28273997021,43cyclictest88850irq/46-eth0-tx-09:14:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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