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2026-05-27 - 09:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot8.osadl.org (updated Wed May 27, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
137832963940,16sleep00-21swapper/019:05:490
1423699366291,45cyclictest0-21swapper/119:13:461
1423499361287,48cyclictest0-21swapper/019:13:460
94142770,4sleep19413-21ssh00:31:591
324632750,3sleep132462-21ntp_states00:15:241
1417727533,30sleep10-21swapper/119:09:451
14234997322,41cyclictest88850irq/46-eth0-tx-22:55:280
14234997313,53cyclictest32258-21idleruntime-cro20:00:000
1423499725,45cyclictest0-21swapper/000:18:520
1423499722,7cyclictest10763-21sh22:39:080
14234997214,51cyclictest0-21swapper/023:13:490
1423499719,52cyclictest88850irq/46-eth0-tx-23:25:140
1423499713,61cyclictest7198-21idleruntime-cro20:20:000
1423499712,64cyclictest29246-21sh00:10:160
1423499705,16cyclictest0-21swapper/020:53:010
1423499705,16cyclictest0-21swapper/020:53:000
1423499694,59cyclictest0-21swapper/023:43:040
1423499694,59cyclictest0-21swapper/023:05:540
1423499694,58cyclictest0-21swapper/000:27:360
1423499692,60cyclictest2740-21timerwakeupswit21:25:270
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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