You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-16 - 22:20
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot8.osadl.org (updated Wed Sep 16, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3130399768731,6cyclictest19266-21ssh09:25:230
3130499715685,15cyclictest271ktimersoftd/109:25:231
311122484462,16sleep10-21swapper/107:08:291
3130399478403,39cyclictest32054-21memory07:10:220
3130499413370,28cyclictest0-21swapper/107:10:221
228699950,10rtkit-daemon0-21swapper/009:36:130
31304998713,58cyclictest0-21swapper/112:38:001
31304998614,52cyclictest0-21swapper/110:09:001
228699860,5rtkit-daemon2285-21rtkit-daemon11:55:211
31303998517,61cyclictest0-21swapper/010:25:200
3130499839,54cyclictest0-21swapper/108:59:001
3130499837,57cyclictest0-21swapper/111:21:001
3130399835,15cyclictest0-21swapper/011:49:570
228699830,8rtkit-daemon2285-21rtkit-daemon07:09:520
3130399826,17cyclictest0-21swapper/008:50:020
3130399825,16cyclictest0-21swapper/008:25:010
3130399825,16cyclictest0-21swapper/008:25:010
3130399815,16cyclictest0-21swapper/008:35:010
31303998119,56cyclictest88850irq/46-eth0-tx-09:12:580
3130399803,59cyclictest17300-21timerwakeupswit10:20:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional