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2026-04-30 - 15:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Thu Apr 30, 2026 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
856921220,1sleep28570-21systemd-cgroups11:30:002
160922990,2sleep12226699cyclictest10:07:321
303422920,1sleep230341-21sshd10:11:342
252032920,0sleep00-21swapper/010:27:500
172012920,0sleep217200-21sshd12:12:132
301972910,2sleep02226099cyclictest09:35:190
4432890,0sleep00-21swapper/010:36:430
40552780,0sleep10-21swapper/110:59:071
288662780,1sleep3649-21polkitd11:09:343
214812770,2sleep12226699cyclictest09:15:351
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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