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2026-04-02 - 02:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Thu Apr 02, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4182950,0sleep0400-21sshd21:42:370
209602730,0sleep20-21swapper/222:20:042
9772590,1sleep0101ktimersoftd/022:10:090
195942580,0sleep10-21swapper/123:39:331
188282560,1sleep3391rcuc/321:44:123
271322550,0sleep10-21swapper/121:55:481
221682550,0sleep0111rcuc/023:45:120
194692540,0sleep3391rcuc/323:34:033
140032540,0sleep30-21swapper/322:19:293
79262530,0sleep20-21swapper/221:56:572
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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