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2026-05-22 - 12:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Fri May 22, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
128692970,0sleep012824-21sshd22:21:030
313662950,0sleep331367-21sshd23:36:493
284822890,0sleep20-21swapper/200:33:422
320322750,0sleep3391rcuc/322:25:303
163652720,0sleep216364-21systemd-cgroups23:04:112
128052610,0sleep00-21swapper/021:58:480
283252600,0sleep00-21swapper/023:05:120
178162590,0sleep11073-21nfsd22:38:311
227012570,1sleep022693-21sshd21:31:160
51642560,0sleep20-21swapper/222:09:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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