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2025-09-14 - 00:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Sat Sep 13, 2025 12:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
65742940,0sleep26579-21grepconf.sh10:10:472
177602850,0sleep017761-21sshd09:14:250
19842760,2sleep32635799cyclictest10:53:443
284112730,2sleep02634799cyclictest12:33:060
140922720,0sleep20-21swapper/211:02:042
309462600,0sleep00-21swapper/009:51:290
291142520,0sleep10-21swapper/110:09:451
83902510,1sleep32635799cyclictest10:21:403
77652510,0sleep20-21swapper/211:22:592
44262510,0sleep20-21swapper/210:39:342
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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