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2026-04-17 - 15:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Fri Apr 17, 2026 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1290121020,0sleep00-21swapper/011:14:250
9342660,1sleep1930-21bash11:56:331
97822590,0sleep20-21swapper/209:49:362
287002590,0sleep00-21swapper/011:18:580
273342570,1sleep30-21swapper/311:55:583
313812550,1sleep20-21swapper/210:24:492
128022540,0sleep20-21swapper/210:06:272
128022540,0sleep20-21swapper/210:06:272
77162530,0sleep30-21swapper/309:28:433
244032530,1sleep324399-21bash11:09:273
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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