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2025-11-13 - 06:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Thu Nov 13, 2025 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3123521050,0sleep13261799cyclictest23:30:441
225672780,1sleep125-21ksoftirqd/123:49:471
181102660,0sleep3391rcuc/300:26:043
67732610,1sleep16765-21lspci23:28:191
256092610,0sleep10-21swapper/121:36:321
20072590,0sleep10-21swapper/100:17:251
325212570,0sleep10-21swapper/100:34:351
270492550,0sleep10-21swapper/123:53:261
252022550,0sleep025198-21bash00:09:400
252022550,0sleep025198-21bash00:09:390
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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