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2025-12-30 - 06:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Tue Dec 30, 2025 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19132790,0sleep10-21swapper/100:31:521
243462770,2sleep32631099cyclictest00:14:153
110272600,7sleep375750irq/24-eno1-rx-23:53:233
48322580,1sleep20-21swapper/222:39:332
321952580,0sleep10-21swapper/123:41:041
289572570,0sleep00-21swapper/021:36:220
209512560,1sleep0111rcuc/000:22:200
123922550,1sleep0710-21NetworkManager22:02:460
81722530,0sleep00-21swapper/023:47:290
29122530,0sleep20-21swapper/200:37:362
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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