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2026-05-03 - 17:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Sun May 03, 2026 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3232321130,0sleep20-21swapper/210:44:052
3232321130,0sleep20-21swapper/210:44:052
276192810,1sleep2674-21dbus-daemon11:51:232
257602740,1sleep125761-21sshd10:14:531
16792660,1sleep2321ktimersoftd/210:04:082
303422610,0sleep00-21swapper/010:21:000
97382550,0sleep10-21swapper/111:27:231
136192550,0sleep113624-21bash09:38:121
44932530,0sleep20-21swapper/209:37:162
312182520,1sleep031214-21sshd10:44:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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