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2026-05-14 - 15:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Thu May 14, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
96452970,1sleep1241ktimersoftd/111:39:401
311122580,2sleep2344899cyclictest09:30:402
164632560,0sleep0111rcuc/012:19:010
244072540,1sleep224408-21bash10:12:222
168482530,0sleep20-21swapper/211:34:452
144892530,0sleep20-21swapper/212:18:512
114242530,0sleep10-21swapper/109:20:221
218522520,0sleep321851-21bash12:05:343
177302510,0sleep20-21swapper/211:15:192
277972500,0sleep10-21swapper/111:41:091
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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