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2025-12-10 - 15:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Wed Dec 10, 2025 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
436621100,1sleep04350-21sshd11:22:340
508021080,2sleep22587199cyclictest10:17:022
3266021080,2sleep02585699cyclictest11:58:130
73121030,2sleep12586399cyclictest12:05:391
2660621000,1sleep226609-21bash10:46:022
223292940,0sleep2311rcuc/211:13:372
157682940,0sleep20-21swapper/212:25:322
30762930,0sleep12586399cyclictest11:47:331
183942930,0sleep20-21swapper/211:49:182
20632920,0sleep20-21swapper/212:05:482
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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