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2026-04-12 - 11:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Sun Apr 12, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
198992610,0sleep319881-21bash00:19:203
249582580,1sleep3674-21dbus-daemon00:03:063
40352570,0sleep00-21swapper/023:27:580
40352570,0sleep00-21swapper/023:27:580
73292560,1sleep07321-21sshd00:04:230
71952530,0sleep07180-21bash22:49:290
28202530,0sleep0111rcuc/021:11:310
153862520,0sleep00-21swapper/022:39:070
89722510,0sleep38974-21bash00:37:463
50092510,2sleep1415599cyclictest23:22:301
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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