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2026-04-20 - 06:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Mon Apr 20, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24062790,1sleep22395-21sshd22:00:552
115122730,0sleep20-21swapper/222:12:492
59382720,0sleep10-21swapper/122:59:221
59382720,0sleep10-21swapper/122:59:221
160882620,0sleep30-21swapper/321:48:213
213302600,1sleep321320-21bash21:12:183
321982550,0sleep20-21swapper/222:31:072
150372550,0sleep30-21swapper/323:13:583
94202540,0sleep20-21swapper/222:56:502
94202540,0sleep20-21swapper/222:56:502
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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