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2025-12-07 - 22:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Sun Dec 07, 2025 12:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
219292990,1sleep22053099cyclictest12:30:552
157962980,2sleep32053799cyclictest10:44:103
74862830,0sleep07485-21grepconf.sh10:02:110
14142740,0sleep30-21swapper/311:57:123
226272700,0sleep10-21swapper/112:12:231
310842630,0sleep20-21swapper/211:23:462
239132620,0sleep20-21swapper/211:53:022
60722610,0sleep10-21swapper/111:31:271
118482610,0sleep211847-21sshd12:08:042
309602570,0sleep20-21swapper/212:00:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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