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2026-01-11 - 22:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Sun Jan 11, 2026 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
317321010,1sleep341-21ksoftirqd/309:55:203
229452930,0sleep20-21swapper/209:47:072
156602920,0sleep00-21swapper/011:43:360
86042810,0sleep20-21swapper/210:02:572
32712790,0sleep03228-21sshd10:58:230
232732650,1sleep323260-21sshd11:16:363
271082530,0sleep30-21swapper/312:12:123
203712530,0sleep10-21swapper/111:32:561
218392520,0sleep10-21swapper/111:49:431
112972520,0sleep00-21swapper/009:22:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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