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2026-03-27 - 16:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Fri Mar 27, 2026 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
76592960,2sleep11170899cyclictest09:26:421
313262800,0sleep0111rcuc/010:30:100
123172770,1sleep112319-21bash10:52:541
40172620,0sleep20-21swapper/209:33:442
204342620,1sleep10-21swapper/109:43:141
27082590,1sleep3674-21dbus-daemon09:14:353
207802580,1sleep120778-21lspci11:39:481
145352570,1sleep3649-21polkitd11:09:233
15362560,0sleep20-21swapper/212:13:252
270022540,0sleep30-21swapper/310:18:563
257482530,0sleep125718-21sshd11:56:271
166122530,0sleep30-21swapper/311:31:133
163412530,2sleep01170399cyclictest12:11:560
157232520,1sleep00-21swapper/012:20:040
120482520,0sleep10-21swapper/111:06:231
1125425241,7sleep10-21swapper/107:05:461
270852510,0sleep30-21swapper/309:25:133
263982510,1sleep3391rcuc/312:10:063
262942510,0sleep30-21swapper/312:26:203
215612510,0sleep20-21swapper/210:37:252
66062500,0sleep20-21swapper/212:00:152
53602500,0sleep10-21swapper/110:09:011
314912490,0sleep10-21swapper/110:03:031
265092490,1sleep3391rcuc/310:05:183
217592490,1sleep021762-21bash10:18:280
163392490,0sleep30-21swapper/312:03:493
4012480,0sleep20-21swapper/211:46:102
284112480,0sleep20-21swapper/210:29:562
215982480,0sleep00-21swapper/011:12:400
215982480,0sleep00-21swapper/011:12:390
213272480,0sleep10-21swapper/112:36:481
192612480,0sleep30-21swapper/311:55:533
18522480,0sleep1231rcuc/112:10:411
304632470,0sleep30-21swapper/310:59:543
30212470,0sleep10-21swapper/109:22:181
253102470,0sleep20-21swapper/212:23:362
198762470,0sleep20-21swapper/211:26:032
4012460,0sleep20-21swapper/211:02:442
45502380,0sleep00-21swapper/010:06:110
152332350,2sleep21171599cyclictest11:55:322
107212350,0sleep10-21swapper/112:16:531
1152823110,7sleep20-21swapper/207:09:112
115392298,7sleep30-21swapper/307:09:203
112782299,7sleep00-21swapper/007:06:040
11708992120,0cyclictest241ktimersoftd/111:17:531
39412180,0sleep30-21swapper/311:13:543
39412180,0sleep30-21swapper/311:13:543
291262180,0sleep2311rcuc/210:43:292
53082170,1sleep05301-21bash12:08:190
41532170,2sleep21171599cyclictest09:14:462
322492170,0sleep20-21swapper/210:49:102
21632170,0sleep00-21swapper/009:36:150
298892160,2sleep11170899cyclictest11:48:421
240362160,0sleep00-21swapper/011:23:460
164142160,0sleep30-21swapper/310:26:083
11708991615,0cyclictest3033-21kworker/1:311:33:401
11708991615,0cyclictest241ktimersoftd/110:23:101
11708991614,1cyclictest9072-21kworker/1:210:31:261
52302150,1sleep25224-21lspci11:05:482
286482150,0sleep30-21swapper/310:13:383
175802150,0sleep3391rcuc/311:53:043
175102150,0sleep20-21swapper/210:10:012
1172099150,12cyclictest5986-21bash12:30:083
11708991514,0cyclictest9679-21lspci10:14:471
11708991514,0cyclictest9072-21kworker/1:210:41:291
11708991514,0cyclictest22855-21kworker/1:411:40:351
11708991513,1cyclictest9072-21kworker/1:210:39:351
4752140,0sleep00-21swapper/011:38:030
303862140,0sleep30-21swapper/310:02:573
290772140,1sleep1231rcuc/112:34:471
139912140,0sleep10-21swapper/109:58:561
11708991413,1cyclictest11701-21kworker/1:410:17:231
11708991413,0cyclictest2996-21kworker/1:410:57:161
11708991413,0cyclictest17434-21kworker/1:309:53:231
11708991412,1cyclictest2118-21kworker/1:111:24:591
325892130,0sleep2311rcuc/212:07:522
285762130,1sleep028573-21lspci09:54:450
169102130,0sleep0111rcuc/010:04:340
11715991312,0cyclictest22265-21lspci10:59:112
11715991312,0cyclictest16465-21lspci09:37:282
1171599130,12cyclictest1-21systemd11:31:532
11708991313,0cyclictest2118-21kworker/1:111:12:521
11708991313,0cyclictest2118-21kworker/1:111:12:511
11708991312,0cyclictest437-21kworker/1:412:28:571
11708991312,0cyclictest30827-21kworker/1:110:46:421
11708991312,0cyclictest28872-21lspci11:54:021
11708991312,0cyclictest11921-21kworker/1:310:27:271
1170399130,12cyclictest0-21swapper/012:17:570
1170399130,0cyclictest0-21swapper/011:46:180
109832130,0sleep2311rcuc/210:09:302
133452120,0sleep00-21swapper/012:33:260
1172099120,1cyclictest2627-21lspci12:37:573
1172099120,11cyclictest0-21swapper/312:16:173
11715991210,1cyclictest29434-21sshd11:43:132
11715991210,1cyclictest1026-21sshd10:01:222
11715991210,1cyclictest0-21swapper/211:53:222
1170899124,1cyclictest25-21ksoftirqd/111:00:101
11708991212,0cyclictest3033-21kworker/1:311:29:511
11708991212,0cyclictest241ktimersoftd/108:10:401
11708991211,0cyclictest3972-21lspci09:33:451
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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