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2026-02-18 - 04:23
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Wed Feb 18, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
17722880,0sleep11764-21sshd22:42:001
49232590,0sleep20-21swapper/221:55:592
159562590,0sleep30-21swapper/321:30:013
159562590,0sleep30-21swapper/321:30:013
30152560,0sleep30-21swapper/300:27:313
20752550,0sleep1241ktimersoftd/122:26:261
313982530,2sleep31238599cyclictest23:55:443
177252530,1sleep0111rcuc/023:22:560
151832530,0sleep30-21swapper/322:24:123
135192530,0sleep00-21swapper/023:53:390
317182520,0sleep30-21swapper/322:06:163
296332520,1sleep029558-21sshd00:38:380
278042510,0sleep00-21swapper/021:37:350
1216925140,7sleep20-21swapper/219:08:462
180642500,1sleep218061-21lspci21:13:342
30402490,0sleep20-21swapper/200:35:202
174812490,0sleep00-21swapper/022:24:290
313842480,0sleep20-21swapper/223:28:312
93002470,0sleep20-21swapper/223:41:252
1191122210,7sleep30-21swapper/319:05:313
115392219,7sleep00-21swapper/019:05:190
104722219,7sleep10-21swapper/119:05:041
305502170,0sleep30-21swapper/323:47:543
263362170,0sleep1231rcuc/121:42:561
97532160,0sleep00-21swapper/022:42:590
48222150,0sleep10-21swapper/122:34:391
12384991514,0cyclictest8579-21lspci00:16:252
12384991514,0cyclictest29283-21lspci21:54:472
12384991514,0cyclictest27451-21lspci22:21:412
12380991514,0cyclictest25211-21kworker/0:223:09:120
12380991513,1cyclictest6200-21kworker/0:022:55:100
167552140,0sleep0111rcuc/021:30:100
167552140,0sleep0111rcuc/021:30:100
12384991413,0cyclictest321ktimersoftd/222:39:052
12384991413,0cyclictest28443-21lspci22:45:132
12384991413,0cyclictest19719-21lspci00:10:022
12384991413,0cyclictest16170-21lspci23:38:242
12384991412,1cyclictest25085-21lspci00:34:122
12380991413,0cyclictest25294-21kworker/0:000:05:550
12380991413,0cyclictest12364-21lspci22:31:340
12380991412,1cyclictest27355-21kworker/0:423:40:140
104202140,0sleep10-21swapper/123:25:541
38992130,0sleep10-21swapper/123:17:211
322462130,0sleep30-21swapper/322:12:023
259402130,0sleep30-21swapper/322:52:433
12385991311,1cyclictest622-13audispd22:44:573
12384991312,0cyclictest18530-21lspci23:58:092
12384991311,1cyclictest29224-21lspci22:33:402
12383991311,1cyclictest0-21swapper/123:51:551
12380991312,0cyclictest27497-21kworker/0:322:39:150
12380991312,0cyclictest24421-21kworker/0:122:06:190
1238599120,1cyclictest25517-21lspci23:27:473
12384991210,1cyclictest27381-21lspci21:20:352
1238499120,1cyclictest24761-21sshd23:31:342
1238499120,11cyclictest0-21swapper/222:55:452
12383991210,1cyclictest28946-21sshd23:32:051
1238399120,11cyclictest0-21swapper/123:41:151
12380991212,0cyclictest24715-21kworker/0:400:15:030
12380991211,0cyclictest25591-21lspci22:52:410
12380991211,0cyclictest22964-21kworker/0:022:15:180
12380991210,1cyclictest27497-21kworker/0:322:47:550
1238099120,11cyclictest0-21swapper/021:53:440
12385991110,0cyclictest0-21swapper/322:32:263
12385991110,0cyclictest0-21swapper/321:40:063
12385991110,0cyclictest0-21swapper/300:12:473
1238599110,10cyclictest0-21swapper/322:57:163
1238599110,10cyclictest0-21swapper/321:19:573
1238599110,10cyclictest0-21swapper/321:13:473
1238499119,1cyclictest699-21gdbus00:09:052
12384991110,0cyclictest0-21swapper/220:10:152
1238499110,1cyclictest22120-21sshd21:19:552
1238499110,10cyclictest0-21swapper/223:47:152
1238499110,10cyclictest0-21swapper/222:06:252
1238499110,10cyclictest0-21swapper/221:26:252
1238399119,1cyclictest28475-21sshd00:03:151
1238399119,1cyclictest0-21swapper/121:12:241
1238399110,10cyclictest0-21swapper/123:49:151
1238399110,10cyclictest0-21swapper/123:03:251
1238399110,10cyclictest0-21swapper/121:31:551
1238399110,10cyclictest0-21swapper/121:31:541
12380991110,0cyclictest8452-21lspci21:17:260
12380991110,0cyclictest32550irq/27-ahci[00000:12:350
12380991110,0cyclictest22629-21lspci23:15:380
12380991110,0cyclictest20785-21lspci23:58:260
12380991110,0cyclictest0-21swapper/021:55:130
1238599109,0cyclictest0-21swapper/322:46:473
1238599109,0cyclictest0-21swapper/322:01:573
1238599109,0cyclictest0-21swapper/321:52:573
1238599109,0cyclictest0-21swapper/321:38:173
1238599109,0cyclictest0-21swapper/319:35:173
1238599108,1cyclictest6296-21grepconf.sh00:16:073
1238599108,1cyclictest0-21swapper/323:51:273
1238599100,0cyclictest0-21swapper/323:40:473
1238599100,0cyclictest0-21swapper/323:01:273
1238599100,0cyclictest0-21swapper/322:16:073
1238599100,0cyclictest0-21swapper/319:45:173
1238599100,0cyclictest0-21swapper/300:39:373
1238499109,0cyclictest321ktimersoftd/223:09:422
1238499109,0cyclictest10794-21lspci00:01:032
1238499109,0cyclictest0-21swapper/223:15:452
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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