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2025-11-30 - 22:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Sun Nov 30, 2025 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
247852970,2sleep13189399cyclictest12:13:001
27892740,0sleep30-21swapper/310:58:013
145112720,0sleep30-21swapper/310:52:043
212902600,0sleep10-21swapper/112:09:231
142892590,1sleep014286-21sshd09:24:090
110942590,0sleep20-21swapper/212:01:482
39692580,0sleep10-21swapper/111:23:501
313002560,0sleep00-21swapper/012:23:190
258982560,0sleep20-21swapper/211:11:412
176982550,0sleep00-21swapper/010:45:080
66772530,0sleep30-21swapper/310:25:363
245032530,0sleep30-21swapper/309:14:153
161692530,1sleep00-21swapper/009:41:320
46712520,1sleep20-21swapper/209:22:462
303782520,0sleep00-21swapper/010:31:500
243372520,0sleep30-21swapper/311:00:163
87562510,0sleep20-21swapper/210:58:402
268112510,0sleep10-21swapper/109:32:241
259162500,2sleep33189599cyclictest11:40:213
296192490,1sleep30-21swapper/310:21:033
246502490,0sleep30-21swapper/312:35:453
168952490,0sleep20-21swapper/209:31:202
327332480,0sleep132726-21sshd09:57:071
208902470,0sleep00-21swapper/012:06:010
3144424634,7sleep10-21swapper/107:05:441
301802420,2sleep33189599cyclictest11:50:463
314192287,7sleep00-21swapper/007:05:280
144472270,1sleep0619-17sedispatch09:51:450
3175622410,10sleep30-21swapper/307:09:393
3142122110,7sleep20-21swapper/207:05:292
66602200,1sleep16659-21sshd10:39:561
75752190,0sleep00-21swapper/012:17:400
280772190,0sleep20-21swapper/210:10:202
3189099181,1cyclictest616-17auditd11:09:290
186272180,1sleep0111rcuc/010:09:270
263852170,1sleep0620-13audispd11:56:520
31893991616,0cyclictest16531-21kworker/1:008:30:551
31890991611,1cyclictest0-21swapper/009:28:400
3189099160,1cyclictest7653-21sshd11:13:300
202532160,0sleep10-21swapper/110:13:041
191672160,0sleep10-21swapper/111:39:441
31893991514,1cyclictest17325-21kworker/1:010:15:051
31893991514,0cyclictest17385-21lspci09:52:031
31893991513,1cyclictest15769-21kworker/1:111:32:351
31890991510,1cyclictest13926-21bash10:15:490
3189099150,11cyclictest616-17auditd09:38:090
110922150,0sleep00-21swapper/012:37:460
31893991414,0cyclictest33050irq/27-ahci[00010:02:521
31893991413,1cyclictest26343-21kworker/1:011:52:091
31893991413,0cyclictest17499-21lspci10:41:171
31893991412,1cyclictest28473-21kworker/1:010:58:051
31893991412,1cyclictest13989-21kworker/1:110:49:151
31893991313,0cyclictest3133-21kworker/1:311:10:131
31893991313,0cyclictest15769-21kworker/1:111:29:371
31893991312,0cyclictest33050irq/27-ahci[00009:15:421
31893991312,0cyclictest23236-21lspci11:04:141
43842120,0sleep30-21swapper/311:12:583
31895991210,1cyclictest32247-21bash10:42:563
3189599120,1cyclictest18437-21sshd12:09:053
3189599120,11cyclictest17240-21bash11:28:453
3189599120,11cyclictest0-21swapper/309:56:553
3189499120,1cyclictest20622-21bash10:23:382
31893991212,0cyclictest21749-21kworker/1:109:12:201
31893991212,0cyclictest16531-21kworker/1:009:09:131
31893991212,0cyclictest16531-21kworker/1:008:55:201
31893991210,1cyclictest9844-21sshd09:47:571
31890991210,1cyclictest0-21swapper/011:46:300
3189599119,1cyclictest7981-21tty10:08:163
3189599119,1cyclictest4020-21lspci09:43:463
31895991110,0cyclictest0-21swapper/312:02:363
31895991110,0cyclictest0-21swapper/309:26:363
3189499119,1cyclictest853-21sshd10:54:072
31894991110,0cyclictest0-21swapper/211:15:372
3189499110,10cyclictest0-21swapper/210:25:272
3189499110,10cyclictest0-21swapper/209:39:482
31893991111,0cyclictest27394-21kworker/1:110:23:351
31893991110,0cyclictest16341-21id12:25:081
31893991110,0cyclictest12014-21kworker/1:109:38:101
31893991110,0cyclictest0-21swapper/112:30:281
31893991110,0cyclictest0-21swapper/112:01:281
31893991110,0cyclictest0-21swapper/109:20:471
31890991110,0cyclictest0-21swapper/011:50:000
31890991110,0cyclictest0-21swapper/011:26:100
31890991110,0cyclictest0-21swapper/010:41:290
3189099110,10cyclictest0-21swapper/012:28:210
3189099110,10cyclictest0-21swapper/012:04:410
3189099110,10cyclictest0-21swapper/009:10:000
303072110,0sleep20-21swapper/212:23:142
24642110,1sleep3391rcuc/309:50:283
3189599109,0cyclictest0-21swapper/312:28:363
3189599109,0cyclictest0-21swapper/309:06:253
3189599109,0cyclictest0-21swapper/307:10:163
3189599108,1cyclictest29901-21sshd12:10:163
31895991010,0cyclictest0-21swapper/311:20:063
3189599100,9cyclictest31734-21sshd11:34:013
3189599100,0cyclictest0-21swapper/311:09:463
3189599100,0cyclictest0-21swapper/309:47:553
3189599100,0cyclictest0-21swapper/309:37:163
3189599100,0cyclictest0-21swapper/309:33:053
3189499109,0cyclictest0-21swapper/212:26:592
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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