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2026-04-14 - 07:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Tue Apr 14, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
114172660,0sleep00-21swapper/022:40:580
220772550,0sleep00-21swapper/022:24:040
229502540,0sleep10-21swapper/122:42:031
161272540,0sleep20-21swapper/200:37:592
50982530,0sleep10-21swapper/123:55:051
122902530,0sleep30-21swapper/321:25:553
321632520,0sleep00-21swapper/021:46:560
263822520,0sleep00-21swapper/000:29:570
147162520,0sleep30-21swapper/300:19:503
238622510,0sleep00-21swapper/021:43:180
179242510,0sleep00-21swapper/023:50:110
286072500,0sleep00-21swapper/021:58:160
201302500,1sleep020127-21lspci22:53:400
164202500,1sleep316416-21sshd21:14:343
92062490,0sleep30-21swapper/322:37:483
327392490,0sleep30-21swapper/322:51:503
314712490,0sleep20-21swapper/200:12:252
310782490,0sleep20-21swapper/221:35:192
283332480,0sleep00-21swapper/021:11:580
188432480,0sleep10-21swapper/122:56:251
188432480,0sleep10-21swapper/122:56:251
229142470,1sleep2321ktimersoftd/223:53:412
284442460,0sleep20-21swapper/223:00:142
218172450,0sleep30-21swapper/300:05:323
277362400,0sleep3401ktimersoftd/322:21:353
2623123210,7sleep30-21swapper/319:06:133
265112309,7sleep20-21swapper/219:09:452
2636222318,3sleep10-21swapper/119:07:521
258042219,7sleep00-21swapper/019:05:180
106872200,1sleep110683-21bash00:16:231
69752190,0sleep00-21swapper/021:33:170
116122190,2sleep22665299cyclictest00:31:302
237602180,0sleep20-21swapper/223:44:402
237602180,0sleep20-21swapper/223:44:402
170992180,2sleep22665299cyclictest23:47:002
69742170,1sleep16960-21sshd22:31:341
183432170,2sleep12664899cyclictest20:05:161
36402160,0sleep00-21swapper/000:33:490
321972160,1sleep232185-21sshd23:39:242
293622160,0sleep10-21swapper/121:24:091
208792160,0sleep30-21swapper/322:44:533
146692160,1sleep3391rcuc/323:59:003
284592150,0sleep2623-17sedispatch21:24:022
121332150,0sleep20-21swapper/222:50:012
81442140,1sleep38142-21bash23:46:093
67932140,0sleep30-21swapper/321:33:163
33522140,0sleep30-21swapper/321:58:563
135372140,0sleep00-21swapper/023:49:480
105342140,1sleep210532-21sshd00:07:312
97132130,0sleep00-21swapper/023:13:230
94412130,0sleep10-21swapper/121:25:331
64872130,0sleep2311rcuc/222:25:302
313302130,0sleep00-21swapper/021:24:240
85302120,1sleep38510-21sshd22:11:013
62182120,0sleep30-21swapper/300:30:593
2666199120,1cyclictest994-21lspci23:27:303
2666199120,11cyclictest0-21swapper/323:33:403
26652991211,0cyclictest0-21swapper/220:55:162
2665299120,11cyclictest699-21gdbus00:18:162
2665299120,11cyclictest674-21dbus-daemon22:22:172
2665299120,11cyclictest4870-21bash21:13:062
2665299120,11cyclictest0-21swapper/221:57:272
26648991210,1cyclictest27771-21sshd00:30:031
26642991210,1cyclictest5873-21lspci22:07:530
2664299120,1cyclictest6773-21lspci23:22:030
2664299120,1cyclictest6773-21lspci23:22:030
2664299120,1cyclictest17771-21sshd22:00:130
2664299120,11cyclictest7638-21hddtemp_smartct19:40:130
2666199110,10cyclictest0-21swapper/322:32:003
2666199110,10cyclictest0-21swapper/321:53:003
2666199110,10cyclictest0-21swapper/319:35:203
2666199110,10cyclictest0-21swapper/300:35:203
2666199110,0cyclictest0-21swapper/323:43:003
2666199110,0cyclictest0-21swapper/323:43:003
2666199110,0cyclictest0-21swapper/321:44:503
26652991110,0cyclictest0-21swapper/223:26:162
26652991110,0cyclictest0-21swapper/219:20:162
26652991110,0cyclictest0-21swapper/200:25:262
2665299110,10cyclictest18734-21lspci22:00:162
2665299110,10cyclictest0-21swapper/222:34:562
2665299110,0cyclictest0-21swapper/221:46:262
2664899119,1cyclictest0-21swapper/123:02:031
2664899110,10cyclictest0-21swapper/123:44:031
2664899110,10cyclictest0-21swapper/123:44:031
2664899110,0cyclictest0-21swapper/123:24:531
2664899110,0cyclictest0-21swapper/123:24:531
2664899110,0cyclictest0-21swapper/123:05:431
2664899110,0cyclictest0-21swapper/122:21:431
2664899110,0cyclictest0-21swapper/121:11:031
2664299119,1cyclictest18482-21sshd23:08:130
2664299119,1cyclictest0-21swapper/023:42:530
2664299119,1cyclictest0-21swapper/023:42:530
2664299113,4cyclictest7258-21munin-run20:59:590
26642991110,0cyclictest0-21swapper/021:35:430
2664299110,10cyclictest0-21swapper/000:14:330
2664299110,0cyclictest0-21swapper/022:12:040
38852100,1sleep03878-21lspci23:18:510
38852100,1sleep03878-21lspci23:18:510
2666199109,0cyclictest0-21swapper/323:38:113
2666199109,0cyclictest0-21swapper/323:00:103
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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