You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-27 - 17:29
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Mon Apr 27, 2026 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
36262980,0sleep30-21swapper/310:17:483
264442820,2sleep01319099cyclictest12:07:400
155232730,0sleep20-21swapper/209:37:342
48452640,0sleep30-21swapper/310:04:103
277182580,0sleep327713-21lspci11:59:293
314692570,0sleep30-21swapper/310:06:233
287952570,0sleep20-21swapper/212:33:092
149192560,2sleep21320299cyclictest09:45:432
75512550,0sleep30-21swapper/310:43:033
45022550,1sleep24501-21grepconf.sh12:19:472
185202550,1sleep00-21swapper/009:24:060
234922540,0sleep10-21swapper/110:55:261
173842540,0sleep20-21swapper/209:43:152
173842540,0sleep20-21swapper/209:43:142
16002540,0sleep00-21swapper/009:44:410
16002540,0sleep00-21swapper/009:44:410
63002530,1sleep21073-21nfsd09:50:282
259862530,0sleep00-21swapper/009:32:500
86192520,0sleep20-21swapper/212:06:042
322312520,0sleep20-21swapper/211:18:192
210822520,0sleep10-21swapper/109:12:381
123112520,0sleep10-21swapper/110:49:021
73432510,0sleep10-21swapper/111:10:371
325082510,0sleep00-21swapper/010:42:240
192192510,0sleep30-21swapper/309:16:163
146342510,0sleep2311rcuc/212:26:122
245642500,0sleep30-21swapper/312:27:053
265942490,0sleep00-21swapper/011:53:500
204872490,0sleep30-21swapper/311:42:113
204872490,0sleep30-21swapper/311:42:103
296472480,0sleep20-21swapper/211:20:462
260272480,0sleep20-21swapper/209:21:002
246882480,0sleep30-21swapper/310:55:333
166082480,0sleep00-21swapper/011:47:250
29782470,0sleep00-21swapper/010:48:130
268852470,0sleep30-21swapper/310:39:113
41462460,0sleep10-21swapper/110:09:371
29892460,0sleep30-21swapper/309:42:003
29892460,0sleep30-21swapper/309:41:593
274132390,0sleep10-21swapper/110:28:081
276212370,1sleep1674-21dbus-daemon12:16:061
320582360,0sleep00-21swapper/011:07:160
96622350,1sleep39652-21lspci11:21:533
307092320,0sleep00-21swapper/012:27:380
287562300,0sleep30-21swapper/310:50:203
1278923025,3sleep00-21swapper/007:06:210
127282298,9sleep30-21swapper/307:05:353
1220422614,7sleep20-21swapper/207:05:182
263382220,0sleep20-21swapper/211:42:422
263382220,0sleep20-21swapper/211:42:412
128152219,7sleep10-21swapper/107:06:411
190192200,0sleep1231rcuc/110:32:551
58202190,4sleep30-21swapper/312:05:493
229412190,1sleep122921-21sshd11:39:401
70022180,0sleep30-21swapper/312:20:003
275452180,0sleep00-21swapper/010:58:380
169562180,1sleep2311rcuc/210:27:122
194042170,0sleep319342-21sshd09:32:023
1319099170,1cyclictest0-21swapper/012:00:080
57662160,0sleep30-21swapper/309:47:433
7192150,0sleep1720-21systemd-cgroups10:53:351
4272150,0sleep00-21swapper/011:57:050
290212150,0sleep00-21swapper/011:29:070
19372150,0sleep30-21swapper/311:37:513
157222150,0sleep2311rcuc/210:43:462
156582150,0sleep10-21swapper/110:24:231
13190991510,4cyclictest23984-21lspci09:38:180
294132140,0sleep30-21swapper/309:13:403
254692140,0sleep10-21swapper/107:35:201
203532140,0sleep00-21swapper/010:30:140
1319099148,5cyclictest18659-21sshd11:17:080
1319099140,13cyclictest0-21swapper/012:36:170
131632140,0sleep00-21swapper/012:17:410
1320299130,1cyclictest2317-21sshd11:26:462
1319799130,0cyclictest0-21swapper/111:03:341
1319099138,4cyclictest0-21swapper/010:03:380
1319099136,1cyclictest20160-21sshd10:16:250
1319099135,2cyclictest674-21dbus-daemon11:21:490
1319099135,2cyclictest660-21avahi-daemon10:38:510
13190991311,1cyclictest649-21polkitd12:13:270
270462120,1sleep227040-21sshd11:48:192
13207991210,1cyclictest0-21swapper/311:01:273
13202991210,1cyclictest12271-21sshd11:00:062
13202991210,1cyclictest0-21swapper/209:58:562
1320299120,1cyclictest11287-21lspci09:27:052
1319099129,2cyclictest0-21swapper/011:35:370
1319099127,4cyclictest15872-21lspci12:31:580
1319099125,2cyclictest660-21avahi-daemon10:07:350
1319099125,1cyclictest660-21avahi-daemon11:32:490
1319099125,1cyclictest660-21avahi-daemon11:12:040
1319099125,1cyclictest660-21avahi-daemon09:12:080
1319099125,1cyclictest649-21polkitd10:50:030
1319099124,2cyclictest660-21avahi-daemon09:48:230
13190991210,1cyclictest10052-21consoletype09:50:470
81562110,1sleep08076-21sshd12:20:040
43272110,0sleep00-21swapper/009:26:150
1320799119,1cyclictest0-21swapper/311:11:573
13207991110,0cyclictest0-21swapper/312:10:273
13207991110,0cyclictest0-21swapper/309:23:373
1320799110,10cyclictest0-21swapper/312:23:463
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional