You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-13 - 02:20
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Wed May 13, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1811226863,3sleep30-21swapper/319:05:413
227292560,0sleep10-21swapper/122:30:391
200702550,0sleep30-21swapper/323:17:263
187902530,0sleep30-21swapper/323:31:093
187902530,0sleep30-21swapper/323:31:093
224122520,1sleep322410-21lspci00:29:403
193902520,1sleep319394-21bash22:38:413
190752520,0sleep10-21swapper/100:20:581
231592510,0sleep00-21swapper/023:20:240
214002510,0sleep10-21swapper/121:57:181
100552510,1sleep010052-21lspci22:40:340
240922500,0sleep20-21swapper/221:12:182
202172500,0sleep00-21swapper/000:07:150
83622490,0sleep20-21swapper/200:06:132
205572490,0sleep00-21swapper/023:42:240
170402490,0sleep217032-21sshd22:44:022
145612480,0sleep014518-21sshd23:03:100
59832470,0sleep10-21swapper/121:50:221
41042470,0sleep30-21swapper/321:53:033
29282470,0sleep20-21swapper/222:56:352
276832470,1sleep3401ktimersoftd/322:31:053
275762470,0sleep20-21swapper/222:39:252
144992470,0sleep10-21swapper/122:07:481
144992470,0sleep10-21swapper/122:07:471
214842460,0sleep221487-21bash22:11:092
234722440,0sleep0101ktimersoftd/021:43:360
173152420,2sleep11856699cyclictest22:02:311
72672390,0sleep00-21swapper/021:18:080
56752380,0sleep20-21swapper/200:36:292
1840223210,7sleep20-21swapper/219:09:222
1833123010,6sleep00-21swapper/019:08:280
183272308,7sleep10-21swapper/119:08:251
18566992322,0cyclictest241ktimersoftd/123:14:311
18570992018,1cyclictest26258-21lspci21:43:502
86052190,2sleep3674-21dbus-daemon21:45:073
5322190,0sleep10-21swapper/122:28:501
135072180,1sleep313491-21sshd22:27:083
282842170,0sleep30-21swapper/319:30:163
240592170,0sleep10-21swapper/123:53:451
218912160,0sleep30-21swapper/323:25:513
267462150,0sleep10-21swapper/123:23:341
18566991515,0cyclictest27986-21kworker/1:221:25:251
18566991513,1cyclictest21087-21kworker/1:023:37:281
152732150,0sleep20-21swapper/223:05:562
143502150,0sleep314352-21id23:08:423
311542140,1sleep125-21ksoftirqd/100:02:381
291982140,0sleep21026-21sshd21:46:502
18566991414,0cyclictest7880-21kworker/1:023:58:171
18566991414,0cyclictest22168-21kworker/1:200:11:491
18566991414,0cyclictest18284-21kworker/1:021:39:271
18566991414,0cyclictest10587-21kworker/1:122:36:291
18566991413,0cyclictest241ktimersoftd/122:41:421
18566991413,0cyclictest1449-21lspci22:56:281
18566991413,0cyclictest10058-21kworker/1:322:21:131
92822130,0sleep29277-21sshd21:34:002
77502130,0sleep10-21swapper/122:18:201
282702130,0sleep00-21swapper/022:28:260
1857199130,1cyclictest32441-21sshd22:06:333
1857199130,1cyclictest32441-21sshd22:06:323
1857199130,12cyclictest30209-21lspci23:40:233
18570991311,1cyclictest622-13audispd21:59:192
1856699134,1cyclictest25-21ksoftirqd/123:15:571
1856699134,1cyclictest25-21ksoftirqd/121:43:431
18566991313,0cyclictest27980-21kworker/1:222:45:391
18566991312,0cyclictest27986-21kworker/1:221:22:071
133452130,0sleep20-21swapper/223:41:462
129692130,0sleep30-21swapper/300:17:433
113312130,0sleep111309-21sshd23:25:021
84772120,0sleep20-21swapper/223:10:532
317672120,2sleep31857199cyclictest22:45:153
29332120,2sleep31857199cyclictest23:13:153
219512120,2sleep01856099cyclictest21:57:210
18571991210,1cyclictest15354-21sshd23:39:123
18570991211,0cyclictest0-21swapper/222:48:092
18570991210,1cyclictest22806-21lspci21:27:592
1857099120,1cyclictest8194-21sshd22:54:182
1857099120,1cyclictest2455-21bash21:21:292
1857099120,1cyclictest2246-21sshd21:50:092
1857099120,1cyclictest0-21swapper/221:38:192
1857099120,11cyclictest21229-21sshd23:28:392
1856699122,1cyclictest25-21ksoftirqd/123:07:211
1856699122,1cyclictest25-21ksoftirqd/100:32:591
18566991212,0cyclictest31308-21kworker/1:119:50:151
1856699121,1cyclictest241ktimersoftd/121:34:261
18566991211,1cyclictest13895-21kworker/1:123:01:151
18566991211,0cyclictest25-21ksoftirqd/100:29:591
18566991211,0cyclictest11980-21lspci22:13:101
18566991210,1cyclictest4170-21bash00:39:101
1856699120,1cyclictest317642sleep121:17:091
1856699120,11cyclictest24771-21sshd23:31:401
1856699120,11cyclictest24771-21sshd23:31:391
18560991210,1cyclictest0-21swapper/021:28:170
18560991210,1cyclictest0-21swapper/000:10:570
1856099120,1cyclictest0-21swapper/022:06:470
1856099120,1cyclictest0-21swapper/022:06:470
1856099120,11cyclictest10974-21sshd23:30:270
1856099120,11cyclictest10974-21sshd23:30:260
1857199119,1cyclictest1511-21sshd21:55:333
18571991110,0cyclictest16038-21lspci00:06:533
18571991110,0cyclictest0-21swapper/320:50:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional