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2025-12-19 - 21:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Fri Dec 19, 2025 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
166562830,0sleep30-21swapper/310:31:023
140342720,1sleep03221699cyclictest09:51:490
53502610,1sleep2311rcuc/212:33:042
80662580,0sleep10-21swapper/112:39:131
290422580,0sleep10-21swapper/110:52:421
167132570,1sleep016693-21sshd10:18:570
16542560,1sleep0111rcuc/010:38:310
41672530,1sleep34170-21nfsd409:20:163
320712530,1sleep332073-21grep12:12:043
204272530,0sleep00-21swapper/011:21:090
165562530,1sleep316551-21sshd12:04:503
232142520,1sleep123211-21lspci12:14:131
213032520,0sleep10-21swapper/110:04:121
321242510,0sleep00-21swapper/011:57:220
308012510,0sleep30-21swapper/310:58:463
80922500,0sleep20-21swapper/209:39:462
244342500,0sleep00-21swapper/012:14:200
238672500,0sleep30-21swapper/308:05:163
105132500,1sleep010508-21bash09:47:370
281442490,0sleep328142-21lspci10:01:053
260752490,0sleep30-21swapper/311:15:473
60622480,0sleep30-21swapper/310:24:163
220002480,2sleep23222399cyclictest09:52:472
276492450,0sleep20-21swapper/212:20:242
107762340,1sleep110761-21sshd10:45:141
307922310,0sleep30-21swapper/310:44:073
3207722816,7sleep30-21swapper/307:09:363
317562288,6sleep00-21swapper/007:05:360
310812260,0sleep00-21swapper/010:55:450
73132240,1sleep1699-21gdbus09:47:141
109342240,0sleep00-21swapper/012:04:190
3196822211,7sleep10-21swapper/107:08:171
3031222210,7sleep20-21swapper/207:05:022
256072210,11sleep375750irq/24-eno1-rx-11:36:143
270232200,0sleep30-21swapper/312:20:213
162332190,0sleep00-21swapper/009:44:320
121902190,2sleep0101ktimersoftd/012:33:420
34062170,1sleep233-21ksoftirqd/210:32:492
124162170,0sleep30-21swapper/311:23:253
322312160,1sleep032233-21lspci11:33:590
258682160,0sleep20-21swapper/210:29:002
163572160,1sleep116353-21lspci11:20:461
100502160,1sleep310043-21bash09:43:473
44762140,0sleep00-21swapper/011:02:100
283232140,0sleep10-21swapper/111:48:131
92342130,0sleep30-21swapper/311:46:283
87032130,0sleep0111rcuc/010:30:180
54972130,0sleep20-21swapper/209:27:042
3222299130,12cyclictest0-21swapper/112:26:331
3221699130,12cyclictest0-21swapper/009:34:500
208762130,1sleep341-21ksoftirqd/310:37:183
32225991210,1cyclictest10631-21sshd12:36:263
32223991210,1cyclictest16931-21sshd11:26:412
3222399120,1cyclictest28245-21lspci10:05:022
3222399120,11cyclictest0-21swapper/210:41:412
32222991210,1cyclictest0-21swapper/110:36:521
3222299120,1cyclictest6872-21bash09:31:521
3222299120,11cyclictest15049-21sshd10:30:521
32216991210,1cyclictest26316-21sshd11:45:090
3221699120,11cyclictest0-21swapper/010:49:300
97772110,0sleep19775-21lspci09:27:591
32225991110,0cyclictest0-21swapper/309:55:363
3222599110,10cyclictest0-21swapper/309:49:163
3222599110,10cyclictest0-21swapper/309:12:363
3222399119,1cyclictest28534-21sshd09:57:212
3222399119,1cyclictest17447-21sshd09:44:422
32223991110,0cyclictest11303-21sshd12:10:122
32223991110,0cyclictest0-21swapper/212:39:522
32223991110,0cyclictest0-21swapper/211:14:512
32223991110,0cyclictest0-21swapper/209:34:212
32223991110,0cyclictest0-21swapper/209:00:212
32223991110,0cyclictest0-21swapper/209:00:212
3222399110,10cyclictest0-21swapper/212:19:222
3222399110,10cyclictest0-21swapper/212:19:222
3222399110,10cyclictest0-21swapper/212:02:532
3222399110,10cyclictest0-21swapper/210:12:512
3222399110,0cyclictest0-21swapper/210:50:112
3222299119,1cyclictest622-13audispd11:42:331
3222299119,1cyclictest19148-21sshd09:23:221
32222991110,0cyclictest0-21swapper/112:33:231
32222991110,0cyclictest0-21swapper/111:06:021
3222299110,10cyclictest0-21swapper/112:04:241
3222299110,0cyclictest4978-21sshd10:41:421
32216991110,0cyclictest0-21swapper/011:17:090
32216991110,0cyclictest0-21swapper/010:02:190
3221699110,10cyclictest0-21swapper/009:24:090
216662110,1sleep0674-21dbus-daemon10:43:160
39352100,0sleep00-21swapper/011:13:530
3222599109,0cyclictest0-21swapper/311:31:363
3222599109,0cyclictest0-21swapper/311:27:263
3222599109,0cyclictest0-21swapper/311:12:563
3222599109,0cyclictest0-21swapper/311:01:463
3222599109,0cyclictest0-21swapper/310:10:363
3222599109,0cyclictest0-21swapper/309:17:163
3222599104,5cyclictest41-21ksoftirqd/311:52:333
3222599103,6cyclictest649-21polkitd11:57:593
3222599100,9cyclictest0-21swapper/307:23:163
3222599100,0cyclictest0-21swapper/307:40:163
3222399109,0cyclictest0-21swapper/211:33:312
3222399109,0cyclictest0-21swapper/211:21:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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