You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-15 - 19:28
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Fri May 15, 2026 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2920021060,0sleep30-21swapper/311:48:343
221112980,0sleep00-21swapper/009:57:120
252902700,0sleep00-21swapper/009:12:340
47722620,0sleep30-21swapper/309:47:243
146982600,0sleep20-21swapper/210:04:552
303452590,17sleep375750irq/24-eno1-rx-11:56:553
207582580,0sleep20-21swapper/209:59:542
315442560,0sleep20-21swapper/209:38:392
245112550,1sleep024508-21sshd10:19:350
198942550,0sleep10-21swapper/110:49:401
107942550,1sleep3391rcuc/309:39:403
40992540,0sleep30-21swapper/309:25:383
311882530,0sleep10-21swapper/112:13:391
279422520,0sleep30-21swapper/312:05:043
227572520,0sleep30-21swapper/310:13:533
166922510,0sleep00-21swapper/011:39:140
192332500,0sleep10-21swapper/112:37:301
129452500,0sleep312934-21rm11:02:523
88472490,0sleep00-21swapper/012:39:260
81122490,0sleep30-21swapper/310:23:423
159472490,0sleep00-21swapper/010:49:190
188322480,0sleep00-21swapper/011:58:440
1719824837,7sleep10-21swapper/107:05:411
26252470,1sleep02624-21bash12:33:210
256122470,0sleep025613-21sshd12:18:430
198922470,0sleep30-21swapper/310:52:223
101372470,0sleep30-21swapper/309:34:043
217652460,0sleep2311rcuc/210:13:482
123222460,0sleep10-21swapper/109:22:481
210952450,0sleep00-21swapper/011:20:110
105392440,2sleep21765799cyclictest11:27:342
98302430,0sleep30-21swapper/311:19:143
75062430,0sleep10-21swapper/109:47:391
327562430,2sleep01764699cyclictest11:51:350
167532390,0sleep30-21swapper/310:46:333
171802267,7sleep30-21swapper/307:05:283
296352240,0sleep30-21swapper/310:44:573
172682219,7sleep20-21swapper/207:06:362
1726622110,7sleep00-21swapper/007:06:340
34242190,1sleep13420-21sshd11:13:071
60602170,0sleep00-21swapper/011:43:500
289992170,0sleep20-21swapper/207:35:142
17653991715,1cyclictest19168-21lspci09:40:181
327652160,0sleep10-21swapper/111:21:081
17653991615,0cyclictest7849-21lspci09:14:261
17653991615,0cyclictest13181-21kworker/1:212:07:111
165992160,0sleep30-21swapper/308:25:123
251592150,0sleep20-21swapper/210:16:482
246592150,1sleep1231rcuc/110:08:301
17653991514,0cyclictest24539-21lspci11:53:421
324062140,0sleep00-21swapper/009:29:120
299962140,0sleep20-21swapper/209:44:042
250772140,0sleep30-21swapper/311:09:283
1765799140,12cyclictest649-21polkitd12:15:502
17653991413,0cyclictest4033-21kworker/1:112:29:431
17653991413,0cyclictest22320-21kworker/1:409:19:231
17653991412,1cyclictest5290-21kworker/1:111:39:371
17653991412,1cyclictest1036-21kworker/1:010:11:131
273762130,0sleep10-21swapper/111:01:171
25962130,0sleep20-21swapper/210:48:092
179102130,1sleep017802-21sshd12:29:080
17663991311,1cyclictest0-21swapper/309:44:143
1765799130,1cyclictest0-21swapper/212:34:502
1765799130,11cyclictest28719-21bash11:12:302
17653991311,1cyclictest22331-21lspci11:45:121
17646991311,1cyclictest19874-21sshd12:07:070
28052120,0sleep00-21swapper/010:39:530
1766399120,11cyclictest12942-21id11:22:143
1766399120,11cyclictest11426-21sshd11:35:543
1765799120,1cyclictest7434-21sshd12:22:402
1765799120,1cyclictest48-21kauditd10:08:202
1765799120,1cyclictest19203-21lspci12:37:302
1765799120,11cyclictest13459-21bash10:24:102
17653991211,1cyclictest16516-21kworker/1:411:15:411
17653991211,0cyclictest7022-21kworker/1:110:16:151
17653991211,0cyclictest2137-21kworker/1:209:55:271
17653991210,1cyclictest12715-21lspci12:03:451
17653991210,1cyclictest10855-21kworker/1:009:36:231
1765399120,1cyclictest642-21systemd-logind10:54:471
254512110,1sleep025449-21sshd11:28:520
1766399119,1cyclictest649-21polkitd12:34:143
1766399119,1cyclictest18066-21sshd10:38:243
1766399110,10cyclictest0-21swapper/312:22:043
1766399110,0cyclictest0-21swapper/311:40:343
1766399110,0cyclictest0-21swapper/310:17:243
1765799119,1cyclictest0-21swapper/212:13:102
1765799110,0cyclictest0-21swapper/212:25:202
1765799110,0cyclictest0-21swapper/209:12:202
1765399119,1cyclictest3676-21sshd12:19:371
17653991110,0cyclictest4545-21kworker/1:311:31:071
17653991110,0cyclictest241ktimersoftd/110:44:491
17653991110,0cyclictest23361-21kworker/1:109:33:251
17653991110,0cyclictest0-21swapper/110:34:171
1765399110,1cyclictest674-21dbus-daemon10:02:061
1764699119,1cyclictest569-21lspci10:11:570
1764699119,1cyclictest16401-21grep10:57:370
17646991110,0cyclictest0-21swapper/012:20:270
17646991110,0cyclictest0-21swapper/012:04:270
17646991110,0cyclictest0-21swapper/009:52:260
17646991110,0cyclictest0-21swapper/009:30:260
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional