You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-05-02 - 12:26
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Fri May 02, 2025 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
695421030,2sleep2871899cyclictest00:03:302
230982940,0sleep023074-21sshd00:11:100
90682790,1sleep341-21ksoftirqd/300:00:273
226502580,0sleep222655-21bash00:30:472
96782570,1sleep09652-21sshd22:15:300
230692570,1sleep3391rcuc/322:16:503
197532560,0sleep3401ktimersoftd/300:20:233
314822550,1sleep00-21swapper/023:56:290
175882550,0sleep00-21swapper/023:42:460
141432550,1sleep0646-21dbus-daemon21:30:170
134182550,1sleep21095-21nfsd00:10:162
279272530,0sleep00-21swapper/022:29:400
255942530,0sleep10-21swapper/121:49:361
220532530,0sleep10-21swapper/123:03:061
220532530,0sleep10-21swapper/123:03:051
204922530,0sleep30-21swapper/321:27:483
302572520,1sleep130246-21cp23:37:461
310972510,2sleep3872199cyclictest21:22:423
237772510,0sleep10-21swapper/100:01:571
88142490,0sleep30-21swapper/323:08:013
308272490,0sleep030829-21sshd00:21:320
91962470,0sleep10-21swapper/100:22:411
293372450,0sleep00-21swapper/023:03:500
293372450,0sleep00-21swapper/023:03:490
51962440,0sleep20-21swapper/222:05:562
234872360,1sleep323485-21lspci22:23:033
860323523,7sleep30-21swapper/319:09:583
84942309,7sleep10-21swapper/119:08:391
85842276,7sleep20-21swapper/219:09:492
229662220,0sleep00-21swapper/000:30:480
835522110,7sleep00-21swapper/019:06:540
272172200,1sleep127192-21sshd23:12:511
180582200,0sleep118055-21lspci23:52:041
296172180,0sleep20-21swapper/200:05:362
262472170,0sleep20-21swapper/223:49:492
115672170,0sleep10-21swapper/122:31:061
90052160,0sleep29008-21sshd22:30:512
8711991614,1cyclictest648-21systemd-logind00:06:060
64542160,0sleep30-21swapper/323:38:363
56722160,0sleep10-21swapper/123:32:221
129492160,0sleep00-21swapper/022:03:410
101952160,1sleep3391rcuc/322:55:433
147122150,1sleep314697-21sshd23:48:413
871199141,1cyclictest0-21swapper/021:25:460
871199140,13cyclictest4565-21lspci21:20:160
85812140,0sleep38577-21lspci23:04:573
85812140,0sleep38577-21lspci23:04:563
69492140,0sleep30-21swapper/323:50:583
324382140,0sleep30-21swapper/321:41:023
306962140,0sleep10-21swapper/123:25:321
287272140,0sleep10-21swapper/100:11:441
131032140,0sleep10-21swapper/122:46:441
871899130,12cyclictest0-21swapper/223:30:042
871899130,12cyclictest0-21swapper/221:46:532
8712991312,0cyclictest9498-21lspci23:20:251
8712991312,0cyclictest20779-21lspci23:15:221
8712991312,0cyclictest13826-21lspci21:27:101
8711991311,1cyclictest620-13audispd21:52:360
8711991311,1cyclictest0-21swapper/023:24:470
8711991311,1cyclictest0-21swapper/000:01:270
36792130,0sleep00-21swapper/023:26:030
281162130,0sleep10-21swapper/123:09:551
872199120,1cyclictest7486-21sshd23:32:333
872199120,1cyclictest1-21systemd23:16:433
872199120,1cyclictest0-21swapper/322:29:523
872199120,11cyclictest0-21swapper/322:36:223
872199120,11cyclictest0-21swapper/321:31:223
871899120,1cyclictest684-21polkitd22:54:332
8712991211,0cyclictest23460-21lspci22:01:331
8712991211,0cyclictest21681-21lspci23:58:411
8712991211,0cyclictest17299-21snmpd20:50:421
8712991210,1cyclictest30180-21sshd22:08:211
8711991210,1cyclictest0-21swapper/021:17:470
871199120,11cyclictest1385-21bash23:38:060
871199120,11cyclictest1-21systemd22:06:570
872199119,1cyclictest646-21dbus-daemon00:07:433
872199119,1cyclictest0-21swapper/321:18:223
871899119,1cyclictest9844-21lspci00:16:032
871899119,1cyclictest646-21dbus-daemon21:56:442
8718991110,0cyclictest21150-21lspci23:52:212
8718991110,0cyclictest0-21swapper/222:56:042
8718991110,0cyclictest0-21swapper/222:16:042
8718991110,0cyclictest0-21swapper/221:09:032
871899110,10cyclictest0-21swapper/200:25:332
871299119,1cyclictest3060-21sshd00:32:101
8712991110,0cyclictest0-21swapper/100:16:501
871299110,0cyclictest0-21swapper/121:54:001
8711991110,0cyclictest0-21swapper/022:30:460
8711991110,0cyclictest0-21swapper/019:40:250
871199110,1cyclictest0-21swapper/023:14:060
208312110,0sleep0111rcuc/000:17:140
872199109,0cyclictest0-21swapper/322:05:033
872199109,0cyclictest0-21swapper/321:51:433
872199100,0cyclictest0-21swapper/323:57:533
871899109,0cyclictest0-21swapper/223:37:132
871899109,0cyclictest0-21swapper/220:50:242
871899108,1cyclictest29473-21lspci21:25:332
871299108,1cyclictest25-21ksoftirqd/121:35:161
871299101,1cyclictest131rcu_sched21:23:081
871299100,1cyclictest25306-21lspci00:05:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional