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2026-04-06 - 10:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack2slot0.osadl.org (updated Mon Apr 06, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
145002710,0sleep20-21swapper/222:09:442
175712620,0sleep00-21swapper/000:08:090
282362590,0sleep30-21swapper/321:31:523
223492580,1sleep3401ktimersoftd/323:08:343
285332550,0sleep328531-21sshd21:15:473
12642550,0sleep10-21swapper/100:09:391
62412540,1sleep031653-21kworker/0:423:25:160
283302540,0sleep20-21swapper/223:36:272
180632540,0sleep10-21swapper/122:31:181
286892530,1sleep01-21systemd22:10:580
24602530,0sleep20-21swapper/223:46:002
149072520,1sleep30-21swapper/322:58:433
30112510,0sleep00-21swapper/022:05:330
261282510,0sleep20-21swapper/221:55:422
248522510,0sleep10-21swapper/121:15:201
256912500,0sleep325687-21bash21:40:373
81862490,0sleep10-21swapper/122:24:131
42502490,0sleep30-21swapper/323:03:483
42502490,0sleep30-21swapper/323:03:483
22522410,1sleep1241ktimersoftd/123:18:521
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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