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2026-01-24 - 10:01
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack2slot0.osadl.org (updated Sat Jan 24, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
127942950,1sleep1520599cyclictest22:11:531
134122930,0sleep10-21swapper/121:44:181
190772850,0sleep219078-21sshd21:34:292
123832710,0sleep10-21swapper/123:33:291
213432620,0sleep10-21swapper/123:03:561
322412570,1sleep132244-21bash21:53:121
95182560,1sleep09510-21sshd23:30:230
91802520,0sleep30-21swapper/300:36:303
70562520,1sleep10-21swapper/100:11:341
180882520,0sleep10-21swapper/119:40:001
249042500,0sleep10-21swapper/121:27:011
69732490,1sleep20-21swapper/200:22:372
33942490,0sleep03390-21grep23:21:390
301072490,0sleep10-21swapper/123:18:261
215402490,0sleep00-21swapper/022:41:530
121992480,0sleep20-21swapper/223:36:092
115992470,0sleep00-21swapper/000:20:130
263672460,1sleep09-21ksoftirqd/022:58:520
89302450,0sleep00-21swapper/022:24:220
18582440,0sleep20-21swapper/221:53:242
80652420,1sleep0519999cyclictest22:38:000
76652420,1sleep37666-21sshd22:26:583
81052380,2sleep0519999cyclictest22:49:010
249072380,0sleep024829-21sshd00:07:360
29122370,2sleep0111rcuc/021:46:330
47722360,2sleep1520599cyclictest22:04:081
37002360,2sleep3521699cyclictest23:49:163
91992350,0sleep10-21swapper/123:41:251
8822350,0sleep20-21swapper/200:33:052
157672320,0sleep10-21swapper/123:50:141
33092308,7sleep10-21swapper/119:05:071
479422811,6sleep20-21swapper/219:06:112
369922812,11sleep00-21swapper/019:05:140
477122210,7sleep30-21swapper/319:05:563
213472210,0sleep30-21swapper/323:25:533
58732190,2sleep0519999cyclictest23:10:480
37222180,0sleep20-21swapper/200:16:472
306422180,1sleep00-21swapper/023:26:420
201082180,1sleep020094-21bash22:09:160
115162180,0sleep00-21swapper/023:16:490
52932170,1sleep15299-21bash21:57:111
5205991715,1cyclictest20125-21kworker/1:121:16:171
5205991715,0cyclictest2616-21kworker/1:000:35:481
193512170,1sleep2311rcuc/222:22:282
5205991615,0cyclictest241ktimersoftd/123:29:491
154512160,2sleep3521699cyclictest21:30:303
85322150,0sleep10-21swapper/123:08:221
78792150,1sleep27880-21bash21:13:002
5205991515,0cyclictest28942-21kworker/1:223:45:411
5205991514,0cyclictest241ktimersoftd/121:12:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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