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2017-03-26 - 00:33

OSADL Realtime QA Farm

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Default latency plot of system in rack #2, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Next
  Phytec

ARM926EJ-S rev 4 (v5l), Linux 2.6.33.7.2-rt30 (Profile)

Latency plot of system in rack #2, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l50000000 -m -n -p99 -i400 -h800 -q
Total number of samples: 50 million
Resolution of latency scale: reduced 
Duration: 5 hours, 33 minutes

 

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