You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-13 - 02:43
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack2slot6.osadl.org (updated Tue Jan 13, 2026 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31940ksoftirqd/031759-21threads21:19:330
27632995126cyclictest0-21swapper21:38:380
27632995025cyclictest0-21swapper21:27:540
27632995016cyclictest1344-21kworker/0:020:56:040
27632995016cyclictest12260-21kworker/0:121:58:050
27632994915cyclictest20115-21kworker/0:022:29:170
27632994831cyclictest0-21swapper21:29:260
27632994823cyclictest22226-21cut23:34:180
27632994814cyclictest1344-21kworker/0:020:28:500
27632994725cyclictest0-21swapper21:49:400
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional