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2026-01-25 - 19:44
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 376 highest latencies:
System rack2slot6.osadl.org (updated Sun Jan 25, 2026 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31780ksoftirqd/012565-21ls09:49:220
27097995627cyclictest0-21swapper09:56:590
27097995625cyclictest75150irq/9-eth207:59:080
27097995625cyclictest0-21swapper10:54:290
27097995528cyclictest0-21swapper11:04:530
27097995527cyclictest0-21swapper10:42:290
27097995526cyclictest0-21swapper10:10:380
27097995526cyclictest0-21swapper10:08:070
27097995526cyclictest0-21swapper08:20:480
27097995525cyclictest75150irq/9-eth208:37:430
27097995429cyclictest0-21swapper10:15:410
27097995427cyclictest0-21swapper11:17:360
27097995427cyclictest0-21swapper09:20:450
27097995426cyclictest75150irq/9-eth208:54:210
27097995426cyclictest0-21swapper11:09:350
27097995425cyclictest0-21swapper09:43:000
27097995425cyclictest0-21swapper08:04:160
27097995424cyclictest0-21swapper08:53:140
27097995327cyclictest0-21swapper11:21:050
27097995326cyclictest0-21swapper10:51:120
27097995326cyclictest0-21swapper10:32:180
27097995326cyclictest0-21swapper10:03:000
27097995326cyclictest0-21swapper08:59:250
27097995326cyclictest0-21swapper08:09:380
27097995325cyclictest0-21swapper11:03:390
27097995325cyclictest0-21swapper10:22:320
27097995325cyclictest0-21swapper09:16:490
27097995323cyclictest195292sleep010:34:010
27097995323cyclictest0-21swapper09:12:030
27097995323cyclictest0-21swapper08:27:050
27097995226cyclictest0-21swapper09:07:350
27097995226cyclictest0-21swapper08:29:360
27097995225cyclictest0-21swapper09:36:470
27097995223cyclictest0-21swapper09:46:290
27097995128cyclictest0-21swapper08:16:470
27097995126cyclictest0-21swapper11:24:460
27097995126cyclictest0-21swapper09:29:350
27097995124cyclictest0-21swapper10:46:110
27097995124cyclictest0-21swapper08:42:480
27097995124cyclictest0-21swapper08:00:380
27097995123cyclictest0-21swapper09:25:130
27097995123cyclictest0-21swapper08:46:370
27097995023cyclictest11591-21sensors_temp10:24:180
27097993610cyclictest20198-21munin-node07:04:250
27097993510cyclictest2640-21munin-node06:19:300
27097993410cyclictest31913-21munin-node07:34:260
27097993410cyclictest31060-21munin-node06:09:300
2709799339cyclictest0-21swapper06:32:090
27097993311cyclictest0-21swapper07:47:230
27097993310cyclictest26054-21munin-node07:19:230
2709799329cyclictest0-21swapper07:16:140
2709799329cyclictest0-21swapper06:52:160
27097993212cyclictest4589-21munin-node06:24:280
27097993210cyclictest16299-21munin-node06:54:290
27097993210cyclictest0-21swapper07:29:210
27097993210cyclictest0-21swapper07:12:180
27097993210cyclictest0-21swapper06:07:100
2709799319cyclictest0-21swapper06:15:410
2709799318cyclictest0-21swapper07:52:280
27097993122cyclictest9048-21ls06:34:280
27097993121cyclictest18875-21grep06:59:280
27097993121cyclictest139922sleep006:47:480
27097993120cyclictest122872sleep006:44:080
27097993111cyclictest28108-21unixbench_singl05:59:320
27097993020cyclictest1436-21runrttasks07:39:250
27097993010cyclictest0-21swapper07:24:190
75150240irq/9-eth20-21swapper05:54:310
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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