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2026-03-05 - 19:22
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack2slot6.osadl.org (updated Thu Mar 05, 2026 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15959994928cyclictest0-21swapper10:16:260
15959994927cyclictest0-21swapper09:39:250
15959994830cyclictest0-21swapper10:22:320
15959994830cyclictest0-21swapper09:41:180
15959994816cyclictest7731-21kworker/0:109:59:540
15959994815cyclictest29955-21kworker/0:008:17:030
15959994814cyclictest29955-21kworker/0:008:21:180
15959994732cyclictest0-21swapper10:13:230
15959994728cyclictest20801-21sshd08:31:560
15959994728cyclictest0-21swapper09:47:390
15959994728cyclictest0-21swapper09:24:570
15959994728cyclictest0-21swapper07:37:420
15959994727cyclictest0-21swapper08:02:290
15959994723cyclictest0-21swapper08:14:020
15959994717cyclictest29955-21kworker/0:009:05:200
15959994716cyclictest29955-21kworker/0:008:58:430
15959994716cyclictest29955-21kworker/0:007:57:220
15959994715cyclictest29955-21kworker/0:007:33:500
15959994628cyclictest0-21swapper09:34:460
15959994627cyclictest0-21swapper07:03:400
15959994626cyclictest0-21swapper06:57:050
15959994615cyclictest29955-21kworker/0:008:50:270
15959994614cyclictest29955-21kworker/0:007:22:140
15959994613cyclictest29955-21kworker/0:008:52:250
15959994613cyclictest29955-21kworker/0:007:27:270
15959994612cyclictest7731-21kworker/0:109:51:170
15959994612cyclictest29955-21kworker/0:007:41:340
3028424528sleep00-21swapper08:42:400
15959994527cyclictest0-21swapper09:29:250
15959994526cyclictest29955-21kworker/0:009:13:430
15959994526cyclictest0-21swapper07:46:540
15959994526cyclictest0-21swapper07:06:420
15959994514cyclictest29955-21kworker/0:008:26:310
15959994514cyclictest29955-21kworker/0:008:09:160
15959994513cyclictest7731-21kworker/0:110:01:170
15959994513cyclictest29955-21kworker/0:009:18:050
15959994512cyclictest29955-21kworker/0:008:38:000
15959994512cyclictest29955-21kworker/0:007:51:370
15959994511cyclictest29955-21kworker/0:007:20:440
15959994428cyclictest7731-21kworker/0:110:07:550
15959994426cyclictest0-21swapper07:11:310
15959994425cyclictest0-21swapper09:08:430
15959993511cyclictest0-21swapper05:31:350
1595999349cyclictest0-21swapper06:50:010
1595999349cyclictest0-21swapper05:38:230
15959993410cyclictest20739-21munin-node06:31:300
15959993410cyclictest0-21swapper06:02:000
1595999339cyclictest0-21swapper06:18:540
1595999339cyclictest0-21swapper05:13:100
15959993312cyclictest75150irq/9-eth205:10:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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