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2025-08-29 - 14:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot1.osadl.org (updated Fri Aug 29, 2025 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2096999103102cyclictest0-21swapper/303:06:193
2096999103102cyclictest0-21swapper/300:36:253
20967999392cyclictest0-21swapper/103:06:191
20967999392cyclictest0-21swapper/100:36:251
20969998872cyclictest0-21swapper/323:11:443
20969998782cyclictest0-21swapper/322:31:503
20969998782cyclictest0-21swapper/303:31:323
20969998782cyclictest0-21swapper/303:31:323
20969998782cyclictest0-21swapper/303:21:183
20969998782cyclictest0-21swapper/302:51:373
20969998782cyclictest0-21swapper/301:41:393
20969998782cyclictest0-21swapper/301:16:393
20969998782cyclictest0-21swapper/300:51:403
20969998782cyclictest0-21swapper/300:41:413
20967998782cyclictest0-21swapper/102:26:441
20967998782cyclictest0-21swapper/100:41:411
20967998781cyclictest6978-21tune2fs02:51:371
20967998781cyclictest30466-21tune2fs01:16:391
20967998781cyclictest24124-21tune2fs03:31:321
20967998781cyclictest24124-21tune2fs03:31:321
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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