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2026-02-28 - 04:02
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot2.osadl.org (updated Sat Feb 28, 2026 00:44:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
34455122690,3chrt344550-21systemctl00:11:180
33218022460,3chrt332178-21ntp_states23:25:590
34567222440,2sleep0345670-21ntp_kernel_pll_00:15:450
28020522410,2sleep0280207-21grep20:20:130
27472722260,3chrt274728-21basename20:00:210
29304022250,4chrt293037-21ntpq21:05:330
32673822160,2sleep0326739-21gzip23:06:160
26053999216188,17cyclictest350745-21kworker/u2:000:36:160
26053999214183,20cyclictest310690-21kworker/u2:223:00:030
26053999213186,18cyclictest310690-21kworker/u2:200:00:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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