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2026-02-02 - 21:56
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot2.osadl.org (updated Mon Feb 02, 2026 12:44:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
34756323010,3sleep0347565-21latency_hist11:30:070
29021022500,3chrt290208-21ld08:01:040
36161722470,3chrt361615-21diskstats12:20:210
33029122420,2chrt330290-21/usr/sbin/munin10:25:250
31766022380,2chrt317661-21grep09:40:140
27560499217179,26cyclictest282832-21systemd07:35:230
27560499211180,19cyclictest273278-21kworker/u2:207:10:370
27560499210180,19cyclictest362783-21kworker/u2:212:30:040
27560499204172,19cyclictest351645-21kworker/u2:111:50:380
28597822030,2sleep0285979-21ntpq07:45:530
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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