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2026-02-05 - 23:40
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot2.osadl.org (updated Thu Feb 05, 2026 12:44:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
175463499297267,19cyclictest29-21kswapd007:41:030
177057222580,4chrt1770569-21ntpq08:05:520
183609722500,2chrt1836092-21ntp_states12:01:020
182457022470,3chrt1824568-21diskstats11:20:170
176656322470,3chrt1766560-21ps07:51:150
175463499245215,18cyclictest1748112-21kworker/u2:107:37:250
175463499213182,19cyclictest1778864-21kworker/u2:208:50:040
175463499211181,18cyclictest1748112-21kworker/u2:107:20:030
184146422080,2sleep01841465-21cat12:20:290
183846522080,2sleep01838466-21grep12:10:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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