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2026-02-19 - 01:42
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot2.osadl.org (updated Thu Feb 19, 2026 00:44:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1903299284253,20cyclictest29-21kswapd000:05:590
4032222570,3chrt40320-21memory20:25:290
4753622550,3chrt47523-21ntpq20:51:100
9077522510,3sleep090777-21uname23:26:160
10250022470,2chrt102496-21diskstats00:10:190
8309022460,2sleep083091-21munin-plugin-st23:00:000
2521122430,3chrt25209-21ntpq19:31:010
5180122370,2chrt51800-21/usr/sbin/munin21:06:150
1903299225197,17cyclictest98008-21kworker/u2:100:00:060
7751222110,3sleep077514-21cron22:39:590
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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