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2026-01-31 - 06:18
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot2.osadl.org (updated Sat Jan 31, 2026 00:44:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
328955923150,2sleep03289557-21munin-plugin-st22:15:000
328015922920,2sleep03280160-21/usr/sbin/munin21:40:250
323798999267237,19cyclictest3273348-21kworker/u2:021:20:230
325258622620,3chrt3252587-21open_files20:01:130
323673222570,3sleep03236733-21/usr/sbin/munin19:05:100
330289222560,3chrt3302895-21mailstats23:01:160
328603322530,3chrt3286029-21ntp_states22:01:060
331614222490,3chrt3316144-21grep23:50:070
330532922450,2sleep03305330-21netstat23:10:290
325385022410,3chrt3253838-21ntpq20:05:470
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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