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2025-05-09 - 05:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot3.osadl.org (updated Fri May 09, 2025 00:46:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1283210894sleep20-21swapper/219:05:094
1375210293sleep80-21swapper/819:06:2710
122501010irq/42-ahci0-21swapper/319:09:575
12250960irq/42-ahci0-21swapper/119:09:081
2963550940irq/54-eth0-tx-0-21swapper/1019:08:262
2963450880irq/53-eth0-rx-0-21swapper/519:05:467
166828177sleep70-21swapper/719:09:509
12250790irq/42-ahci0-21swapper/419:08:336
155526653sleep60-21swapper/619:08:148
2963450650irq/53-eth0-rx-0-21swapper/1119:06:093
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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