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2025-12-05 - 03:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot3.osadl.org (updated Fri Dec 05, 2025 00:46:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12132210894sleep90-21swapper/919:07:2811
12089210793sleep80-21swapper/819:06:5110
123702106101sleep10-21swapper/119:09:571
12013210591sleep100-21swapper/1019:05:532
12028210491sleep110-21swapper/1119:06:073
12101210391sleep60-21swapper/619:07:028
122501020irq/42-ahci0-21swapper/219:08:574
3066350920irq/52-eth0-rx-0-21swapper/419:05:116
3066450850irq/53-eth0-tx-0-21swapper/319:05:285
3066350690irq/52-eth0-rx-0-21swapper/519:06:427
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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