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2026-05-11 - 02:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Mon May 11, 2026 00:46:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501160irq/53-eth0-rx-0-21swapper/219:09:174
128501160irq/42-ahci0-21swapper/119:09:341
9918501100irq/53-eth0-rx-0-21swapper/719:09:129
9918501000irq/53-eth0-rx-0-21swapper/419:07:536
991850990irq/53-eth0-rx-0-21swapper/519:07:217
991850980irq/53-eth0-rx-0-21swapper/819:09:3310
991950840irq/54-eth0-tx-0-21swapper/319:05:155
1201227665sleep90-21swapper/919:06:3611
119350720irq/18-parport00-21swapper/1019:09:202
991850650irq/53-eth0-rx-0-21swapper/1119:06:073
1193725853sleep00-21swapper/019:05:390
914425753sleep60-21swapper/619:05:098
1246699320cyclictest0-21swapper/1121:22:493
1246699310cyclictest0-21swapper/1121:12:293
1243299310cyclictest0-21swapper/019:25:310
1246699300cyclictest0-21swapper/1119:22:493
12432992928cyclictest2745-21runrttasks22:13:100
12458992723cyclictest1972-21ssh23:22:075
12458992622cyclictest12288-21ssh21:42:235
12458992521cyclictest17955-21ssh21:46:495
12466992018cyclictest0-21swapper/1120:08:293
1246599192cyclictest991850irq/53-eth0-rx-22:25:352
1246499192cyclictest0-21swapper/923:50:3711
1246199190cyclictest0-21swapper/622:34:558
991850180irq/53-eth0-rx-1246599cyclictest23:53:432
1246699180cyclictest991950irq/54-eth0-tx-22:29:303
12465991817cyclictest0-21swapper/1023:35:352
12465991817cyclictest0-21swapper/1023:33:052
12465991817cyclictest0-21swapper/1000:09:212
12465991817cyclictest0-21swapper/1000:03:242
12465991817cyclictest0-21swapper/1000:03:242
1246599181cyclictest991850irq/53-eth0-rx-22:39:312
1246599181cyclictest991850irq/53-eth0-rx-22:20:172
1246599181cyclictest991850irq/53-eth0-rx-22:10:512
1246599181cyclictest991850irq/53-eth0-rx-21:20:512
1246599181cyclictest991850irq/53-eth0-rx-21:18:182
1246599181cyclictest991850irq/53-eth0-rx-00:20:572
1246599181cyclictest831ksoftirqd/1022:40:132
1246599181cyclictest12850irq/42-ahci21:08:552
1246599181cyclictest12850irq/42-ahci21:08:552
1246499182cyclictest0-21swapper/923:22:3711
1246499181cyclictest991950irq/54-eth0-tx-23:04:1611
1246499181cyclictest8005-21ssh23:27:0411
1246499181cyclictest24264-21ssh22:45:4011
1246499181cyclictest0-21swapper/923:55:0711
1246499181cyclictest0-21swapper/923:55:0611
1246499181cyclictest0-21swapper/923:35:5611
1246499181cyclictest0-21swapper/923:08:4611
1246499181cyclictest0-21swapper/922:24:4711
1246499181cyclictest0-21swapper/922:19:2311
1246499181cyclictest0-21swapper/921:50:4011
1246499181cyclictest0-21swapper/921:49:2311
1246499181cyclictest0-21swapper/921:43:3611
1246499181cyclictest0-21swapper/921:31:1911
1246499181cyclictest0-21swapper/921:23:3111
1246499181cyclictest0-21swapper/919:42:2611
1246499181cyclictest0-21swapper/900:35:4011
1246499181cyclictest0-21swapper/900:23:1111
1246499181cyclictest0-21swapper/900:17:2511
1246499181cyclictest0-21swapper/900:05:1911
12460991816cyclictest12179-21qemu-kvm19:15:027
12460991816cyclictest12178-21qemu-kvm19:35:137
12460991816cyclictest12178-21qemu-kvm19:32:117
12460991816cyclictest12178-21qemu-kvm19:25:157
12460991816cyclictest12178-21qemu-kvm19:20:117
12465991716cyclictest811rcuc/1021:37:422
1246599170cyclictest991850irq/53-eth0-rx-23:45:302
1246599170cyclictest991850irq/53-eth0-rx-23:45:292
1246599170cyclictest991850irq/53-eth0-rx-23:41:132
1246599170cyclictest991850irq/53-eth0-rx-23:11:082
1246599170cyclictest991850irq/53-eth0-rx-23:07:262
1246599170cyclictest991850irq/53-eth0-rx-23:00:012
1246599170cyclictest991850irq/53-eth0-rx-22:45:142
1246599170cyclictest991850irq/53-eth0-rx-21:55:262
1246599170cyclictest991850irq/53-eth0-rx-21:45:092
1246599170cyclictest991850irq/53-eth0-rx-21:30:362
1246599170cyclictest991850irq/53-eth0-rx-21:25:242
1246599170cyclictest991850irq/53-eth0-rx-21:10:092
1246599170cyclictest991850irq/53-eth0-rx-20:55:362
1246599170cyclictest991850irq/53-eth0-rx-20:55:362
1246599170cyclictest991850irq/53-eth0-rx-20:25:462
1246599170cyclictest991850irq/53-eth0-rx-20:17:482
1246599170cyclictest991850irq/53-eth0-rx-00:36:062
1246599170cyclictest991850irq/53-eth0-rx-00:31:092
1246599170cyclictest991850irq/53-eth0-rx-00:18:572
1246599170cyclictest991850irq/53-eth0-rx-00:10:592
1246599170cyclictest93932sleep1022:06:462
1246599170cyclictest74802chrt23:26:082
1246599170cyclictest71362sleep1022:32:122
1246599170cyclictest52132chrt19:40:162
1246599170cyclictest36362chrt20:23:092
1246599170cyclictest324312chrt19:35:032
1246599170cyclictest317462sleep1019:32:392
1246599170cyclictest307072sleep1021:00:132
1246599170cyclictest305412sleep1023:20:052
1246599170cyclictest301732sleep1022:50:392
1246599170cyclictest287812sleep1023:17:412
1246599170cyclictest281372sleep1019:28:142
1246599170cyclictest28012sleep1022:00:442
1246599170cyclictest254112sleep1020:51:242
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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