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2025-11-24 - 11:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Mon Nov 24, 2025 00:46:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30663501110irq/52-eth0-rx-0-21swapper/119:05:271
17153210894sleep80-21swapper/819:07:3710
122501020irq/42-ahci0-21swapper/219:09:454
3066350900irq/52-eth0-rx-0-21swapper/419:06:456
12250900irq/42-ahci0-21swapper/719:08:249
3066350860irq/52-eth0-rx-0-21swapper/519:07:387
12250840irq/42-ahci0-21swapper/319:07:165
1732727876sleep90-21swapper/919:09:1511
3066350730irq/52-eth0-rx-0-21swapper/1019:05:402
1711026453sleep60-21swapper/619:06:598
1719325955sleep00-21swapper/019:08:060
1706625955sleep110-21swapper/1119:06:283
17526993114cyclictest831ksoftirqd/1021:30:142
17485993117cyclictest0-21swapper/019:19:170
1752699236cyclictest831ksoftirqd/1023:37:442
1752699236cyclictest831ksoftirqd/1023:37:442
17527992221cyclictest20523-1kworker/11:2H20:20:133
1752699225cyclictest831ksoftirqd/1023:33:192
1752799210cyclictest1359-21turbostat20:19:563
1752799210cyclictest1359-21turbostat20:19:553
1752699214cyclictest831ksoftirqd/1020:55:352
17527991917cyclictest0-21swapper/1119:34:563
1748599190cyclictest0-21swapper/021:11:540
1752799180cyclictest0-21swapper/1120:09:483
17526991817cyclictest831ksoftirqd/1022:55:142
17526991817cyclictest0-21swapper/1019:56:072
1752699181cyclictest831ksoftirqd/1019:45:142
1752699181cyclictest831ksoftirqd/1019:40:242
1752699181cyclictest811rcuc/1019:20:002
1752699181cyclictest188622chrt19:50:562
1752599181cyclictest4208-1kworker/9:0H20:10:3211
1752599181cyclictest12250irq/42-ahci21:47:1811
1752599181cyclictest0-21swapper/923:26:3411
1752599181cyclictest0-21swapper/923:26:3411
1752599181cyclictest0-21swapper/923:03:4811
1752599181cyclictest0-21swapper/922:30:2211
1752599181cyclictest0-21swapper/921:10:1011
1752399186cyclictest0-21swapper/723:05:019
17522991816cyclictest20533-21qemu-kvm22:19:438
1748599180cyclictest0-21swapper/019:26:390
17526991716cyclictest831ksoftirqd/1023:10:142
17526991716cyclictest831ksoftirqd/1021:00:152
17526991716cyclictest831ksoftirqd/1020:00:362
17526991716cyclictest811rcuc/1023:45:082
17526991716cyclictest0-21swapper/1023:40:212
1752699170cyclictest831ksoftirqd/1023:25:152
1752699170cyclictest831ksoftirqd/1023:25:152
1752699170cyclictest831ksoftirqd/1022:50:142
1752699170cyclictest831ksoftirqd/1022:40:122
1752699170cyclictest831ksoftirqd/1022:35:162
1752699170cyclictest831ksoftirqd/1022:05:142
1752699170cyclictest831ksoftirqd/1021:20:122
1752699170cyclictest831ksoftirqd/1020:45:312
1752699170cyclictest831ksoftirqd/1020:20:022
1752699170cyclictest831ksoftirqd/1020:05:132
1752699170cyclictest831ksoftirqd/1019:30:162
1752699170cyclictest831ksoftirqd/1000:20:022
1752699170cyclictest811rcuc/1021:50:222
1752699170cyclictest811rcuc/1020:35:382
1752699170cyclictest811rcuc/1020:35:372
1752699170cyclictest74652sleep1023:20:072
1752699170cyclictest70962sleep1000:01:362
1752699170cyclictest63312sleep1022:32:262
1752699170cyclictest57372sleep1021:46:212
1752699170cyclictest4592sleep1023:55:112
1752699170cyclictest38352sleep1023:15:062
1752699170cyclictest325952sleep1000:37:152
1752699170cyclictest322842chrt23:53:232
1752699170cyclictest322842chrt23:53:232
1752699170cyclictest319612sleep1022:25:012
1752699170cyclictest310742sleep1019:25:182
1752699170cyclictest310412chrt21:39:322
1752699170cyclictest306842sleep1020:10:082
1752699170cyclictest3066350irq/52-eth0-rx-22:21:102
1752699170cyclictest3066350irq/52-eth0-rx-20:15:292
1752699170cyclictest3066350irq/52-eth0-rx-20:15:292
1752699170cyclictest3066350irq/52-eth0-rx-19:35:222
1752699170cyclictest3066350irq/52-eth0-rx-00:25:282
1752699170cyclictest289602sleep1000:32:152
1752699170cyclictest289152sleep1023:05:062
1752699170cyclictest281272sleep1023:01:162
1752699170cyclictest274542sleep1020:50:022
1752699170cyclictest274542sleep1020:50:022
1752699170cyclictest248402chrt22:15:122
1752699170cyclictest241652sleep1022:13:002
1752699170cyclictest235032sleep1021:25:422
1752699170cyclictest225112sleep1019:15:152
1752699170cyclictest219852sleep1020:40:252
1752699170cyclictest219852sleep1020:40:252
1752699170cyclictest21802sleep1021:43:332
1752699170cyclictest199472sleep1019:10:272
1752699170cyclictest157632sleep1020:31:362
1752699170cyclictest138222sleep1022:00:102
1752699170cyclictest126012sleep1021:11:172
1752699170cyclictest123542sleep1020:29:472
1752699170cyclictest12250irq/42-ahci22:45:332
1752699170cyclictest12250irq/42-ahci21:15:092
1752699170cyclictest12250irq/42-ahci21:08:362
1752699170cyclictest115072chrt00:10:112
1752699170cyclictest101762sleep1021:55:092
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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