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2026-05-09 - 20:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Sat May 09, 2026 12:46:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501140irq/53-eth0-rx-0-21swapper/207:09:184
9918501140irq/53-eth0-rx-0-21swapper/207:09:174
8795210492sleep10-21swapper/107:07:421
8795210492sleep10-21swapper/107:07:411
9918501000irq/53-eth0-rx-0-21swapper/807:07:5810
9918501000irq/53-eth0-rx-0-21swapper/807:07:5710
991850960irq/53-eth0-rx-0-21swapper/407:06:526
991850960irq/53-eth0-rx-0-21swapper/407:06:516
991850940irq/53-eth0-rx-0-21swapper/707:08:289
991850940irq/53-eth0-rx-0-21swapper/707:08:279
991850940irq/53-eth0-rx-0-21swapper/307:08:175
991850940irq/53-eth0-rx-0-21swapper/307:08:165
882928878sleep50-21swapper/507:08:097
882928878sleep50-21swapper/507:08:097
991850780irq/53-eth0-rx-0-21swapper/1107:05:163
991850780irq/53-eth0-rx-0-21swapper/1107:05:153
882027060sleep90-21swapper/907:08:0111
882027060sleep90-21swapper/907:08:0111
865026657sleep100-21swapper/1007:05:502
865026657sleep100-21swapper/1007:05:502
872425955sleep60-21swapper/607:06:478
872425955sleep60-21swapper/607:06:468
871825853sleep00-21swapper/007:06:410
871825853sleep00-21swapper/007:06:400
916799340cyclictest0-21swapper/1110:09:143
916799310cyclictest0-21swapper/1108:20:013
913699310cyclictest12660-21chrt07:13:520
916799290cyclictest29190-21taskset08:20:003
913699290cyclictest0-21swapper/008:19:570
9167992710cyclictest3208-21chrt08:25:243
9157992411cyclictest17247-21snmp_rack3slot908:00:235
9136992220cyclictest0-21swapper/008:26:150
916799210cyclictest0-21swapper/1111:05:003
9161992115cyclictest6908-21qemu-kvm10:35:137
9161992114cyclictest18410-21ssh11:10:437
916699192cyclictest991850irq/53-eth0-rx-12:33:552
916699192cyclictest991850irq/53-eth0-rx-09:39:542
916599192cyclictest0-21swapper/912:04:4211
916599192cyclictest0-21swapper/911:36:2711
916599192cyclictest0-21swapper/910:26:2511
916599192cyclictest0-21swapper/909:22:2811
9161991918cyclictest991850irq/53-eth0-rx-09:16:077
9161991918cyclictest991850irq/53-eth0-rx-09:16:067
9166991816cyclictest25193-1kworker/10:0H12:25:522
9166991816cyclictest25193-1kworker/10:0H12:25:512
916699181cyclictest991950irq/54-eth0-tx-09:26:052
916699181cyclictest991850irq/53-eth0-rx-12:37:302
916699181cyclictest991850irq/53-eth0-rx-12:24:262
916699181cyclictest991850irq/53-eth0-rx-11:53:292
916699181cyclictest991850irq/53-eth0-rx-11:15:462
916699181cyclictest991850irq/53-eth0-rx-09:46:012
916699181cyclictest991850irq/53-eth0-rx-09:42:072
916699181cyclictest991850irq/53-eth0-rx-09:14:092
916699181cyclictest831ksoftirqd/1010:20:142
916699181cyclictest292622chrt09:31:432
916699181cyclictest292622chrt09:31:432
916699180cyclictest991850irq/53-eth0-rx-09:19:522
916699180cyclictest991850irq/53-eth0-rx-09:19:512
916599181cyclictest6770-1kworker/9:0H10:14:5211
916599181cyclictest0-21swapper/911:53:2711
916599181cyclictest0-21swapper/911:40:3211
916599181cyclictest0-21swapper/910:21:3711
916599181cyclictest0-21swapper/910:16:3911
916599181cyclictest0-21swapper/909:25:4411
916599181cyclictest0-21swapper/908:15:2011
9162991817cyclictest8877-21qemu-kvm07:23:008
9162991816cyclictest8876-21qemu-kvm07:14:098
9162991816cyclictest6909-21qemu-kvm10:20:128
9162991816cyclictest6908-21qemu-kvm10:39:428
9136991816cyclictest0-21swapper/010:20:020
9167991716cyclictest25183-21kworker/11:210:20:023
916799170cyclictest12671-21chrt07:14:043
9166991716cyclictest831ksoftirqd/1010:25:142
916699170cyclictest99572sleep1010:37:272
916699170cyclictest991850irq/53-eth0-rx-12:10:022
916699170cyclictest991850irq/53-eth0-rx-12:00:222
916699170cyclictest991850irq/53-eth0-rx-11:55:082
916699170cyclictest991850irq/53-eth0-rx-11:40:062
916699170cyclictest991850irq/53-eth0-rx-11:35:402
916699170cyclictest991850irq/53-eth0-rx-10:00:192
916699170cyclictest991850irq/53-eth0-rx-09:55:592
916699170cyclictest991850irq/53-eth0-rx-09:07:532
916699170cyclictest991850irq/53-eth0-rx-08:00:202
916699170cyclictest991850irq/53-eth0-rx-07:52:502
916699170cyclictest991850irq/53-eth0-rx-07:45:192
916699170cyclictest991850irq/53-eth0-rx-07:40:282
916699170cyclictest85162chrt10:10:112
916699170cyclictest831ksoftirqd/1011:30:132
916699170cyclictest831ksoftirqd/1011:00:232
916699170cyclictest831ksoftirqd/1010:40:142
916699170cyclictest831ksoftirqd/1009:50:112
916699170cyclictest831ksoftirqd/1008:50:112
916699170cyclictest831ksoftirqd/1007:25:122
916699170cyclictest831ksoftirqd/1007:10:022
916699170cyclictest811rcuc/1011:05:122
916699170cyclictest77652chrt08:34:472
916699170cyclictest48522sleep1010:34:032
916699170cyclictest48012chrt10:05:232
916699170cyclictest38962sleep1008:26:472
916699170cyclictest37442sleep1011:25:332
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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