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2026-08-25 - 14:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Tue Aug 25, 2026 12:46:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549501190irq/53-eth0-rx-0-21swapper/207:05:134
30549501170irq/53-eth0-rx-0-21swapper/107:09:341
30549501140irq/53-eth0-rx-0-21swapper/807:09:2910
2491210995sleep100-21swapper/1007:07:122
30549501000irq/53-eth0-rx-0-21swapper/707:09:049
3054950970irq/53-eth0-rx-0-21swapper/407:06:016
3054950940irq/53-eth0-rx-0-21swapper/307:08:065
250428978sleep90-21swapper/907:07:2311
3054950870irq/53-eth0-rx-0-21swapper/507:05:577
3054950660irq/53-eth0-rx-0-21swapper/1107:06:263
238226553sleep60-21swapper/607:05:558
240825955sleep00-21swapper/007:06:130
2874993331cyclictest0-21swapper/007:20:000
2930993011cyclictest0-21swapper/1107:14:013
293099290cyclictest0-21swapper/1107:15:083
3054950280irq/53-eth0-rx-0-21swapper/707:19:129
2874992726cyclictest0-21swapper/007:20:040
293099249cyclictest3055050irq/54-eth0-tx-09:16:503
2930992221cyclictest3054950irq/53-eth0-rx-07:20:063
2930992120cyclictest0-21swapper/1109:14:003
293099210cyclictest0-21swapper/1108:13:493
292999214cyclictest831ksoftirqd/1009:00:132
292999192cyclictest831ksoftirqd/1008:50:162
292999192cyclictest3054950irq/53-eth0-rx-11:19:582
292999192cyclictest3054950irq/53-eth0-rx-10:39:312
292899192cyclictest0-21swapper/912:10:0611
292899192cyclictest0-21swapper/910:14:1011
292899192cyclictest0-21swapper/909:50:3311
292899192cyclictest0-21swapper/909:49:5811
3055050180irq/54-eth0-tx-0-21swapper/009:30:130
2929991817cyclictest0-21swapper/1009:52:112
2929991817cyclictest0-21swapper/1009:26:382
292999181cyclictest831ksoftirqd/1007:50:242
292999181cyclictest3055050irq/54-eth0-tx-11:05:462
292999181cyclictest3055050irq/54-eth0-tx-10:45:062
292999181cyclictest3055050irq/54-eth0-tx-10:45:062
292999181cyclictest3055050irq/54-eth0-tx-10:42:252
292999181cyclictest3055050irq/54-eth0-tx-09:40:142
292999181cyclictest3055050irq/54-eth0-tx-08:30:092
292999181cyclictest3054950irq/53-eth0-rx-12:28:402
292999181cyclictest3054950irq/53-eth0-rx-12:09:252
292999181cyclictest3054950irq/53-eth0-rx-11:53:292
292999181cyclictest3054950irq/53-eth0-rx-09:36:202
292999181cyclictest3054950irq/53-eth0-rx-09:34:022
292999181cyclictest3054950irq/53-eth0-rx-09:23:272
292999181cyclictest227002sleep1008:16:302
292899181cyclictest6624-1kworker/9:1H10:15:1311
292899181cyclictest6624-1kworker/9:1H09:14:5911
292899181cyclictest3055050irq/54-eth0-tx-11:24:3111
292899181cyclictest3054950irq/53-eth0-rx-12:19:0711
292899181cyclictest29039-21ssh11:45:4511
292899181cyclictest0-21swapper/912:08:2611
292899181cyclictest0-21swapper/911:30:4311
292899181cyclictest0-21swapper/911:15:5511
292899181cyclictest0-21swapper/910:50:4211
292899181cyclictest0-21swapper/910:41:2211
292899181cyclictest0-21swapper/910:30:1211
292899181cyclictest0-21swapper/910:29:4311
292899181cyclictest0-21swapper/910:29:4211
292899181cyclictest0-21swapper/910:20:4811
292899181cyclictest0-21swapper/909:19:5111
292899181cyclictest0-21swapper/908:08:0811
292899181cyclictest0-21swapper/907:35:1311
2920991816cyclictest3636-21qemu-kvm10:35:388
2929991716cyclictest32527-21cat07:45:252
2929991716cyclictest14633-21timerandwakeup12:00:262
2929991716cyclictest0-21swapper/1007:40:152
292999170cyclictest95412sleep1011:56:472
292999170cyclictest86002sleep1008:41:332
292999170cyclictest831ksoftirqd/1008:57:002
292999170cyclictest82872sleep1007:59:542
292999170cyclictest811rcuc/1012:15:002
292999170cyclictest62032chrt07:10:472
292999170cyclictest49272sleep1008:36:082
292999170cyclictest323342sleep1010:30:222
292999170cyclictest3055050irq/54-eth0-tx-12:30:432
292999170cyclictest3055050irq/54-eth0-tx-11:48:142
292999170cyclictest3055050irq/54-eth0-tx-11:02:122
292999170cyclictest3055050irq/54-eth0-tx-11:02:112
292999170cyclictest3054950irq/53-eth0-rx-12:35:042
292999170cyclictest3054950irq/53-eth0-rx-12:21:372
292999170cyclictest3054950irq/53-eth0-rx-11:40:182
292999170cyclictest3054950irq/53-eth0-rx-11:35:382
292999170cyclictest3054950irq/53-eth0-rx-11:30:412
292999170cyclictest3054950irq/53-eth0-rx-11:25:112
292999170cyclictest3054950irq/53-eth0-rx-11:20:412
292999170cyclictest3054950irq/53-eth0-rx-11:12:382
292999170cyclictest3054950irq/53-eth0-rx-11:12:372
292999170cyclictest3054950irq/53-eth0-rx-10:25:422
292999170cyclictest3054950irq/53-eth0-rx-10:25:412
292999170cyclictest3054950irq/53-eth0-rx-10:15:362
292999170cyclictest3054950irq/53-eth0-rx-10:10:132
292999170cyclictest3054950irq/53-eth0-rx-09:45:162
292999170cyclictest3054950irq/53-eth0-rx-09:10:042
292999170cyclictest3054950irq/53-eth0-rx-07:15:222
292999170cyclictest300702sleep1008:27:312
292999170cyclictest285332sleep1010:55:012
292999170cyclictest28182sleep1010:06:552
292999170cyclictest269522sleep1009:07:482
292999170cyclictest263362sleep1008:21:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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