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2026-07-19 - 02:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Sun Jul 19, 2026 00:46:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
122501110irq/42-ahci0-21swapper/119:09:441
269952110105sleep20-21swapper/219:09:424
26777210894sleep40-21swapper/419:07:316
30549501070irq/53-eth0-rx-0-21swapper/719:09:079
26814210390sleep110-21swapper/1119:08:023
3055050990irq/54-eth0-tx-0-21swapper/319:08:315
2698829691sleep90-21swapper/919:09:3611
3054950860irq/53-eth0-rx-0-21swapper/819:07:0710
2667726353sleep60-21swapper/619:06:218
2664026353sleep100-21swapper/1019:05:492
2662926056sleep00-21swapper/019:05:400
2682125955sleep50-21swapper/519:08:087
27118994514cyclictest0-21swapper/021:17:230
27118994514cyclictest0-21swapper/021:17:220
27160993029cyclictest3054950irq/53-eth0-rx-22:10:433
27160993011cyclictest0-21swapper/1121:12:423
2715999192cyclictest3054950irq/53-eth0-rx-22:29:582
2715999192cyclictest3054950irq/53-eth0-rx-22:11:592
2715899192cyclictest0-21swapper/922:53:1911
2715899192cyclictest0-21swapper/922:17:3711
2715699195cyclictest0-21swapper/723:35:219
2711899193cyclictest0-21swapper/022:19:140
27160991817cyclictest0-21swapper/1119:29:193
27159991817cyclictest19221-21fschecks_count21:35:142
27159991817cyclictest0-21swapper/1023:47:002
27159991817cyclictest0-21swapper/1022:50:272
27159991817cyclictest0-21swapper/1021:56:422
27159991817cyclictest0-21swapper/1021:43:082
27159991817cyclictest0-21swapper/1021:31:012
27159991817cyclictest0-21swapper/1021:31:012
27159991817cyclictest0-21swapper/1000:15:482
27159991817cyclictest0-21swapper/1000:00:212
2715999181cyclictest88982sleep1021:25:422
2715999181cyclictest88982sleep1021:25:412
2715999181cyclictest3055050irq/54-eth0-tx-23:57:552
2715999181cyclictest3055050irq/54-eth0-tx-23:28:472
2715999181cyclictest3055050irq/54-eth0-tx-22:56:012
2715999181cyclictest3055050irq/54-eth0-tx-22:37:292
2715999181cyclictest3055050irq/54-eth0-tx-22:07:342
2715999181cyclictest3055050irq/54-eth0-tx-21:22:272
2715999181cyclictest3054950irq/53-eth0-rx-23:35:032
2715999181cyclictest3054950irq/53-eth0-rx-23:30:142
2715999181cyclictest3054950irq/53-eth0-rx-23:13:012
2715999181cyclictest3054950irq/53-eth0-rx-23:09:542
2715999181cyclictest3054950irq/53-eth0-rx-23:03:572
2715999181cyclictest3054950irq/53-eth0-rx-22:40:082
2715999181cyclictest3054950irq/53-eth0-rx-22:33:282
2715999181cyclictest3054950irq/53-eth0-rx-19:13:452
2715999181cyclictest3054950irq/53-eth0-rx-00:31:142
2715999181cyclictest3054950irq/53-eth0-rx-00:31:132
2715999181cyclictest3054950irq/53-eth0-rx-00:25:082
2715999181cyclictest3054950irq/53-eth0-rx-00:20:572
2715999181cyclictest3054950irq/53-eth0-rx-00:20:562
2715999181cyclictest3054950irq/53-eth0-rx-00:07:092
2715899181cyclictest429-21kworker/9:221:28:0211
2715899181cyclictest429-21kworker/9:221:28:0111
2715899181cyclictest3055050irq/54-eth0-tx-23:33:1611
2715899181cyclictest3054950irq/53-eth0-rx-22:59:2711
2715899181cyclictest21110-21ssh22:02:4011
2715899181cyclictest19255-21tune2fs21:35:1411
2715899181cyclictest12250irq/42-ahci23:35:2611
2715899181cyclictest0-21swapper/923:58:0811
2715899181cyclictest0-21swapper/923:46:1311
2715899181cyclictest0-21swapper/923:44:1111
2715899181cyclictest0-21swapper/923:25:1211
2715899181cyclictest0-21swapper/923:19:4411
2715899181cyclictest0-21swapper/923:11:3411
2715899181cyclictest0-21swapper/923:00:2911
2715899181cyclictest0-21swapper/922:47:1611
2715899181cyclictest0-21swapper/922:40:5611
2715899181cyclictest0-21swapper/922:38:1311
2715899181cyclictest0-21swapper/922:25:5111
2715899181cyclictest0-21swapper/922:24:2511
2715899181cyclictest0-21swapper/922:12:5911
2715899181cyclictest0-21swapper/921:56:0011
2715899181cyclictest0-21swapper/921:46:2211
2715899181cyclictest0-21swapper/921:18:1211
2715899181cyclictest0-21swapper/921:18:1111
2715899181cyclictest0-21swapper/921:10:0611
2715899181cyclictest0-21swapper/900:33:4811
2715899181cyclictest0-21swapper/900:33:4711
2715899181cyclictest0-21swapper/900:21:1011
2715899181cyclictest0-21swapper/900:21:0911
2715899181cyclictest0-21swapper/900:18:1211
2715899181cyclictest0-21swapper/900:04:2611
27118991816cyclictest10682-21chrt21:28:430
27118991816cyclictest10682-21chrt21:28:420
2711899180cyclictest0-21swapper/020:08:170
27159991716cyclictest15799-1kworker/10:2H19:31:592
27159991716cyclictest0-21swapper/1000:36:092
2715999170cyclictest811rcuc/1021:00:112
2715999170cyclictest41902sleep1020:48:012
2715999170cyclictest34612sleep1020:00:432
2715999170cyclictest3282sleep1020:41:472
2715999170cyclictest322512sleep1019:56:542
2715999170cyclictest31582sleep1019:17:492
2715999170cyclictest3055050irq/54-eth0-tx-22:16:522
2715999170cyclictest3055050irq/54-eth0-tx-21:50:032
2715999170cyclictest3054950irq/53-eth0-rx-23:50:292
2715999170cyclictest3054950irq/53-eth0-rx-23:40:342
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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