You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-15 - 13:43
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Sun Feb 15, 2026 12:46:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501140irq/53-eth0-rx-0-21swapper/207:08:254
9918501120irq/53-eth0-rx-0-21swapper/107:09:091
25078210893sleep70-21swapper/707:05:569
25061210794sleep40-21swapper/407:05:406
9918501030irq/53-eth0-rx-0-21swapper/307:09:085
2538829690sleep100-21swapper/1007:09:102
991850880irq/53-eth0-rx-0-21swapper/507:07:087
2434528775sleep110-21swapper/1107:05:233
172450840irq/56-eth1-rx-0-21swapper/807:09:5310
2511226755sleep60-21swapper/607:06:188
2523426553sleep90-21swapper/907:07:5711
2510525753sleep00-21swapper/007:06:130
25551993517cyclictest0-21swapper/007:13:450
25551993213cyclictest0-21swapper/009:15:120
25551993129cyclictest0-21swapper/009:21:580
2559399290cyclictest0-21swapper/1107:12:253
2555199278cyclictest0-21swapper/008:22:420
25570992120cyclictest2367-21lldpd08:22:454
2556299210cyclictest0-21swapper/109:18:471
2558799204cyclictest0-21swapper/510:25:177
25551992018cyclictest0-21swapper/010:08:230
25593991917cyclictest0-21swapper/1110:08:243
2559299192cyclictest991850irq/53-eth0-rx-12:16:202
2559199192cyclictest0-21swapper/911:49:1711
2559199192cyclictest0-21swapper/910:25:1511
2559199192cyclictest0-21swapper/909:56:0911
2559199192cyclictest0-21swapper/907:20:1011
25592991817cyclictest31194-21kworker/10:210:36:102
25592991817cyclictest0-21swapper/1011:35:502
25592991817cyclictest0-21swapper/1011:16:172
25592991817cyclictest0-21swapper/1010:11:082
25592991817cyclictest0-21swapper/1010:06:372
2559299181cyclictest991950irq/54-eth0-tx-10:48:102
2559299181cyclictest991950irq/54-eth0-tx-09:32:382
2559299181cyclictest991850irq/53-eth0-rx-12:35:252
2559299181cyclictest991850irq/53-eth0-rx-12:35:242
2559299181cyclictest991850irq/53-eth0-rx-12:33:072
2559299181cyclictest991850irq/53-eth0-rx-12:02:162
2559299181cyclictest991850irq/53-eth0-rx-11:58:152
2559299181cyclictest991850irq/53-eth0-rx-11:40:272
2559299181cyclictest991850irq/53-eth0-rx-11:28:232
2559299181cyclictest991850irq/53-eth0-rx-11:13:552
2559299181cyclictest991850irq/53-eth0-rx-10:30:572
2559299181cyclictest991850irq/53-eth0-rx-10:25:492
2559299181cyclictest991850irq/53-eth0-rx-10:21:472
2559299181cyclictest991850irq/53-eth0-rx-09:53:582
2559299181cyclictest991850irq/53-eth0-rx-09:53:582
2559299181cyclictest991850irq/53-eth0-rx-09:41:572
2559299181cyclictest991850irq/53-eth0-rx-09:41:562
2559299181cyclictest991850irq/53-eth0-rx-09:18:032
2559299181cyclictest991850irq/53-eth0-rx-07:35:082
2559299181cyclictest12850irq/42-ahci09:25:462
2559299181cyclictest12850irq/42-ahci09:25:452
2559299181cyclictest12850irq/42-ahci08:47:582
2559199181cyclictest0-21swapper/909:18:5211
2559199181cyclictest0-21swapper/907:55:1511
2556299180cyclictest0-21swapper/110:34:251
25551991817cyclictest991850irq/53-eth0-rx-08:26:410
25551991814cyclictest991850irq/53-eth0-rx-09:13:180
25593991716cyclictest12850irq/42-ahci09:30:163
25592991716cyclictest31194-21kworker/10:208:40:142
25592991716cyclictest0-21swapper/1010:15:342
2559299170cyclictest991950irq/54-eth0-tx-12:20:042
2559299170cyclictest991850irq/53-eth0-rx-12:26:172
2559299170cyclictest991850irq/53-eth0-rx-12:11:042
2559299170cyclictest991850irq/53-eth0-rx-11:50:202
2559299170cyclictest991850irq/53-eth0-rx-11:45:012
2559299170cyclictest991850irq/53-eth0-rx-11:20:012
2559299170cyclictest991850irq/53-eth0-rx-11:05:062
2559299170cyclictest991850irq/53-eth0-rx-10:55:472
2559299170cyclictest991850irq/53-eth0-rx-10:50:012
2559299170cyclictest991850irq/53-eth0-rx-10:01:172
2559299170cyclictest991850irq/53-eth0-rx-09:55:322
2559299170cyclictest991850irq/53-eth0-rx-09:45:012
2559299170cyclictest991850irq/53-eth0-rx-09:35:202
2559299170cyclictest991850irq/53-eth0-rx-09:35:192
2559299170cyclictest991850irq/53-eth0-rx-09:10:092
2559299170cyclictest991850irq/53-eth0-rx-08:16:292
2559299170cyclictest991850irq/53-eth0-rx-08:10:052
2559299170cyclictest991850irq/53-eth0-rx-07:50:222
2559299170cyclictest991850irq/53-eth0-rx-07:30:212
2559299170cyclictest991850irq/53-eth0-rx-07:25:322
2559299170cyclictest991850irq/53-eth0-rx-07:15:252
2559299170cyclictest991850irq/53-eth0-rx-07:10:232
2559299170cyclictest97282sleep1008:55:572
2559299170cyclictest61272sleep1008:51:222
2559299170cyclictest56052sleep1008:06:272
2559299170cyclictest51152sleep1007:21:232
2559299170cyclictest307332sleep1007:57:392
2559299170cyclictest279782sleep1010:40:102
2559299170cyclictest276852sleep1008:38:072
2559299170cyclictest254972sleep1011:30:282
2559299170cyclictest239822sleep1008:32:302
2559299170cyclictest233552sleep1007:46:372
2559299170cyclictest225782sleep1011:01:012
2559299170cyclictest196852sleep1007:41:132
2559299170cyclictest190052chrt08:25:192
2559299170cyclictest17762chrt08:00:282
2559299170cyclictest171842sleep1009:07:352
2559299170cyclictest165392sleep1008:20:302
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional