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2026-07-30 - 01:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Wed Jul 29, 2026 12:46:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549501050irq/53-eth0-rx-0-21swapper/307:08:595
3054950980irq/53-eth0-rx-0-21swapper/407:05:226
3054950950irq/53-eth0-rx-0-21swapper/207:05:174
12250950irq/42-ahci0-21swapper/107:08:101
12250920irq/42-ahci0-21swapper/707:08:289
3054950890irq/53-eth0-rx-0-21swapper/807:06:3810
3054950890irq/53-eth0-rx-0-21swapper/1107:05:123
12250750irq/42-ahci0-21swapper/507:06:057
3054950730irq/53-eth0-rx-0-21swapper/907:06:4611
1847426960sleep00-21swapper/007:06:260
1856026655sleep60-21swapper/607:07:328
1562126553sleep100-21swapper/1007:05:112
1890899330cyclictest0-21swapper/009:18:070
18937993225cyclictest3054950irq/53-eth0-rx-09:18:0511
1890899320cyclictest0-21swapper/008:20:080
18927993130cyclictest2185-21hald09:17:574
1890899310cyclictest0-21swapper/008:19:590
18935993029cyclictest3054950irq/53-eth0-rx-09:17:579
18931992928cyclictest3054950irq/53-eth0-rx-09:17:545
18920992928cyclictest3055050irq/54-eth0-tx-09:18:101
18908992519cyclictest0-21swapper/007:15:010
18944992423cyclictest3054950irq/53-eth0-rx-09:18:123
18933992423cyclictest10634-21qemu-kvm09:18:127
18938992322cyclictest3054950irq/53-eth0-rx-09:18:072
18908992216cyclictest0-21swapper/009:08:230
18908992216cyclictest0-21swapper/009:08:230
18944992120cyclictest0-21swapper/1110:15:533
1893199200cyclictest0-21swapper/309:12:465
1893199200cyclictest0-21swapper/309:12:455
1893899192cyclictest3054950irq/53-eth0-rx-12:16:272
1893799192cyclictest0-21swapper/911:49:1511
1893799192cyclictest0-21swapper/909:45:4011
18932991913cyclictest3055050irq/54-eth0-tx-09:18:016
18944991816cyclictest0-21swapper/1109:08:233
18944991816cyclictest0-21swapper/1109:08:233
18938991817cyclictest0-21swapper/1012:03:042
1893899181cyclictest3055050irq/54-eth0-tx-12:05:202
1893899181cyclictest3054950irq/53-eth0-rx-12:33:432
1893899181cyclictest3054950irq/53-eth0-rx-12:33:432
1893899181cyclictest3054950irq/53-eth0-rx-11:46:422
1893899181cyclictest3054950irq/53-eth0-rx-10:22:492
1893899181cyclictest3054950irq/53-eth0-rx-10:17:422
1893899181cyclictest3054950irq/53-eth0-rx-10:01:442
1893899181cyclictest3054950irq/53-eth0-rx-09:43:402
1893899181cyclictest3054950irq/53-eth0-rx-09:43:392
1893899181cyclictest3054950irq/53-eth0-rx-09:34:332
1893899181cyclictest3054950irq/53-eth0-rx-09:34:332
1893899181cyclictest3054950irq/53-eth0-rx-09:26:002
1893899181cyclictest3054950irq/53-eth0-rx-09:26:002
1893899181cyclictest266622chrt11:58:462
1893899180cyclictest0-21swapper/1011:37:442
18937991816cyclictest9611-21ssh10:51:3511
1893799181cyclictest2240-40kipmi010:37:5011
1893799181cyclictest0-21swapper/912:12:0511
1893799181cyclictest0-21swapper/911:24:5411
1893799181cyclictest0-21swapper/911:05:4711
1893799181cyclictest0-21swapper/910:29:2811
1893799181cyclictest0-21swapper/910:19:4111
1893799181cyclictest0-21swapper/910:08:3111
1893799181cyclictest0-21swapper/910:00:2711
1893799181cyclictest0-21swapper/909:42:4111
1893799181cyclictest0-21swapper/909:42:4111
1893799181cyclictest0-21swapper/909:39:4811
1893799181cyclictest0-21swapper/909:23:4511
1893399180cyclictest0-21swapper/511:37:447
18908991817cyclictest0-21swapper/009:12:420
18908991817cyclictest0-21swapper/009:12:420
1890899180cyclictest0-21swapper/008:08:180
3054950170irq/53-eth0-rx-10640-21qemu-kvm09:17:548
3054950170irq/53-eth0-rx-0-21swapper/709:12:429
3054950170irq/53-eth0-rx-0-21swapper/709:12:429
18938991716cyclictest0-21swapper/1011:40:562
1893899170cyclictest88982sleep1008:20:202
1893899170cyclictest79142sleep1012:35:142
1893899170cyclictest318142sleep1008:51:112
1893899170cyclictest30932sleep1008:56:002
1893899170cyclictest307712chrt11:10:042
1893899170cyclictest3055050irq/54-eth0-tx-11:20:512
1893899170cyclictest3055050irq/54-eth0-tx-10:36:172
1893899170cyclictest3054950irq/53-eth0-rx-12:20:172
1893899170cyclictest3054950irq/53-eth0-rx-12:10:262
1893899170cyclictest3054950irq/53-eth0-rx-11:50:162
1893899170cyclictest3054950irq/53-eth0-rx-11:31:312
1893899170cyclictest3054950irq/53-eth0-rx-11:26:482
1893899170cyclictest3054950irq/53-eth0-rx-11:15:592
1893899170cyclictest3054950irq/53-eth0-rx-11:05:542
1893899170cyclictest3054950irq/53-eth0-rx-11:00:232
1893899170cyclictest3054950irq/53-eth0-rx-10:55:032
1893899170cyclictest3054950irq/53-eth0-rx-10:50:302
1893899170cyclictest3054950irq/53-eth0-rx-10:45:212
1893899170cyclictest3054950irq/53-eth0-rx-10:40:152
1893899170cyclictest3054950irq/53-eth0-rx-10:31:172
1893899170cyclictest3054950irq/53-eth0-rx-10:25:062
1893899170cyclictest3054950irq/53-eth0-rx-09:55:292
1893899170cyclictest3054950irq/53-eth0-rx-09:50:072
1893899170cyclictest3054950irq/53-eth0-rx-09:35:372
1893899170cyclictest3054950irq/53-eth0-rx-09:20:212
1893899170cyclictest3054950irq/53-eth0-rx-09:10:292
1893899170cyclictest3054950irq/53-eth0-rx-09:10:292
1893899170cyclictest3054950irq/53-eth0-rx-09:00:362
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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