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2026-07-05 - 01:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Sat Jul 04, 2026 12:46:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549501020irq/53-eth0-rx-0-21swapper/707:09:149
122501010irq/42-ahci0-21swapper/107:08:151
12250990irq/42-ahci0-21swapper/207:08:444
3055050930irq/54-eth0-tx-0-21swapper/807:05:1910
3054950910irq/53-eth0-rx-0-21swapper/307:05:095
3054950900irq/53-eth0-rx-0-21swapper/407:07:496
3054950880irq/53-eth0-rx-0-21swapper/1107:05:433
3054950830irq/53-eth0-rx-0-21swapper/507:05:277
1464228273sleep90-21swapper/907:06:4911
1459726653sleep00-21swapper/007:06:160
1456326553sleep100-21swapper/1007:05:512
1461826353sleep60-21swapper/607:06:358
15080993314cyclictest0-21swapper/1109:24:423
15080993314cyclictest0-21swapper/1109:24:413
1508099320cyclictest0-21swapper/1108:13:563
1507999269cyclictest831ksoftirqd/1012:35:492
1507999269cyclictest831ksoftirqd/1009:50:272
1507999258cyclictest831ksoftirqd/1009:19:002
1507999258cyclictest831ksoftirqd/1009:18:592
15042992214cyclictest0-21swapper/007:20:030
15080992120cyclictest0-21swapper/1107:19:593
1507999203cyclictest831ksoftirqd/1011:30:182
15079992010cyclictest831ksoftirqd/1008:50:202
15080991917cyclictest6930-21chrt09:09:293
15080991917cyclictest30349-21chrt09:29:063
1507999192cyclictest3054950irq/53-eth0-rx-11:44:292
1507999192cyclictest3054950irq/53-eth0-rx-10:29:402
1507999192cyclictest3054950irq/53-eth0-rx-09:59:132
1504299193cyclictest0-21swapper/009:24:380
1504299193cyclictest0-21swapper/009:24:370
15042991914cyclictest0-21swapper/007:20:000
15079991817cyclictest0-21swapper/1010:43:522
15079991817cyclictest0-21swapper/1010:13:122
15079991817cyclictest0-21swapper/1010:01:012
1507999181cyclictest831ksoftirqd/1011:10:532
1507999181cyclictest831ksoftirqd/1010:50:222
1507999181cyclictest831ksoftirqd/1007:35:112
1507999181cyclictest831ksoftirqd/1007:10:132
1507999181cyclictest3055050irq/54-eth0-tx-10:48:012
1507999181cyclictest3055050irq/54-eth0-tx-10:15:072
1507999181cyclictest3054950irq/53-eth0-rx-12:22:482
1507999181cyclictest3054950irq/53-eth0-rx-10:32:002
1507999181cyclictest12250irq/42-ahci08:10:152
15060991816cyclictest2305-21snmpd10:22:324
1504299180cyclictest0-21swapper/008:14:310
15080991716cyclictest12250irq/42-ahci10:10:263
15079991716cyclictest831ksoftirqd/1012:10:272
15079991716cyclictest831ksoftirqd/1009:25:142
15079991716cyclictest30337-1kworker/10:0H09:37:452
15079991716cyclictest26889-21grep11:15:132
15079991716cyclictest21160-21iostat_ios09:20:182
15079991716cyclictest21160-21iostat_ios09:20:172
15079991716cyclictest0-21swapper/1011:05:182
15079991716cyclictest0-21swapper/1008:00:252
15079991716cyclictest0-21swapper/1007:45:012
1507999170cyclictest831ksoftirqd/1012:25:142
1507999170cyclictest831ksoftirqd/1012:25:132
1507999170cyclictest831ksoftirqd/1011:22:152
1507999170cyclictest831ksoftirqd/1010:06:072
1507999170cyclictest831ksoftirqd/1008:30:112
1507999170cyclictest831ksoftirqd/1008:20:022
1507999170cyclictest831ksoftirqd/1007:50:142
1507999170cyclictest79612sleep1007:40:192
1507999170cyclictest59072chrt11:25:072
1507999170cyclictest37842sleep1009:05:042
1507999170cyclictest31842chrt09:03:502
1507999170cyclictest3055050irq/54-eth0-tx-12:15:282
1507999170cyclictest3055050irq/54-eth0-tx-12:15:282
1507999170cyclictest3055050irq/54-eth0-tx-10:35:052
1507999170cyclictest3054950irq/53-eth0-rx-12:00:172
1507999170cyclictest3054950irq/53-eth0-rx-11:55:152
1507999170cyclictest3054950irq/53-eth0-rx-11:51:552
1507999170cyclictest3054950irq/53-eth0-rx-11:35:012
1507999170cyclictest3054950irq/53-eth0-rx-11:02:432
1507999170cyclictest3054950irq/53-eth0-rx-10:58:592
1507999170cyclictest3054950irq/53-eth0-rx-10:20:112
1507999170cyclictest3054950irq/53-eth0-rx-09:45:072
1507999170cyclictest3054950irq/53-eth0-rx-09:40:222
1507999170cyclictest3054950irq/53-eth0-rx-09:31:002
1507999170cyclictest3054950irq/53-eth0-rx-09:31:002
1507999170cyclictest3054950irq/53-eth0-rx-08:56:072
1507999170cyclictest3054950irq/53-eth0-rx-08:25:312
1507999170cyclictest3054950irq/53-eth0-rx-08:15:312
1507999170cyclictest3054950irq/53-eth0-rx-07:32:072
1507999170cyclictest3054950irq/53-eth0-rx-07:28:532
1507999170cyclictest294302sleep1011:45:122
1507999170cyclictest266372sleep1008:05:202
1507999170cyclictest244792chrt08:47:492
1507999170cyclictest238322chrt12:06:012
1507999170cyclictest233822chrt07:17:152
1507999170cyclictest189062sleep1007:55:202
1507999170cyclictest170542sleep1008:36:012
1507999170cyclictest12250irq/42-ahci09:10:052
1507999170cyclictest12250irq/42-ahci07:20:102
1507999170cyclictest114150irq/18-i801_smb12:33:292
1507999170cyclictest114150irq/18-i801_smb12:33:282
1507799173cyclictest0-21swapper/808:15:1710
15077991716cyclictest19234-21smartctl08:40:1410
1507499177cyclictest14790-21qemu-kvm07:20:008
1507499172cyclictest0-21swapper/609:09:568
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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