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2026-03-03 - 01:55
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Tue Mar 03, 2026 00:46:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
128501080irq/42-ahci0-21swapper/119:08:221
12538210693sleep00-21swapper/019:08:130
9918501000irq/53-eth0-rx-0-21swapper/219:07:064
991850960irq/53-eth0-rx-0-21swapper/319:06:395
991950900irq/54-eth0-tx-0-21swapper/719:08:319
991850900irq/53-eth0-rx-0-21swapper/419:07:246
1238229079sleep110-21swapper/1119:06:483
991850890irq/53-eth0-rx-0-21swapper/819:07:4210
1236328779sleep90-21swapper/919:06:3311
991850690irq/53-eth0-rx-0-21swapper/1019:07:122
991950670irq/54-eth0-tx-0-21swapper/519:07:227
1246626052sleep60-21swapper/619:07:558
1282299300cyclictest0-21swapper/1120:20:123
1280799280cyclictest0-21swapper/200:21:574
1278599250cyclictest2279-21nscd21:11:080
1278599250cyclictest2279-21nscd21:11:070
1278599240cyclictest0-21swapper/021:05:150
1278599240cyclictest0-21swapper/021:05:150
12785992120cyclictest0-21swapper/021:28:160
1282099203cyclictest761ksoftirqd/923:57:1911
1282099203cyclictest761ksoftirqd/923:31:5511
1282099203cyclictest761ksoftirqd/923:21:1511
1282099203cyclictest761ksoftirqd/923:13:2111
1282099203cyclictest761ksoftirqd/922:57:4111
1282099203cyclictest761ksoftirqd/922:38:5611
1282099203cyclictest761ksoftirqd/922:31:0211
1282099203cyclictest761ksoftirqd/922:21:2011
1282099203cyclictest761ksoftirqd/922:01:2411
1282099203cyclictest761ksoftirqd/921:42:0111
1282099203cyclictest761ksoftirqd/921:31:5211
1282099203cyclictest761ksoftirqd/921:26:0311
1282099203cyclictest761ksoftirqd/921:10:1711
1282099203cyclictest761ksoftirqd/921:10:1611
1282099203cyclictest761ksoftirqd/921:01:3811
1282099203cyclictest761ksoftirqd/920:52:4811
1282099203cyclictest761ksoftirqd/920:36:3111
1282099203cyclictest761ksoftirqd/920:10:1711
1282099203cyclictest761ksoftirqd/920:09:4211
1282099203cyclictest761ksoftirqd/919:58:3711
1282099203cyclictest761ksoftirqd/919:41:0011
1282099203cyclictest761ksoftirqd/919:29:0811
1282099203cyclictest761ksoftirqd/919:21:2511
1282099203cyclictest761ksoftirqd/919:15:5811
1282099203cyclictest761ksoftirqd/919:11:5611
1282099203cyclictest761ksoftirqd/900:25:2611
1282099203cyclictest761ksoftirqd/900:17:3011
1282099203cyclictest761ksoftirqd/900:14:0911
1282099203cyclictest761ksoftirqd/900:07:0311
1282099203cyclictest761ksoftirqd/900:07:0211
1281399204cyclictest0-21swapper/323:02:265
1281399203cyclictest0-21swapper/323:19:545
12785992018cyclictest0-21swapper/019:35:120
1282199192cyclictest991950irq/54-eth0-tx-21:51:362
1282199192cyclictest991850irq/53-eth0-rx-23:46:462
1282199192cyclictest991850irq/53-eth0-rx-23:33:262
1282199192cyclictest991850irq/53-eth0-rx-23:03:482
1282199192cyclictest991850irq/53-eth0-rx-22:33:552
1282199192cyclictest991850irq/53-eth0-rx-22:28:122
1282199192cyclictest991850irq/53-eth0-rx-22:17:152
1282199192cyclictest991850irq/53-eth0-rx-22:07:302
1282199192cyclictest991850irq/53-eth0-rx-21:44:132
1282099192cyclictest761ksoftirqd/923:50:2511
1282099192cyclictest761ksoftirqd/923:46:0511
1282099192cyclictest761ksoftirqd/923:43:0511
1282099192cyclictest761ksoftirqd/923:36:5811
1282099192cyclictest761ksoftirqd/923:27:2111
1282099192cyclictest761ksoftirqd/923:16:2811
1282099192cyclictest761ksoftirqd/923:09:0511
1282099192cyclictest761ksoftirqd/922:50:2211
1282099192cyclictest761ksoftirqd/922:40:5211
1282099192cyclictest761ksoftirqd/922:26:4911
1282099192cyclictest761ksoftirqd/922:16:4211
1282099192cyclictest761ksoftirqd/922:11:4611
1282099192cyclictest761ksoftirqd/922:08:1611
1282099192cyclictest761ksoftirqd/921:55:2411
1282099192cyclictest761ksoftirqd/921:45:1411
1282099192cyclictest761ksoftirqd/921:20:5111
1282099192cyclictest761ksoftirqd/921:17:2311
1282099192cyclictest761ksoftirqd/920:56:3211
1282099192cyclictest761ksoftirqd/920:46:5511
1282099192cyclictest761ksoftirqd/920:46:5411
1282099192cyclictest761ksoftirqd/920:40:0811
1282099192cyclictest761ksoftirqd/920:31:0011
1282099192cyclictest761ksoftirqd/920:26:2811
1282099192cyclictest761ksoftirqd/920:20:5411
1282099192cyclictest761ksoftirqd/920:18:5511
1282099192cyclictest761ksoftirqd/920:00:3111
1282099192cyclictest761ksoftirqd/919:50:0811
1282099192cyclictest761ksoftirqd/919:47:0811
1282099192cyclictest761ksoftirqd/919:37:4511
1282099192cyclictest761ksoftirqd/919:33:1711
1282099192cyclictest761ksoftirqd/900:35:2711
1281399193cyclictest0-21swapper/323:49:345
1281399193cyclictest0-21swapper/323:25:485
1281399193cyclictest0-21swapper/323:14:315
1281399193cyclictest0-21swapper/323:07:435
1281399193cyclictest0-21swapper/322:56:565
1281399193cyclictest0-21swapper/322:35:135
1281399193cyclictest0-21swapper/322:18:435
1281399193cyclictest0-21swapper/321:56:585
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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