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2026-05-04 - 02:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Mon May 04, 2026 00:46:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
128501340irq/42-ahci0-21swapper/219:08:554
128501170irq/42-ahci0-21swapper/119:09:371
4793210895sleep90-21swapper/919:05:5811
128501030irq/42-ahci0-21swapper/819:08:3910
991850950irq/53-eth0-rx-0-21swapper/1019:05:502
991850920irq/53-eth0-rx-0-21swapper/319:06:395
12850910irq/42-ahci0-21swapper/719:08:169
991950880irq/54-eth0-tx-0-21swapper/519:05:117
991850780irq/53-eth0-rx-0-21swapper/419:06:196
14050750irq/18-ehci_hcd0-21swapper/1119:09:593
479827059sleep00-21swapper/019:06:020
490426653sleep60-21swapper/619:07:198
530999420cyclictest991850irq/53-eth0-rx-21:18:433
525899320cyclictest0-21swapper/022:15:550
530999310cyclictest20878-21taskset19:26:513
525899310cyclictest0-21swapper/021:18:330
5309992928cyclictest0-21swapper/1121:27:343
991950280irq/54-eth0-tx-0-21swapper/1021:18:352
991850280irq/53-eth0-rx-0-21swapper/921:18:3211
991850280irq/53-eth0-rx-0-21swapper/421:18:306
5309992827cyclictest991850irq/53-eth0-rx-22:12:453
5258992411cyclictest0-21swapper/022:23:180
5258992221cyclictest0-21swapper/021:27:200
5309992120cyclictest0-21swapper/1119:23:263
5309992120cyclictest0-21swapper/1119:23:253
530899210cyclictest0-21swapper/1020:10:002
5258992111cyclictest0-21swapper/019:23:160
5258992111cyclictest0-21swapper/019:23:150
991850190irq/53-eth0-rx-29407-21qemu-kvm21:18:328
530899192cyclictest991850irq/53-eth0-rx-21:40:282
530899192cyclictest991850irq/53-eth0-rx-00:26:262
530799192cyclictest0-21swapper/923:17:3011
527099190cyclictest0-21swapper/123:45:181
5309991817cyclictest244162sleep1121:30:283
5308991817cyclictest0-21swapper/1021:47:382
5308991817cyclictest0-21swapper/1021:13:172
5308991817cyclictest0-21swapper/1000:20:222
5308991816cyclictest26566-21ssh22:28:292
530899181cyclictest991850irq/53-eth0-rx-23:56:052
530899181cyclictest991850irq/53-eth0-rx-23:53:182
530899181cyclictest991850irq/53-eth0-rx-23:45:542
530899181cyclictest991850irq/53-eth0-rx-23:42:192
530899181cyclictest991850irq/53-eth0-rx-23:32:432
530899181cyclictest991850irq/53-eth0-rx-23:20:522
530899181cyclictest991850irq/53-eth0-rx-23:20:512
530899181cyclictest991850irq/53-eth0-rx-23:16:552
530899181cyclictest991850irq/53-eth0-rx-23:13:002
530899181cyclictest991850irq/53-eth0-rx-23:12:592
530899181cyclictest991850irq/53-eth0-rx-22:48:562
530899181cyclictest991850irq/53-eth0-rx-22:48:552
530899181cyclictest991850irq/53-eth0-rx-22:07:372
530899181cyclictest991850irq/53-eth0-rx-21:36:122
530899181cyclictest991850irq/53-eth0-rx-21:29:342
530899181cyclictest991850irq/53-eth0-rx-19:45:012
530899181cyclictest991850irq/53-eth0-rx-19:45:012
530899181cyclictest991850irq/53-eth0-rx-00:08:412
530899181cyclictest12850irq/42-ahci00:01:122
530899180cyclictest991850irq/53-eth0-rx-00:39:372
530799181cyclictest9020-21munin-node21:45:2011
530799181cyclictest761ksoftirqd/921:55:1111
530799181cyclictest761ksoftirqd/920:50:1511
530799181cyclictest761ksoftirqd/900:35:2011
530799181cyclictest2648-21cstates00:25:1111
530799181cyclictest16556-21munin-node21:51:4911
530799181cyclictest14749-21ssh23:12:3111
530799181cyclictest14749-21ssh23:12:3011
530799181cyclictest0-21swapper/923:58:1611
530799181cyclictest0-21swapper/923:51:4311
530799181cyclictest0-21swapper/923:49:0511
530799181cyclictest0-21swapper/923:41:4611
530799181cyclictest0-21swapper/923:39:4711
530799181cyclictest0-21swapper/923:08:5711
530799181cyclictest0-21swapper/923:02:5011
530799181cyclictest0-21swapper/922:53:3711
530799181cyclictest0-21swapper/922:43:5311
530799181cyclictest0-21swapper/922:35:0711
530799181cyclictest0-21swapper/922:22:5311
530799181cyclictest0-21swapper/922:18:4311
530799181cyclictest0-21swapper/922:13:3711
530799181cyclictest0-21swapper/922:02:4011
530799181cyclictest0-21swapper/921:44:0711
530799181cyclictest0-21swapper/921:31:1711
530799181cyclictest0-21swapper/921:29:3211
530799181cyclictest0-21swapper/921:25:0011
530799181cyclictest0-21swapper/921:10:0211
530799181cyclictest0-21swapper/921:05:5011
530799181cyclictest0-21swapper/920:26:0511
530799181cyclictest0-21swapper/920:15:0511
530799181cyclictest0-21swapper/920:13:2611
530799181cyclictest0-21swapper/919:47:0111
530799181cyclictest0-21swapper/919:47:0111
530799181cyclictest0-21swapper/919:40:2711
530799181cyclictest0-21swapper/919:40:2611
530799181cyclictest0-21swapper/919:31:1711
530799181cyclictest0-21swapper/919:25:1711
530799181cyclictest0-21swapper/919:20:3711
530799181cyclictest0-21swapper/919:20:3711
530799181cyclictest0-21swapper/919:12:4111
530799181cyclictest0-21swapper/900:12:0311
530799181cyclictest0-21swapper/900:06:5511
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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