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2026-04-24 - 19:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Fri Apr 24, 2026 12:46:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501080irq/53-eth0-rx-0-21swapper/707:08:439
9918501050irq/53-eth0-rx-0-21swapper/207:08:154
9918501040irq/53-eth0-rx-0-21swapper/107:10:001
991850980irq/53-eth0-rx-0-21swapper/407:05:596
991850900irq/53-eth0-rx-0-21swapper/807:06:3110
991850890irq/53-eth0-rx-0-21swapper/307:05:255
991850890irq/53-eth0-rx-0-21swapper/1107:05:363
1684028576sleep00-21swapper/007:05:480
991850830irq/53-eth0-rx-0-21swapper/507:07:267
12850800irq/42-ahci0-21swapper/1007:08:172
1715327670sleep90-21swapper/907:09:0911
1700126454sleep60-21swapper/607:07:548
17314992018cyclictest0-21swapper/007:26:360
1731499201cyclictest0-21swapper/009:20:150
1736299192cyclictest991850irq/53-eth0-rx-11:58:192
1736299192cyclictest991850irq/53-eth0-rx-10:50:362
1736299192cyclictest991850irq/53-eth0-rx-09:43:132
1736199192cyclictest0-21swapper/910:10:1311
1731499190cyclictest0-21swapper/009:19:140
17363991816cyclictest991850irq/53-eth0-rx-10:28:183
17362991817cyclictest0-21swapper/1011:47:532
17362991817cyclictest0-21swapper/1011:40:152
17362991817cyclictest0-21swapper/1011:33:462
17362991817cyclictest0-21swapper/1010:17:072
17362991817cyclictest0-21swapper/1009:04:392
17362991816cyclictest1978-21ssh11:15:052
1736299181cyclictest991950irq/54-eth0-tx-11:05:522
1736299181cyclictest991950irq/54-eth0-tx-11:05:512
1736299181cyclictest991950irq/54-eth0-tx-10:41:292
1736299181cyclictest991950irq/54-eth0-tx-09:51:312
1736299181cyclictest991850irq/53-eth0-rx-12:14:102
1736299181cyclictest991850irq/53-eth0-rx-12:05:552
1736299181cyclictest991850irq/53-eth0-rx-11:54:392
1736299181cyclictest991850irq/53-eth0-rx-11:38:022
1736299181cyclictest991850irq/53-eth0-rx-11:22:002
1736299181cyclictest991850irq/53-eth0-rx-11:22:002
1736299181cyclictest991850irq/53-eth0-rx-10:34:162
1736299181cyclictest991850irq/53-eth0-rx-09:38:412
1736199181cyclictest0-21swapper/912:35:1211
1736199181cyclictest0-21swapper/912:15:1211
1736199181cyclictest0-21swapper/912:08:2411
1736199181cyclictest0-21swapper/910:50:4011
1736199181cyclictest0-21swapper/910:42:3611
1736199181cyclictest0-21swapper/909:28:5911
17358991816cyclictest17073-21qemu-kvm07:24:448
1732699181cyclictest0-21swapper/109:53:021
1731499180cyclictest0-21swapper/010:30:200
17362991715cyclictest28230-21ssh11:10:032
17362991715cyclictest28230-21ssh11:10:032
1736299170cyclictest991950irq/54-eth0-tx-10:05:252
1736299170cyclictest991850irq/53-eth0-rx-12:30:032
1736299170cyclictest991850irq/53-eth0-rx-12:25:122
1736299170cyclictest991850irq/53-eth0-rx-12:21:142
1736299170cyclictest991850irq/53-eth0-rx-12:00:052
1736299170cyclictest991850irq/53-eth0-rx-11:25:562
1736299170cyclictest991850irq/53-eth0-rx-11:01:142
1736299170cyclictest991850irq/53-eth0-rx-10:56:062
1736299170cyclictest991850irq/53-eth0-rx-10:56:062
1736299170cyclictest991850irq/53-eth0-rx-10:45:432
1736299170cyclictest991850irq/53-eth0-rx-10:35:252
1736299170cyclictest991850irq/53-eth0-rx-10:26:152
1736299170cyclictest991850irq/53-eth0-rx-10:20:102
1736299170cyclictest991850irq/53-eth0-rx-10:04:462
1736299170cyclictest991850irq/53-eth0-rx-09:45:092
1736299170cyclictest991850irq/53-eth0-rx-09:20:082
1736299170cyclictest991850irq/53-eth0-rx-08:30:262
1736299170cyclictest991850irq/53-eth0-rx-08:18:592
1736299170cyclictest991850irq/53-eth0-rx-08:05:102
1736299170cyclictest991850irq/53-eth0-rx-07:31:242
1736299170cyclictest991850irq/53-eth0-rx-07:20:242
1736299170cyclictest92002chrt07:40:122
1736299170cyclictest91942sleep1008:25:062
1736299170cyclictest88582sleep1009:05:462
1736299170cyclictest831ksoftirqd/1012:15:132
1736299170cyclictest57222sleep1012:35:252
1736299170cyclictest5192sleep1007:27:362
1736299170cyclictest44562sleep1007:35:012
1736299170cyclictest36752sleep1009:55:522
1736299170cyclictest32942sleep1009:30:142
1736299170cyclictest319382sleep1009:26:372
1736299170cyclictest303302sleep1008:51:452
1736299170cyclictest303302sleep1008:51:452
1736299170cyclictest256662chrt08:45:202
1736299170cyclictest256662chrt08:45:202
1736299170cyclictest256602sleep1007:17:112
1736299170cyclictest231112sleep1010:12:182
1736299170cyclictest230612chrt08:42:072
1736299170cyclictest223422sleep1007:55:272
1736299170cyclictest206352sleep1007:10:572
1736299170cyclictest194892sleep1009:16:242
1736299170cyclictest187352chrt07:50:382
1736299170cyclictest164952chrt08:35:072
1736299170cyclictest164952chrt08:35:072
1736299170cyclictest148772sleep1007:45:262
1736299170cyclictest14312sleep1008:55:342
1736299170cyclictest12850irq/42-ahci08:20:432
1736299170cyclictest12302sleep1008:14:162
1736299170cyclictest100212chrt09:10:102
17361991716cyclictest0-21swapper/910:16:0711
17361991715cyclictest24502-21taskset09:47:1411
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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