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2026-04-02 - 11:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Thu Apr 02, 2026 00:46:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501080irq/53-eth0-rx-0-21swapper/219:09:014
5830210794sleep50-21swapper/519:06:067
5836210390sleep110-21swapper/1119:06:113
5939210190sleep30-21swapper/319:07:285
5945210089sleep90-21swapper/919:07:3411
991850930irq/53-eth0-rx-0-21swapper/719:05:499
991850930irq/53-eth0-rx-0-21swapper/419:07:216
991850930irq/53-eth0-rx-0-21swapper/119:06:381
611929189sleep100-21swapper/1019:09:112
616027673sleep80-21swapper/819:09:4510
584526553sleep60-21swapper/619:06:188
590425955sleep00-21swapper/019:07:010
627299370cyclictest0-21swapper/019:15:140
6328993114cyclictest831ksoftirqd/1020:50:242
6326992928cyclictest991850irq/53-eth0-rx-19:15:1710
6272992928cyclictest0-21swapper/020:15:590
6325992827cyclictest991850irq/53-eth0-rx-19:15:169
627299281cyclictest0-21swapper/022:37:590
6288992726cyclictest2305-21nscd19:15:131
632899269cyclictest831ksoftirqd/1023:31:082
6327992625cyclictest991950irq/54-eth0-tx-19:15:1811
6329992524cyclictest991850irq/53-eth0-rx-19:15:213
6323992423cyclictest991850irq/53-eth0-rx-19:15:217
6328992221cyclictest12850irq/42-ahci19:15:512
6329992019cyclictest0-21swapper/1119:28:423
6320992019cyclictest991850irq/53-eth0-rx-19:15:116
632099200cyclictest0-21swapper/422:04:386
632099200cyclictest0-21swapper/422:04:386
632899192cyclictest991850irq/53-eth0-rx-22:08:262
632899192cyclictest991850irq/53-eth0-rx-21:40:342
632899192cyclictest831ksoftirqd/1022:33:352
632899192cyclictest831ksoftirqd/1022:22:222
632899192cyclictest831ksoftirqd/1022:17:462
632899192cyclictest831ksoftirqd/1019:20:202
632899192cyclictest831ksoftirqd/1000:23:102
6328991917cyclictest0-21swapper/1021:10:312
632799192cyclictest0-21swapper/922:19:1811
632799192cyclictest0-21swapper/921:05:2011
6272991915cyclictest15690-21kworker/0:021:13:480
627299190cyclictest0-21swapper/022:41:000
6328991817cyclictest831ksoftirqd/1019:25:112
6328991817cyclictest831ksoftirqd/1000:05:152
6328991817cyclictest19414-21ssh23:36:522
6328991817cyclictest0-21swapper/1020:56:272
6328991817cyclictest0-21swapper/1020:33:452
6328991817cyclictest0-21swapper/1019:50:222
6328991817cyclictest0-21swapper/1000:31:142
632899181cyclictest991950irq/54-eth0-tx-23:20:312
632899181cyclictest991950irq/54-eth0-tx-21:15:092
632899181cyclictest991850irq/53-eth0-rx-23:01:542
632899181cyclictest991850irq/53-eth0-rx-22:27:022
632899181cyclictest991850irq/53-eth0-rx-21:51:502
632899181cyclictest991850irq/53-eth0-rx-21:37:332
632899181cyclictest991850irq/53-eth0-rx-21:37:322
632899181cyclictest991850irq/53-eth0-rx-21:30:432
632899181cyclictest991850irq/53-eth0-rx-21:20:152
632899181cyclictest991850irq/53-eth0-rx-20:15:112
632899181cyclictest991850irq/53-eth0-rx-00:37:162
632899181cyclictest991850irq/53-eth0-rx-00:01:562
632899181cyclictest98822chrt19:14:472
632899181cyclictest831ksoftirqd/1023:46:502
632899181cyclictest831ksoftirqd/1023:40:012
632899181cyclictest831ksoftirqd/1023:25:182
632899181cyclictest831ksoftirqd/1023:05:082
632899181cyclictest831ksoftirqd/1022:59:382
632899181cyclictest831ksoftirqd/1022:45:122
632899181cyclictest831ksoftirqd/1022:40:162
632899181cyclictest831ksoftirqd/1021:45:122
632899181cyclictest831ksoftirqd/1021:25:192
632899181cyclictest831ksoftirqd/1020:40:142
632899181cyclictest831ksoftirqd/1019:45:252
632899181cyclictest831ksoftirqd/1019:40:152
632899181cyclictest831ksoftirqd/1000:25:122
632899181cyclictest831ksoftirqd/1000:10:172
632799181cyclictest761ksoftirqd/923:45:1711
632799181cyclictest761ksoftirqd/923:20:2511
632799181cyclictest761ksoftirqd/922:38:3411
632799181cyclictest761ksoftirqd/922:30:1111
632799181cyclictest761ksoftirqd/921:25:1411
632799181cyclictest761ksoftirqd/920:05:2511
632799181cyclictest761ksoftirqd/919:35:2311
632799181cyclictest761ksoftirqd/919:10:2611
632799181cyclictest741rcuc/900:20:4211
632799181cyclictest31849-21snmp_rack3slot920:25:1511
632799181cyclictest27377-21expr20:20:1311
632799181cyclictest25079-21ssh00:35:1311
632799181cyclictest25021-21ssh22:50:1011
632799181cyclictest23374-21ssh22:20:3311
632799181cyclictest1990-21cstates23:50:1211
632799181cyclictest18085-21sh00:30:0911
632799181cyclictest17512-21ssh00:01:4511
632799181cyclictest15625-21ssh23:35:0511
632799181cyclictest14992-21ssh21:49:4711
632799181cyclictest11875-21kworker/9:200:25:0611
632799181cyclictest11427-21sed23:30:2111
632799181cyclictest10718-21munin-node19:55:2311
632799181cyclictest1071-21ssh21:37:1311
632799181cyclictest1071-21ssh21:37:1311
632799181cyclictest0-21swapper/923:55:2811
632799181cyclictest0-21swapper/923:25:5311
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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