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2026-07-22 - 22:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Wed Jul 22, 2026 12:46:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27630210995sleep90-21swapper/907:07:2311
27630210995sleep90-21swapper/907:07:2311
27596210894sleep30-21swapper/307:06:535
27596210894sleep30-21swapper/307:06:525
27576210593sleep10-21swapper/107:06:391
27576210593sleep10-21swapper/107:06:391
27745210491sleep110-21swapper/1107:08:133
27745210491sleep110-21swapper/1107:08:133
27660210492sleep70-21swapper/707:07:459
27660210492sleep70-21swapper/707:07:459
2784729792sleep40-21swapper/407:09:306
2784729792sleep40-21swapper/407:09:306
3054950960irq/53-eth0-rx-0-21swapper/207:07:514
3054950960irq/53-eth0-rx-0-21swapper/207:07:514
3054950930irq/53-eth0-rx-0-21swapper/507:05:207
3054950930irq/53-eth0-rx-0-21swapper/507:05:207
3054950910irq/53-eth0-rx-0-21swapper/807:06:0510
3054950910irq/53-eth0-rx-0-21swapper/807:06:0510
3054950680irq/53-eth0-rx-0-21swapper/1007:06:192
3054950680irq/53-eth0-rx-0-21swapper/1007:06:182
2764426251sleep60-21swapper/607:07:328
2764426251sleep60-21swapper/607:07:328
2752625955sleep00-21swapper/007:06:020
2752625955sleep00-21swapper/007:06:010
2798499460cyclictest3054950irq/53-eth0-rx-09:24:540
27984993426cyclictest28485-21munin-node07:10:250
27984993228cyclictest0-21swapper/010:09:120
2803699290cyclictest0-21swapper/1107:19:143
3055050280irq/54-eth0-tx-0-21swapper/1109:24:493
3054950280irq/53-eth0-rx-0-21swapper/909:24:4811
3054950280irq/53-eth0-rx-0-21swapper/709:24:399
3054950280irq/53-eth0-rx-0-21swapper/509:24:427
3054950280irq/53-eth0-rx-0-21swapper/1009:24:442
2798499259cyclictest30496-21kworker/0:110:11:530
27984992511cyclictest0-21swapper/009:11:520
2803599236cyclictest831ksoftirqd/1010:53:342
2803599236cyclictest831ksoftirqd/1008:54:262
2803599230cyclictest831ksoftirqd/1009:49:292
2803599226cyclictest831ksoftirqd/1010:33:002
2803599225cyclictest831ksoftirqd/1008:26:512
2803699210cyclictest0-21swapper/1107:11:253
2803599203cyclictest831ksoftirqd/1010:35:322
2803599203cyclictest831ksoftirqd/1009:35:382
2803599203cyclictest831ksoftirqd/1007:25:582
2803599192cyclictest831ksoftirqd/1012:35:402
2803599192cyclictest831ksoftirqd/1012:30:572
2803599192cyclictest831ksoftirqd/1012:25:092
2803599192cyclictest831ksoftirqd/1012:20:152
2803599192cyclictest831ksoftirqd/1012:15:052
2803599192cyclictest831ksoftirqd/1012:11:402
2803599192cyclictest831ksoftirqd/1012:05:512
2803599192cyclictest831ksoftirqd/1012:00:152
2803599192cyclictest831ksoftirqd/1011:55:032
2803599192cyclictest831ksoftirqd/1011:50:292
2803599192cyclictest831ksoftirqd/1011:45:262
2803599192cyclictest831ksoftirqd/1011:42:192
2803599192cyclictest831ksoftirqd/1011:35:252
2803599192cyclictest831ksoftirqd/1011:30:052
2803599192cyclictest831ksoftirqd/1011:25:102
2803599192cyclictest831ksoftirqd/1011:20:202
2803599192cyclictest831ksoftirqd/1011:20:202
2803599192cyclictest831ksoftirqd/1011:15:202
2803599192cyclictest831ksoftirqd/1011:10:252
2803599192cyclictest831ksoftirqd/1011:10:252
2803599192cyclictest831ksoftirqd/1011:05:112
2803599192cyclictest831ksoftirqd/1011:00:122
2803599192cyclictest831ksoftirqd/1010:55:082
2803599192cyclictest831ksoftirqd/1010:49:052
2803599192cyclictest831ksoftirqd/1010:43:402
2803599192cyclictest831ksoftirqd/1010:26:412
2803599192cyclictest831ksoftirqd/1010:20:572
2803599192cyclictest831ksoftirqd/1010:16:032
2803599192cyclictest831ksoftirqd/1010:11:592
2803599192cyclictest831ksoftirqd/1010:07:472
2803599192cyclictest831ksoftirqd/1010:01:022
2803599192cyclictest831ksoftirqd/1009:55:202
2803599192cyclictest831ksoftirqd/1009:50:022
2803599192cyclictest831ksoftirqd/1009:40:592
2803599192cyclictest831ksoftirqd/1009:25:562
2803599192cyclictest831ksoftirqd/1009:15:162
2803599192cyclictest831ksoftirqd/1009:10:452
2803599192cyclictest831ksoftirqd/1009:05:132
2803599192cyclictest831ksoftirqd/1009:00:292
2803599192cyclictest831ksoftirqd/1008:55:172
2803599192cyclictest831ksoftirqd/1008:48:112
2803599192cyclictest831ksoftirqd/1008:41:342
2803599192cyclictest831ksoftirqd/1008:35:212
2803599192cyclictest831ksoftirqd/1008:15:312
2803599192cyclictest831ksoftirqd/1008:14:572
2803599192cyclictest831ksoftirqd/1008:06:252
2803599192cyclictest831ksoftirqd/1008:00:282
2803599192cyclictest831ksoftirqd/1008:00:282
2803599192cyclictest831ksoftirqd/1007:55:322
2803599192cyclictest831ksoftirqd/1007:55:322
2803599192cyclictest831ksoftirqd/1007:50:152
2803599192cyclictest831ksoftirqd/1007:45:322
2803599192cyclictest831ksoftirqd/1007:44:512
2803599192cyclictest831ksoftirqd/1007:35:212
2803599192cyclictest831ksoftirqd/1007:23:002
2803599192cyclictest831ksoftirqd/1007:15:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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