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2026-03-31 - 22:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Tue Mar 31, 2026 12:46:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3054210691sleep110-21swapper/1107:06:123
3143210593sleep60-21swapper/607:07:208
128501050irq/42-ahci0-21swapper/707:08:409
9918501020irq/53-eth0-rx-0-21swapper/207:08:154
128501020irq/42-ahci0-21swapper/107:08:501
9918501010irq/53-eth0-rx-0-21swapper/407:09:256
9918501000irq/53-eth0-rx-0-21swapper/307:08:165
991850920irq/53-eth0-rx-0-21swapper/807:05:0410
991850890irq/53-eth0-rx-0-21swapper/507:07:517
336427671sleep90-21swapper/907:09:3411
991850740irq/53-eth0-rx-0-21swapper/1007:06:222
302125853sleep00-21swapper/007:05:480
3541993015cyclictest831ksoftirqd/1011:42:472
3541992912cyclictest831ksoftirqd/1012:20:222
3541992912cyclictest831ksoftirqd/1008:58:352
3541992710cyclictest831ksoftirqd/1008:43:332
3541992710cyclictest831ksoftirqd/1008:14:492
354199269cyclictest831ksoftirqd/1011:09:032
354199269cyclictest831ksoftirqd/1011:01:532
354199269cyclictest831ksoftirqd/1009:57:122
354199269cyclictest831ksoftirqd/1009:10:572
354199258cyclictest831ksoftirqd/1010:21:552
354799230cyclictest0-21swapper/1107:25:213
354199192cyclictest991850irq/53-eth0-rx-12:36:542
354199192cyclictest991850irq/53-eth0-rx-12:06:012
354199192cyclictest991850irq/53-eth0-rx-11:52:562
354199192cyclictest991850irq/53-eth0-rx-11:38:122
354199192cyclictest991850irq/53-eth0-rx-11:34:252
354199192cyclictest991850irq/53-eth0-rx-10:17:552
354199192cyclictest991850irq/53-eth0-rx-10:10:502
354199192cyclictest991850irq/53-eth0-rx-09:53:242
354199192cyclictest991850irq/53-eth0-rx-09:16:312
354199192cyclictest831ksoftirqd/1010:00:072
354199192cyclictest831ksoftirqd/1010:00:072
354199192cyclictest831ksoftirqd/1009:25:272
354199192cyclictest831ksoftirqd/1007:50:132
3541991918cyclictest0-21swapper/1010:55:302
354099192cyclictest0-21swapper/911:58:3211
354099192cyclictest0-21swapper/910:34:4511
354099192cyclictest0-21swapper/910:13:2811
3541991817cyclictest0-21swapper/1010:25:272
3541991817cyclictest0-21swapper/1009:46:192
3541991817cyclictest0-21swapper/1009:46:182
3541991817cyclictest0-21swapper/1009:44:452
3541991817cyclictest0-21swapper/1007:33:512
354199181cyclictest991850irq/53-eth0-rx-12:25:202
354199181cyclictest991850irq/53-eth0-rx-12:10:272
354199181cyclictest991850irq/53-eth0-rx-12:00:142
354199181cyclictest991850irq/53-eth0-rx-11:15:462
354199181cyclictest991850irq/53-eth0-rx-10:40:172
354199181cyclictest991850irq/53-eth0-rx-09:20:152
354199181cyclictest991850irq/53-eth0-rx-08:45:422
354199181cyclictest991850irq/53-eth0-rx-08:30:232
354199181cyclictest991850irq/53-eth0-rx-08:22:352
354199181cyclictest831ksoftirqd/1012:33:192
354199181cyclictest831ksoftirqd/1012:15:142
354199181cyclictest831ksoftirqd/1011:47:512
354199181cyclictest831ksoftirqd/1011:28:052
354199181cyclictest831ksoftirqd/1011:22:432
354199181cyclictest831ksoftirqd/1011:10:022
354199181cyclictest831ksoftirqd/1010:50:192
354199181cyclictest831ksoftirqd/1010:35:012
354199181cyclictest831ksoftirqd/1010:30:122
354199181cyclictest831ksoftirqd/1010:05:302
354199181cyclictest831ksoftirqd/1009:35:262
354199181cyclictest831ksoftirqd/1009:35:262
354199181cyclictest831ksoftirqd/1009:30:122
354199181cyclictest831ksoftirqd/1008:00:252
354199181cyclictest831ksoftirqd/1007:45:012
354199181cyclictest831ksoftirqd/1007:20:152
354199181cyclictest831ksoftirqd/1007:15:142
354199181cyclictest831ksoftirqd/1007:10:212
354199181cyclictest811rcuc/1010:46:352
354199181cyclictest12850irq/42-ahci07:40:012
354199181cyclictest12850irq/42-ahci07:25:312
354099181cyclictest991950irq/54-eth0-tx-11:17:1311
354099181cyclictest991950irq/54-eth0-tx-10:00:0211
354099181cyclictest991950irq/54-eth0-tx-10:00:0211
354099181cyclictest18100-21ssh09:26:3911
354099181cyclictest0-21swapper/912:22:5811
354099181cyclictest0-21swapper/912:07:0711
354099181cyclictest0-21swapper/911:29:4911
354099181cyclictest0-21swapper/910:58:4811
354099181cyclictest0-21swapper/910:46:3611
354099181cyclictest0-21swapper/910:42:0511
354099181cyclictest0-21swapper/910:39:0611
354099181cyclictest0-21swapper/910:05:3411
354099181cyclictest0-21swapper/909:21:1111
354099181cyclictest0-21swapper/908:50:1111
354099181cyclictest0-21swapper/907:57:5111
354099181cyclictest0-21swapper/907:11:5411
3541991716cyclictest0-21swapper/1011:55:302
3541991716cyclictest0-21swapper/1009:05:082
3541991716cyclictest0-21swapper/1008:26:322
354199170cyclictest991850irq/53-eth0-rx-08:51:082
354199170cyclictest991850irq/53-eth0-rx-07:55:132
354199170cyclictest831ksoftirqd/1009:00:142
354199170cyclictest831ksoftirqd/1008:15:252
354199170cyclictest831ksoftirqd/1007:45:012
354199170cyclictest54882sleep1008:36:072
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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