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2026-06-08 - 05:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Mon Jun 08, 2026 00:46:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
122501140irq/42-ahci0-21swapper/219:09:294
7965210793sleep70-21swapper/719:05:569
30549501000irq/53-eth0-rx-0-21swapper/119:09:291
3054950980irq/53-eth0-rx-0-21swapper/1019:06:212
3054950970irq/53-eth0-rx-0-21swapper/419:08:146
12250960irq/42-ahci0-21swapper/319:08:265
3054950920irq/53-eth0-rx-0-21swapper/919:07:0111
3054950920irq/53-eth0-rx-0-21swapper/819:07:2310
3054950890irq/53-eth0-rx-0-21swapper/519:07:467
831727165sleep00-21swapper/019:09:490
542226657sleep110-21swapper/1119:05:123
795025955sleep60-21swapper/619:05:438
8456992827cyclictest12250irq/42-ahci20:19:255
8456992827cyclictest12250irq/42-ahci20:19:255
8477992322cyclictest0-21swapper/1122:11:163
847699192cyclictest3054950irq/53-eth0-rx-23:15:102
847699192cyclictest3054950irq/53-eth0-rx-22:28:442
847699192cyclictest3054950irq/53-eth0-rx-00:32:552
13450190irq/18-ehci_hcd0-21swapper/020:30:220
13450190irq/18-ehci_hcd0-21swapper/020:30:220
8476991817cyclictest0-21swapper/1022:57:312
8476991817cyclictest0-21swapper/1022:35:482
8476991817cyclictest0-21swapper/1021:35:312
8476991817cyclictest0-21swapper/1021:20:252
847699181cyclictest3055050irq/54-eth0-tx-23:55:062
847699181cyclictest3055050irq/54-eth0-tx-23:40:052
847699181cyclictest3055050irq/54-eth0-tx-23:35:392
847699181cyclictest3055050irq/54-eth0-tx-22:18:182
847699181cyclictest3055050irq/54-eth0-tx-22:00:272
847699181cyclictest3055050irq/54-eth0-tx-21:53:562
847699181cyclictest3054950irq/53-eth0-rx-23:52:122
847699181cyclictest3054950irq/53-eth0-rx-23:20:572
847699181cyclictest3054950irq/53-eth0-rx-23:20:572
847699181cyclictest3054950irq/53-eth0-rx-23:11:512
847699181cyclictest3054950irq/53-eth0-rx-23:11:512
847699181cyclictest3054950irq/53-eth0-rx-23:06:202
847699181cyclictest3054950irq/53-eth0-rx-22:53:522
847699181cyclictest3054950irq/53-eth0-rx-22:45:102
847699181cyclictest3054950irq/53-eth0-rx-22:40:052
847699181cyclictest3054950irq/53-eth0-rx-22:20:442
847699181cyclictest3054950irq/53-eth0-rx-22:10:042
847699181cyclictest3054950irq/53-eth0-rx-22:05:022
847699181cyclictest3054950irq/53-eth0-rx-21:42:082
847699181cyclictest3054950irq/53-eth0-rx-21:30:382
847699181cyclictest3054950irq/53-eth0-rx-21:18:552
847699181cyclictest3054950irq/53-eth0-rx-21:10:452
847699181cyclictest3054950irq/53-eth0-rx-20:34:022
847699181cyclictest3054950irq/53-eth0-rx-20:34:022
847699181cyclictest3054950irq/53-eth0-rx-19:38:012
847699181cyclictest3054950irq/53-eth0-rx-00:35:572
847699181cyclictest3054950irq/53-eth0-rx-00:26:042
847699181cyclictest3054950irq/53-eth0-rx-00:20:062
847699181cyclictest3054950irq/53-eth0-rx-00:01:262
847699181cyclictest216612chrt20:54:342
847699181cyclictest12250irq/42-ahci19:47:472
847699181cyclictest114150irq/18-i801_smb19:10:222
847599181cyclictest761ksoftirqd/923:45:4111
847599181cyclictest761ksoftirqd/923:10:1211
847599181cyclictest761ksoftirqd/923:10:1211
847599181cyclictest761ksoftirqd/922:57:4711
847599181cyclictest761ksoftirqd/919:35:0111
847599181cyclictest741rcuc/920:02:0311
847599181cyclictest741rcuc/900:37:0011
847599181cyclictest4322-21cpuspeed_turbos20:30:1211
847599181cyclictest4322-21cpuspeed_turbos20:30:1211
847599181cyclictest3054950irq/53-eth0-rx-22:41:5511
847599181cyclictest0-21swapper/923:58:0111
847599181cyclictest0-21swapper/923:50:1511
847599181cyclictest0-21swapper/923:39:5111
847599181cyclictest0-21swapper/923:30:5511
847599181cyclictest0-21swapper/923:03:1611
847599181cyclictest0-21swapper/922:54:2111
847599181cyclictest0-21swapper/922:45:3411
847599181cyclictest0-21swapper/922:30:0011
847599181cyclictest0-21swapper/922:20:1211
847599181cyclictest0-21swapper/922:11:0311
847599181cyclictest0-21swapper/922:05:0111
847599181cyclictest0-21swapper/921:51:0411
847599181cyclictest0-21swapper/921:20:2111
847599181cyclictest0-21swapper/920:10:0111
847599181cyclictest0-21swapper/900:22:0111
847599181cyclictest0-21swapper/900:05:3111
8471991816cyclictest26900-21munin-node23:20:207
8471991816cyclictest26900-21munin-node23:20:207
847799170cyclictest0-21swapper/1119:16:293
8476991716cyclictest0-21swapper/1023:25:162
847699170cyclictest94172sleep1020:35:202
847699170cyclictest325102sleep1021:07:582
847699170cyclictest31732sleep1020:26:192
847699170cyclictest3055050irq/54-eth0-tx-00:15:332
847699170cyclictest3055050irq/54-eth0-tx-00:05:062
847699170cyclictest3054950irq/53-eth0-rx-23:45:222
847699170cyclictest3054950irq/53-eth0-rx-23:30:532
847699170cyclictest3054950irq/53-eth0-rx-23:00:022
847699170cyclictest3054950irq/53-eth0-rx-22:30:202
847699170cyclictest3054950irq/53-eth0-rx-21:55:272
847699170cyclictest3054950irq/53-eth0-rx-21:45:042
847699170cyclictest3054950irq/53-eth0-rx-20:40:392
847699170cyclictest3054950irq/53-eth0-rx-19:59:152
847699170cyclictest3054950irq/53-eth0-rx-19:50:082
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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