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2026-06-23 - 06:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Tue Jun 23, 2026 00:46:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15602211095sleep30-21swapper/319:06:315
15527210693sleep80-21swapper/819:05:3610
15590210593sleep60-21swapper/619:06:238
3054950980irq/53-eth0-rx-0-21swapper/119:09:491
3054950970irq/53-eth0-rx-0-21swapper/219:08:264
3054950920irq/53-eth0-rx-0-21swapper/719:06:469
3054950910irq/53-eth0-rx-0-21swapper/419:05:296
3054950890irq/53-eth0-rx-0-21swapper/519:06:257
1556327464sleep90-21swapper/919:06:0211
1539726755sleep00-21swapper/019:05:270
3054950650irq/53-eth0-rx-0-21swapper/1119:06:193
1558126354sleep100-21swapper/1019:06:152
1607199320cyclictest0-21swapper/1121:29:303
1607199310cyclictest0-21swapper/1122:30:103
1606899213cyclictest0-21swapper/821:45:0810
1607099192cyclictest3054950irq/53-eth0-rx-23:47:532
1607099192cyclictest3054950irq/53-eth0-rx-23:37:552
1607099192cyclictest3054950irq/53-eth0-rx-23:32:082
1607099192cyclictest3054950irq/53-eth0-rx-23:25:502
1607099192cyclictest3054950irq/53-eth0-rx-23:23:132
1607099192cyclictest3054950irq/53-eth0-rx-23:17:432
1607099192cyclictest3054950irq/53-eth0-rx-23:14:072
1607099192cyclictest3054950irq/53-eth0-rx-23:06:392
1607099192cyclictest3054950irq/53-eth0-rx-22:45:532
1607099192cyclictest3054950irq/53-eth0-rx-22:40:362
1607099192cyclictest3054950irq/53-eth0-rx-22:20:112
1607099192cyclictest3054950irq/53-eth0-rx-21:50:372
1607099192cyclictest3054950irq/53-eth0-rx-21:49:492
1607099192cyclictest3054950irq/53-eth0-rx-21:34:482
1607099192cyclictest3054950irq/53-eth0-rx-21:22:382
1607099192cyclictest3054950irq/53-eth0-rx-21:16:102
1607099192cyclictest3054950irq/53-eth0-rx-21:13:052
1607099192cyclictest3054950irq/53-eth0-rx-00:35:512
1607099192cyclictest3054950irq/53-eth0-rx-00:12:272
1607099192cyclictest3054950irq/53-eth0-rx-00:02:492
1606999192cyclictest0-21swapper/923:12:4611
1606999192cyclictest0-21swapper/922:42:1011
1606999192cyclictest0-21swapper/922:31:5011
1606999192cyclictest0-21swapper/921:29:1111
16070991817cyclictest0-21swapper/1021:35:042
16070991817cyclictest0-21swapper/1021:27:282
1607099181cyclictest3055050irq/54-eth0-tx-23:40:512
1607099181cyclictest3055050irq/54-eth0-tx-22:15:272
1607099181cyclictest3055050irq/54-eth0-tx-21:57:352
1607099181cyclictest3054950irq/53-eth0-rx-23:52:372
1607099181cyclictest3054950irq/53-eth0-rx-23:00:362
1607099181cyclictest3054950irq/53-eth0-rx-23:00:362
1607099181cyclictest3054950irq/53-eth0-rx-22:50:082
1607099181cyclictest3054950irq/53-eth0-rx-22:50:072
1607099181cyclictest3054950irq/53-eth0-rx-22:38:312
1607099181cyclictest3054950irq/53-eth0-rx-22:38:312
1607099181cyclictest3054950irq/53-eth0-rx-22:30:532
1607099181cyclictest3054950irq/53-eth0-rx-22:25:412
1607099181cyclictest3054950irq/53-eth0-rx-22:06:142
1607099181cyclictest3054950irq/53-eth0-rx-22:00:522
1607099181cyclictest3054950irq/53-eth0-rx-20:41:022
1607099181cyclictest3054950irq/53-eth0-rx-19:24:432
1607099181cyclictest3054950irq/53-eth0-rx-00:33:242
1607099181cyclictest3054950irq/53-eth0-rx-00:25:462
1607099181cyclictest3054950irq/53-eth0-rx-00:20:542
1607099181cyclictest3054950irq/53-eth0-rx-00:17:592
1607099181cyclictest175702chrt19:52:192
1607099181cyclictest12250irq/42-ahci23:55:132
1607099181cyclictest114150irq/18-i801_smb19:15:222
1607099181cyclictest114150irq/18-i801_smb19:15:222
1606999181cyclictest28283-21munin-node23:40:2211
1606999181cyclictest0-21swapper/922:13:3311
1606999181cyclictest0-21swapper/920:55:2711
1606999181cyclictest0-21swapper/920:10:2311
1606999181cyclictest0-21swapper/920:10:2211
1606999181cyclictest0-21swapper/900:38:2911
16065991816cyclictest28642-21qemu-kvm20:28:107
16065991816cyclictest28347-21snmp_easybox.os20:50:257
16070991716cyclictest0-21swapper/1022:55:132
16070991716cyclictest0-21swapper/1020:25:022
1607099170cyclictest78092chrt21:08:152
1607099170cyclictest72612sleep1020:23:232
1607099170cyclictest325852sleep1020:55:502
1607099170cyclictest3054950irq/53-eth0-rx-22:10:162
1607099170cyclictest3054950irq/53-eth0-rx-21:40:012
1607099170cyclictest3054950irq/53-eth0-rx-21:00:112
1607099170cyclictest3054950irq/53-eth0-rx-20:30:192
1607099170cyclictest3054950irq/53-eth0-rx-20:16:492
1607099170cyclictest3054950irq/53-eth0-rx-20:06:102
1607099170cyclictest3054950irq/53-eth0-rx-19:41:102
1607099170cyclictest3054950irq/53-eth0-rx-19:27:432
1607099170cyclictest293052sleep1020:10:092
1607099170cyclictest293052sleep1020:10:082
1607099170cyclictest289602sleep1020:51:022
1607099170cyclictest259252sleep1000:05:252
1607099170cyclictest252872sleep1020:45:362
1607099170cyclictest249352sleep1020:02:572
1607099170cyclictest211142chrt19:56:062
1607099170cyclictest180162sleep1020:35:482
1607099170cyclictest12250irq/42-ahci19:45:162
1607099170cyclictest12250irq/42-ahci19:37:212
1607099170cyclictest12250irq/42-ahci19:31:232
16069991716cyclictest0-21swapper/923:24:0311
16069991716cyclictest0-21swapper/921:16:5111
16069991716cyclictest0-21swapper/900:06:2911
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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