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2026-09-04 - 05:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Fri Sep 04, 2026 00:46:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5109210996sleep80-21swapper/819:06:1210
30549501050irq/53-eth0-rx-0-21swapper/1119:07:193
30549501010irq/53-eth0-rx-0-21swapper/119:09:471
12250980irq/42-ahci0-21swapper/219:08:504
3054950970irq/53-eth0-rx-0-21swapper/719:05:219
12250950irq/42-ahci0-21swapper/319:07:385
3054950890irq/53-eth0-rx-0-21swapper/519:05:097
3054950880irq/53-eth0-rx-0-21swapper/1019:06:512
12250740irq/42-ahci0-21swapper/419:05:266
514627262sleep90-21swapper/919:06:3711
520326757sleep60-21swapper/619:07:228
3054950600irq/53-eth0-rx-0-21swapper/019:06:590
5600992221cyclictest0-21swapper/1121:17:583
5600992218cyclictest0-21swapper/1119:20:013
5600992214cyclictest0-21swapper/1120:28:403
5600992214cyclictest0-21swapper/1119:19:513
560099209cyclictest0-21swapper/1120:24:023
559999192cyclictest3054950irq/53-eth0-rx-23:12:332
559999192cyclictest3054950irq/53-eth0-rx-23:03:102
559999192cyclictest3054950irq/53-eth0-rx-21:41:492
559999192cyclictest3054950irq/53-eth0-rx-21:11:552
559999192cyclictest3054950irq/53-eth0-rx-21:11:552
559999192cyclictest3054950irq/53-eth0-rx-00:11:452
559999192cyclictest3054950irq/53-eth0-rx-00:01:532
5600991817cyclictest0-21swapper/1121:11:493
5600991817cyclictest0-21swapper/1121:11:493
5599991817cyclictest3559-21kworker/10:022:44:362
5599991817cyclictest0-21swapper/1023:28:182
5599991817cyclictest0-21swapper/1000:22:042
5599991817cyclictest0-21swapper/1000:22:042
559999181cyclictest3055050irq/54-eth0-tx-23:55:072
559999181cyclictest3055050irq/54-eth0-tx-22:35:262
559999181cyclictest3055050irq/54-eth0-tx-21:17:222
559999181cyclictest3054950irq/53-eth0-rx-23:41:272
559999181cyclictest3054950irq/53-eth0-rx-23:30:322
559999181cyclictest3054950irq/53-eth0-rx-23:07:292
559999181cyclictest3054950irq/53-eth0-rx-22:56:322
559999181cyclictest3054950irq/53-eth0-rx-22:53:452
559999181cyclictest3054950irq/53-eth0-rx-22:34:542
559999181cyclictest3054950irq/53-eth0-rx-22:20:082
559999181cyclictest3054950irq/53-eth0-rx-22:15:472
559999181cyclictest3054950irq/53-eth0-rx-22:08:522
559999181cyclictest3054950irq/53-eth0-rx-22:03:482
559999181cyclictest3054950irq/53-eth0-rx-21:27:112
559999181cyclictest3054950irq/53-eth0-rx-20:40:072
559999181cyclictest3054950irq/53-eth0-rx-19:11:032
559999181cyclictest3054950irq/53-eth0-rx-00:18:062
559999181cyclictest3054950irq/53-eth0-rx-00:05:062
559999180cyclictest3054950irq/53-eth0-rx-22:10:412
559899181cyclictest3055050irq/54-eth0-tx-22:13:1911
559899181cyclictest0-21swapper/923:44:3911
559899181cyclictest0-21swapper/923:36:4111
559899181cyclictest0-21swapper/921:33:3311
559899181cyclictest0-21swapper/900:15:3611
559899181cyclictest0-21swapper/900:13:2811
5585991816cyclictest8575-21snmp_easybox.os23:25:254
5585991816cyclictest4913-21snmp_rack3slot921:40:184
5585991816cyclictest4129-21snmp_easybox.os22:30:284
5585991816cyclictest31824-21snmp_rack3slot921:10:154
5585991816cyclictest31824-21snmp_rack3slot921:10:154
5585991816cyclictest30953-21snmp_rack3slot921:35:154
5585991816cyclictest20008-21snmp_rack3slot920:10:134
5564991817cyclictest3054950irq/53-eth0-rx-21:24:420
556499180cyclictest0-21swapper/020:14:370
5599991716cyclictest3559-21kworker/10:019:30:012
5599991716cyclictest0-21swapper/1023:50:142
5599991716cyclictest0-21swapper/1021:45:182
5599991716cyclictest0-21swapper/1019:50:342
559999170cyclictest78232chrt19:55:072
559999170cyclictest69322sleep1020:35:222
559999170cyclictest40042sleep1020:32:232
559999170cyclictest322512sleep1019:43:542
559999170cyclictest3055050irq/54-eth0-tx-23:15:162
559999170cyclictest3055050irq/54-eth0-tx-21:55:042
559999170cyclictest3054950irq/53-eth0-rx-23:46:072
559999170cyclictest3054950irq/53-eth0-rx-23:20:212
559999170cyclictest3054950irq/53-eth0-rx-22:25:272
559999170cyclictest3054950irq/53-eth0-rx-21:50:192
559999170cyclictest3054950irq/53-eth0-rx-21:36:102
559999170cyclictest3054950irq/53-eth0-rx-21:30:132
559999170cyclictest3054950irq/53-eth0-rx-20:51:002
559999170cyclictest3054950irq/53-eth0-rx-20:20:152
559999170cyclictest3054950irq/53-eth0-rx-20:15:402
559999170cyclictest3054950irq/53-eth0-rx-19:36:152
559999170cyclictest3054950irq/53-eth0-rx-19:25:212
559999170cyclictest3054950irq/53-eth0-rx-19:15:212
559999170cyclictest3054950irq/53-eth0-rx-00:35:072
559999170cyclictest3054950irq/53-eth0-rx-00:30:412
559999170cyclictest3054950irq/53-eth0-rx-00:30:412
559999170cyclictest295092sleep1021:06:382
559999170cyclictest295092sleep1021:06:382
559999170cyclictest241602chrt22:46:272
559999170cyclictest229652sleep1021:00:032
559999170cyclictest220042chrt23:35:572
559999170cyclictest210262sleep1000:27:282
559999170cyclictest179762chrt20:06:202
559999170cyclictest158062sleep1019:20:132
559999170cyclictest142722sleep1020:00:442
559999170cyclictest124742sleep1020:45:142
559999170cyclictest12250irq/42-ahci20:26:592
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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