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2026-04-07 - 14:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Tue Apr 07, 2026 12:46:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501100irq/53-eth0-rx-0-21swapper/107:09:421
128501040irq/42-ahci0-21swapper/307:08:235
4145210390sleep110-21swapper/1107:07:243
991850980irq/53-eth0-rx-0-21swapper/207:09:324
991850940irq/53-eth0-rx-0-21swapper/407:08:176
991850890irq/53-eth0-rx-0-21swapper/507:06:087
991850870irq/53-eth0-rx-0-21swapper/707:05:169
416328576sleep00-21swapper/007:07:370
991850810irq/53-eth0-rx-0-21swapper/807:08:5410
438327775sleep100-21swapper/1007:09:462
432226865sleep90-21swapper/907:08:5811
403226353sleep60-21swapper/607:05:558
455299310cyclictest0-21swapper/1109:20:143
455299270cyclictest0-21swapper/1109:09:463
454199240cyclictest0-21swapper/007:20:410
454199240cyclictest0-21swapper/007:20:400
454199220cyclictest0-21swapper/009:35:220
454199210cyclictest0-21swapper/010:00:220
454199210cyclictest0-21swapper/010:00:220
455299200cyclictest0-21swapper/1109:19:593
454199200cyclictest0-21swapper/008:17:140
454199200cyclictest0-21swapper/007:15:270
455299190cyclictest0-21swapper/1109:10:003
455199192cyclictest991850irq/53-eth0-rx-12:25:232
455199192cyclictest991850irq/53-eth0-rx-12:20:522
455199192cyclictest991850irq/53-eth0-rx-11:27:442
455199192cyclictest991850irq/53-eth0-rx-09:54:532
455099192cyclictest0-21swapper/911:45:3811
455099192cyclictest0-21swapper/911:30:3711
455099192cyclictest0-21swapper/910:55:4111
455099192cyclictest0-21swapper/909:11:1311
454199192cyclictest2308-21snmpd08:09:040
454199190cyclictest0-21swapper/010:50:210
454199190cyclictest0-21swapper/010:15:230
454199190cyclictest0-21swapper/010:12:350
454199190cyclictest0-21swapper/010:12:350
454199190cyclictest0-21swapper/009:55:210
454199190cyclictest0-21swapper/009:32:260
454199190cyclictest0-21swapper/008:50:210
991850180irq/53-eth0-rx-4621-21qemu-kvm10:16:018
4551991817cyclictest0-21swapper/1010:32:152
4551991817cyclictest0-21swapper/1008:42:502
4551991817cyclictest0-21swapper/1008:33:112
4551991816cyclictest2438-21munin-run11:00:012
455199181cyclictest991950irq/54-eth0-tx-12:02:282
455199181cyclictest991950irq/54-eth0-tx-11:20:152
455199181cyclictest991950irq/54-eth0-tx-11:13:162
455199181cyclictest991950irq/54-eth0-tx-10:50:232
455199181cyclictest991850irq/53-eth0-rx-12:36:062
455199181cyclictest991850irq/53-eth0-rx-12:33:332
455199181cyclictest991850irq/53-eth0-rx-12:16:262
455199181cyclictest991850irq/53-eth0-rx-12:13:162
455199181cyclictest991850irq/53-eth0-rx-11:56:352
455199181cyclictest991850irq/53-eth0-rx-11:43:412
455199181cyclictest991850irq/53-eth0-rx-11:36:562
455199181cyclictest991850irq/53-eth0-rx-10:25:052
455199181cyclictest991850irq/53-eth0-rx-10:19:452
455199181cyclictest991850irq/53-eth0-rx-10:07:312
455199181cyclictest991850irq/53-eth0-rx-10:01:372
455199181cyclictest991850irq/53-eth0-rx-10:01:372
455199181cyclictest991850irq/53-eth0-rx-09:59:362
455199181cyclictest991850irq/53-eth0-rx-09:46:452
455199181cyclictest991850irq/53-eth0-rx-09:40:042
455199181cyclictest991850irq/53-eth0-rx-09:36:472
455199181cyclictest991850irq/53-eth0-rx-09:33:562
455199181cyclictest991850irq/53-eth0-rx-09:29:412
455199181cyclictest991850irq/53-eth0-rx-09:21:012
455199181cyclictest991850irq/53-eth0-rx-07:11:472
455199181cyclictest811rcuc/1009:07:592
455199181cyclictest232692chrt10:23:322
455199181cyclictest132552chrt08:01:042
455199181cyclictest12850irq/42-ahci10:47:062
455199181cyclictest127962chrt07:16:352
455099181cyclictest15101-1kworker/9:1H09:46:2911
455099181cyclictest0-21swapper/912:25:1311
455099181cyclictest0-21swapper/912:17:0811
455099181cyclictest0-21swapper/911:43:3611
455099181cyclictest0-21swapper/911:19:4911
455099181cyclictest0-21swapper/911:06:1411
455099181cyclictest0-21swapper/911:00:4511
455099181cyclictest0-21swapper/910:45:2511
455099181cyclictest0-21swapper/910:44:1511
455099181cyclictest0-21swapper/910:10:1211
455099181cyclictest0-21swapper/910:10:1211
455099181cyclictest0-21swapper/910:08:4011
455099181cyclictest0-21swapper/909:57:0611
455099181cyclictest0-21swapper/909:40:3711
455099181cyclictest0-21swapper/909:26:3711
455099181cyclictest0-21swapper/907:43:3811
454199180cyclictest0-21swapper/010:42:410
454199180cyclictest0-21swapper/010:29:360
454199180cyclictest0-21swapper/009:25:220
454199180cyclictest0-21swapper/007:52:090
991850170irq/53-eth0-rx-0-21swapper/910:16:0811
4551991716cyclictest0-21swapper/1007:30:222
4551991716cyclictest0-21swapper/1007:25:082
455199170cyclictest991850irq/53-eth0-rx-11:52:232
455199170cyclictest991850irq/53-eth0-rx-11:30:022
455199170cyclictest991850irq/53-eth0-rx-11:05:502
455199170cyclictest991850irq/53-eth0-rx-11:00:352
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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