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2026-07-13 - 00:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Sun Jul 12, 2026 12:46:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549501080irq/53-eth0-rx-0-21swapper/707:05:259
14510210895sleep90-21swapper/907:05:5711
30549501020irq/53-eth0-rx-0-21swapper/107:09:481
30549501010irq/53-eth0-rx-0-21swapper/407:05:536
122501010irq/42-ahci0-21swapper/207:09:544
12250950irq/42-ahci0-21swapper/807:09:5710
3055050930irq/54-eth0-tx-0-21swapper/507:05:247
3054950920irq/53-eth0-rx-0-21swapper/1007:05:472
3054950910irq/53-eth0-rx-0-21swapper/307:06:015
3054950870irq/53-eth0-rx-0-21swapper/1107:07:283
1485926762sleep00-21swapper/007:09:480
1448625955sleep60-21swapper/607:05:438
15021993925cyclictest184562sleep1107:13:113
1502099192cyclictest3054950irq/53-eth0-rx-12:32:582
1502099192cyclictest3054950irq/53-eth0-rx-12:32:582
1502099192cyclictest3054950irq/53-eth0-rx-11:37:482
1502099192cyclictest3054950irq/53-eth0-rx-11:33:412
1502099192cyclictest3054950irq/53-eth0-rx-10:19:422
1502099192cyclictest3054950irq/53-eth0-rx-10:02:032
1502099192cyclictest3054950irq/53-eth0-rx-09:45:522
1502099192cyclictest3054950irq/53-eth0-rx-09:38:542
1502099192cyclictest3054950irq/53-eth0-rx-09:27:122
1502099192cyclictest3054950irq/53-eth0-rx-09:27:112
15020991917cyclictest25998-1kworker/10:1H07:35:182
1502199184cyclictest0-21swapper/1111:20:003
15020991817cyclictest0-21swapper/1011:47:022
15020991817cyclictest0-21swapper/1011:43:212
15020991817cyclictest0-21swapper/1011:25:052
15020991817cyclictest0-21swapper/1009:22:122
15020991817cyclictest0-21swapper/1009:18:232
15020991817cyclictest0-21swapper/1008:39:332
1502099181cyclictest3055050irq/54-eth0-tx-12:22:322
1502099181cyclictest3055050irq/54-eth0-tx-12:22:322
1502099181cyclictest3055050irq/54-eth0-tx-11:05:082
1502099181cyclictest3055050irq/54-eth0-tx-10:53:022
1502099181cyclictest3055050irq/54-eth0-tx-10:28:442
1502099181cyclictest3055050irq/54-eth0-tx-10:10:362
1502099181cyclictest3054950irq/53-eth0-rx-12:38:062
1502099181cyclictest3054950irq/53-eth0-rx-11:22:332
1502099181cyclictest3054950irq/53-eth0-rx-11:19:262
1502099181cyclictest3054950irq/53-eth0-rx-11:11:322
1502099181cyclictest3054950irq/53-eth0-rx-11:01:062
1502099181cyclictest3054950irq/53-eth0-rx-10:59:222
1502099181cyclictest3054950irq/53-eth0-rx-10:46:582
1502099181cyclictest3054950irq/53-eth0-rx-10:31:432
1502099181cyclictest3054950irq/53-eth0-rx-10:20:352
1502099181cyclictest3054950irq/53-eth0-rx-09:59:052
1502099181cyclictest3054950irq/53-eth0-rx-09:54:222
1502099181cyclictest3054950irq/53-eth0-rx-09:40:472
1502099181cyclictest3054950irq/53-eth0-rx-09:40:462
1502099181cyclictest3054950irq/53-eth0-rx-09:14:492
1502099181cyclictest3054950irq/53-eth0-rx-08:19:142
1502099181cyclictest3054950irq/53-eth0-rx-08:05:452
1502099181cyclictest3054950irq/53-eth0-rx-07:45:192
1502099181cyclictest3054950irq/53-eth0-rx-07:19:272
1502099181cyclictest12250irq/42-ahci08:23:582
1502099181cyclictest12250irq/42-ahci08:10:252
1502099181cyclictest12250irq/42-ahci07:10:422
1502099181cyclictest114150irq/18-i801_smb10:08:002
1502099170cyclictest831ksoftirqd/1008:40:232
1502099170cyclictest69972sleep1007:40:132
1502099170cyclictest64562chrt09:05:342
1502099170cyclictest320602sleep1009:30:032
1502099170cyclictest314952sleep1008:55:472
1502099170cyclictest3055050irq/54-eth0-tx-12:15:082
1502099170cyclictest3054950irq/53-eth0-rx-12:25:262
1502099170cyclictest3054950irq/53-eth0-rx-12:25:252
1502099170cyclictest3054950irq/53-eth0-rx-12:10:172
1502099170cyclictest3054950irq/53-eth0-rx-12:05:112
1502099170cyclictest3054950irq/53-eth0-rx-12:05:102
1502099170cyclictest3054950irq/53-eth0-rx-11:55:102
1502099170cyclictest3054950irq/53-eth0-rx-11:50:022
1502099170cyclictest3054950irq/53-eth0-rx-10:35:122
1502099170cyclictest3054950irq/53-eth0-rx-09:00:202
1502099170cyclictest3054950irq/53-eth0-rx-08:30:482
1502099170cyclictest3054950irq/53-eth0-rx-08:25:202
1502099170cyclictest3054950irq/53-eth0-rx-07:31:452
1502099170cyclictest3054950irq/53-eth0-rx-07:25:072
1502099170cyclictest278422sleep1008:50:332
1502099170cyclictest268692chrt07:20:582
1502099170cyclictest250702sleep1012:00:202
1502099170cyclictest241992sleep1008:45:322
1502099170cyclictest208822sleep1008:00:032
1502099170cyclictest200682chrt07:56:152
1502099170cyclictest164152sleep1007:51:022
1502099170cyclictest12250irq/42-ahci10:40:112
1501799173cyclictest0-21swapper/712:10:189
15008991716cyclictest6710-21qemu-kvm09:08:457
15008991716cyclictest15120-21qemu-kvm10:45:107
15008991715cyclictest15123-21qemu-kvm10:40:107
15008991715cyclictest15123-21qemu-kvm10:15:007
14996991716cyclictest7001-21turbostat10:59:556
14970991715cyclictest4648-21snmp_rack3slot912:36:014
14970991715cyclictest2305-21snmpd12:09:314
14970991715cyclictest2305-21snmpd12:09:314
14970991715cyclictest2305-21snmpd07:35:434
1502199160cyclictest0-21swapper/1109:17:173
1501899165cyclictest0-21swapper/809:30:0010
1501899165cyclictest0-21swapper/809:30:0010
15008991615cyclictest15120-21qemu-kvm10:35:137
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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