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2026-07-20 - 17:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Mon Jul 20, 2026 12:46:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
122501140irq/42-ahci0-21swapper/207:09:544
122501140irq/42-ahci0-21swapper/207:09:544
17759210894sleep30-21swapper/307:07:195
17759210894sleep30-21swapper/307:07:195
17735210895sleep100-21swapper/1007:07:022
17735210895sleep100-21swapper/1007:07:022
30549501040irq/53-eth0-rx-0-21swapper/107:08:261
30549501040irq/53-eth0-rx-0-21swapper/107:08:251
17664210492sleep60-21swapper/607:06:108
17664210492sleep60-21swapper/607:06:108
3054950940irq/53-eth0-rx-0-21swapper/407:06:006
3054950940irq/53-eth0-rx-0-21swapper/407:05:596
3054950930irq/53-eth0-rx-0-21swapper/507:06:117
3054950930irq/53-eth0-rx-0-21swapper/507:06:107
3054950920irq/53-eth0-rx-0-21swapper/707:09:129
3054950920irq/53-eth0-rx-0-21swapper/707:09:129
3054950900irq/53-eth0-rx-0-21swapper/807:05:3610
3054950900irq/53-eth0-rx-0-21swapper/807:05:3510
3054950660irq/53-eth0-rx-0-21swapper/1107:05:513
3054950660irq/53-eth0-rx-0-21swapper/1107:05:503
1773826460sleep00-21swapper/007:07:040
1773826460sleep00-21swapper/007:07:040
1776526353sleep90-21swapper/907:07:2511
1776526353sleep90-21swapper/907:07:2511
18115993617cyclictest0-21swapper/010:14:310
18115993617cyclictest0-21swapper/008:26:520
1815799310cyclictest0-21swapper/1107:20:463
18156992816cyclictest831ksoftirqd/1012:25:132
18156992811cyclictest831ksoftirqd/1011:55:462
18156992811cyclictest831ksoftirqd/1010:42:452
18156992811cyclictest831ksoftirqd/1010:34:452
18156992811cyclictest831ksoftirqd/1010:34:442
18156992811cyclictest831ksoftirqd/1009:30:252
18156992811cyclictest831ksoftirqd/1007:10:182
18156992710cyclictest831ksoftirqd/1010:12:112
18156992524cyclictest0-21swapper/1011:45:212
18115992524cyclictest0-21swapper/010:20:060
18115992524cyclictest0-21swapper/010:20:050
18115992321cyclictest0-21swapper/010:19:530
1815699214cyclictest831ksoftirqd/1011:54:342
1811599210cyclictest0-21swapper/009:23:560
1811599210cyclictest0-21swapper/007:24:140
1815799194cyclictest0-21swapper/1109:28:533
1815799190cyclictest3054950irq/53-eth0-rx-10:15:193
1815699192cyclictest831ksoftirqd/1012:36:532
1815699192cyclictest831ksoftirqd/1012:32:212
1815699192cyclictest3055050irq/54-eth0-tx-11:18:522
1815699192cyclictest3054950irq/53-eth0-rx-10:58:452
1815599192cyclictest0-21swapper/910:47:3211
1815599192cyclictest0-21swapper/910:41:1811
1815599192cyclictest0-21swapper/910:16:4811
1815599192cyclictest0-21swapper/909:23:5211
18155991910cyclictest0-21swapper/911:10:4911
18155991910cyclictest0-21swapper/908:16:4711
1815299195cyclictest0-21swapper/612:10:198
18152991916cyclictest9901-21qemu-kvm09:15:148
1813999193cyclictest1304-21cstates12:05:125
18156991817cyclictest831ksoftirqd/1009:46:292
18156991817cyclictest831ksoftirqd/1009:18:122
18156991817cyclictest831ksoftirqd/1007:35:112
18156991817cyclictest4059-21ssh10:21:142
18156991817cyclictest4059-21ssh10:21:142
18156991817cyclictest3830-21kworker/10:111:01:302
18156991817cyclictest15799-1kworker/10:2H08:46:332
18156991817cyclictest0-21swapper/1012:20:502
18156991817cyclictest0-21swapper/1011:37:422
18156991817cyclictest0-21swapper/1011:12:042
18156991817cyclictest0-21swapper/1009:14:542
18156991817cyclictest0-21swapper/1008:22:582
1815699181cyclictest831ksoftirqd/1012:15:272
1815699181cyclictest831ksoftirqd/1012:05:202
1815699181cyclictest831ksoftirqd/1012:01:342
1815699181cyclictest831ksoftirqd/1011:40:122
1815699181cyclictest831ksoftirqd/1011:26:252
1815699181cyclictest831ksoftirqd/1011:20:472
1815699181cyclictest831ksoftirqd/1010:35:122
1815699181cyclictest831ksoftirqd/1010:29:142
1815699181cyclictest831ksoftirqd/1010:15:112
1815699181cyclictest831ksoftirqd/1010:02:312
1815699181cyclictest831ksoftirqd/1009:55:282
1815699181cyclictest831ksoftirqd/1009:25:212
1815699181cyclictest831ksoftirqd/1008:40:112
1815699181cyclictest831ksoftirqd/1008:30:132
1815699181cyclictest831ksoftirqd/1008:29:142
1815699181cyclictest831ksoftirqd/1007:45:002
1815699181cyclictest3054950irq/53-eth0-rx-11:30:092
1815699181cyclictest3054950irq/53-eth0-rx-11:05:162
1815699181cyclictest3054950irq/53-eth0-rx-09:51:332
1815699181cyclictest3054950irq/53-eth0-rx-09:42:322
1815699181cyclictest3054950irq/53-eth0-rx-09:37:222
1815699181cyclictest3054950irq/53-eth0-rx-09:20:082
1815699181cyclictest114150irq/18-i801_smb07:52:472
18155991810cyclictest0-21swapper/912:30:2211
18155991810cyclictest0-21swapper/912:13:1311
18155991810cyclictest0-21swapper/911:51:2811
18155991810cyclictest0-21swapper/911:30:4811
18155991810cyclictest0-21swapper/911:24:5311
18155991810cyclictest0-21swapper/911:02:1711
18155991810cyclictest0-21swapper/910:12:4111
18155991810cyclictest0-21swapper/910:05:4211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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