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2026-08-30 - 12:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Sun Aug 30, 2026 00:46:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549501080irq/53-eth0-rx-0-21swapper/119:07:481
122501080irq/42-ahci0-21swapper/719:09:459
30549501070irq/53-eth0-rx-0-21swapper/219:08:434
12250910irq/42-ahci0-21swapper/819:08:2710
1099890migration/00-21swapper/019:08:010
125228877sleep30-21swapper/319:06:345
4099850migration/40-21swapper/419:08:006
156527674sleep90-21swapper/919:09:5211
128827262sleep100-21swapper/1019:07:042
135425955sleep60-21swapper/619:08:018
13450570irq/18-ehci_hcd0-21swapper/519:09:437
137425248sleep110-21swapper/1119:08:063
1723992423cyclictest10213-1kworker/11:2H21:22:533
172299192cyclictest3054950irq/53-eth0-rx-23:32:292
172299192cyclictest3054950irq/53-eth0-rx-23:17:372
172299192cyclictest3054950irq/53-eth0-rx-22:31:382
172299192cyclictest3054950irq/53-eth0-rx-21:54:562
172299192cyclictest3054950irq/53-eth0-rx-21:48:592
172299192cyclictest3054950irq/53-eth0-rx-00:33:112
172299192cyclictest3054950irq/53-eth0-rx-00:26:042
172299192cyclictest3054950irq/53-eth0-rx-00:26:032
172299192cyclictest217862sleep1021:31:342
172299192cyclictest217862sleep1021:31:342
172299192cyclictest12250irq/42-ahci20:05:002
172199192cyclictest0-21swapper/922:52:3911
172199192cyclictest0-21swapper/922:23:4411
172199192cyclictest0-21swapper/921:43:3511
1723991810cyclictest3054950irq/53-eth0-rx-22:18:433
172399180cyclictest0-21swapper/1121:08:153
172399180cyclictest0-21swapper/1100:15:413
1722991817cyclictest0-21swapper/1023:35:522
1722991817cyclictest0-21swapper/1022:10:562
1722991817cyclictest0-21swapper/1000:18:222
172299181cyclictest3055050irq/54-eth0-tx-22:59:512
172299181cyclictest3055050irq/54-eth0-tx-22:05:322
172299181cyclictest3054950irq/53-eth0-rx-23:59:002
172299181cyclictest3054950irq/53-eth0-rx-23:54:232
172299181cyclictest3054950irq/53-eth0-rx-23:45:212
172299181cyclictest3054950irq/53-eth0-rx-23:44:072
172299181cyclictest3054950irq/53-eth0-rx-23:20:092
172299181cyclictest3054950irq/53-eth0-rx-23:07:332
172299181cyclictest3054950irq/53-eth0-rx-22:52:492
172299181cyclictest3054950irq/53-eth0-rx-22:45:522
172299181cyclictest3054950irq/53-eth0-rx-22:24:202
172299181cyclictest3054950irq/53-eth0-rx-21:38:132
172299181cyclictest3054950irq/53-eth0-rx-21:20:032
172299181cyclictest3054950irq/53-eth0-rx-21:15:262
172299181cyclictest3054950irq/53-eth0-rx-21:15:252
172299181cyclictest3054950irq/53-eth0-rx-21:10:512
172299181cyclictest3054950irq/53-eth0-rx-20:28:132
172299181cyclictest3054950irq/53-eth0-rx-19:39:042
172299181cyclictest3054950irq/53-eth0-rx-19:21:272
172299181cyclictest3054950irq/53-eth0-rx-00:06:542
1721991816cyclictest31062-21chrt00:19:2811
1721991816cyclictest25167-21chrt21:07:1711
172199181cyclictest587-21sh23:26:0711
172199181cyclictest3054950irq/53-eth0-rx-20:58:3711
172199181cyclictest0-21swapper/923:04:3711
172199181cyclictest0-21swapper/922:15:1011
172199181cyclictest0-21swapper/922:03:4711
172199181cyclictest0-21swapper/921:46:0011
172199181cyclictest0-21swapper/921:25:5311
172199181cyclictest0-21swapper/919:15:0311
172199181cyclictest0-21swapper/900:39:5711
172199181cyclictest0-21swapper/900:12:0611
1720991816cyclictest0-21swapper/823:19:5510
1708991816cyclictest5588-21iostat_ios20:40:154
1695991815cyclictest0-21swapper/021:20:090
172399179cyclictest12250irq/42-ahci22:24:563
172399173cyclictest0-21swapper/1123:41:093
172399173cyclictest0-21swapper/1120:59:043
1723991715cyclictest214772sleep1120:16:013
172299170cyclictest75692sleep1000:00:032
172299170cyclictest327292sleep1019:50:102
172299170cyclictest3054950irq/53-eth0-rx-23:25:062
172299170cyclictest3054950irq/53-eth0-rx-23:10:102
172299170cyclictest3054950irq/53-eth0-rx-23:00:432
172299170cyclictest3054950irq/53-eth0-rx-22:40:012
172299170cyclictest3054950irq/53-eth0-rx-22:35:022
172299170cyclictest3054950irq/53-eth0-rx-22:26:162
172299170cyclictest3054950irq/53-eth0-rx-22:15:202
172299170cyclictest3054950irq/53-eth0-rx-22:00:302
172299170cyclictest3054950irq/53-eth0-rx-21:56:172
172299170cyclictest3054950irq/53-eth0-rx-21:40:302
172299170cyclictest3054950irq/53-eth0-rx-20:40:152
172299170cyclictest3054950irq/53-eth0-rx-20:35:202
172299170cyclictest3054950irq/53-eth0-rx-20:10:402
172299170cyclictest3054950irq/53-eth0-rx-19:55:072
172299170cyclictest3054950irq/53-eth0-rx-19:45:372
172299170cyclictest3054950irq/53-eth0-rx-19:30:192
172299170cyclictest3054950irq/53-eth0-rx-19:25:342
172299170cyclictest3054950irq/53-eth0-rx-19:15:262
172299170cyclictest3054950irq/53-eth0-rx-19:10:392
172299170cyclictest3054950irq/53-eth0-rx-00:35:152
172299170cyclictest3054950irq/53-eth0-rx-00:20:242
172299170cyclictest3054950irq/53-eth0-rx-00:10:322
172299170cyclictest282642sleep1019:41:072
172299170cyclictest250222chrt21:05:292
172299170cyclictest231612chrt20:20:122
172299170cyclictest208662sleep1020:15:242
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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