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2026-07-07 - 17:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Tue Jul 07, 2026 12:46:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549501190irq/53-eth0-rx-0-21swapper/107:09:301
8899211296sleep30-21swapper/307:06:215
9019210795sleep100-21swapper/1007:07:522
8994210692sleep110-21swapper/1107:07:283
30549501000irq/53-eth0-rx-0-21swapper/707:09:469
12250990irq/42-ahci0-21swapper/207:08:244
3054950920irq/53-eth0-rx-0-21swapper/807:08:0610
3054950920irq/53-eth0-rx-0-21swapper/407:05:296
3054950880irq/53-eth0-rx-0-21swapper/507:06:057
891826553sleep00-21swapper/007:06:300
909226353sleep60-21swapper/607:08:128
897225955sleep90-21swapper/907:07:1511
934999290cyclictest0-21swapper/007:27:200
3054950280irq/53-eth0-rx-0-21swapper/707:27:359
3054950280irq/53-eth0-rx-0-21swapper/1007:27:252
938699269cyclictest831ksoftirqd/1011:58:392
934999260cyclictest0-21swapper/010:29:250
938699247cyclictest831ksoftirqd/1012:23:452
938699236cyclictest831ksoftirqd/1012:27:122
3054950230irq/53-eth0-rx-0-21swapper/107:27:281
934999210cyclictest0-21swapper/009:13:170
938699192cyclictest3055050irq/54-eth0-tx-10:33:052
938699192cyclictest3054950irq/53-eth0-rx-11:52:512
938699192cyclictest3054950irq/53-eth0-rx-10:25:522
938699192cyclictest3054950irq/53-eth0-rx-10:20:032
938699192cyclictest3054950irq/53-eth0-rx-09:26:102
938699192cyclictest3054950irq/53-eth0-rx-09:26:102
938699192cyclictest3054950irq/53-eth0-rx-09:12:402
9386991817cyclictest28311-21snmp_rack3slot911:46:242
9386991817cyclictest0-21swapper/1012:38:402
9386991817cyclictest0-21swapper/1011:26:042
9386991817cyclictest0-21swapper/1011:06:012
9386991817cyclictest0-21swapper/1011:00:262
9386991817cyclictest0-21swapper/1010:08:592
9386991817cyclictest0-21swapper/1009:56:452
9386991817cyclictest0-21swapper/1009:36:332
9386991817cyclictest0-21swapper/1007:36:022
938699181cyclictest831ksoftirqd/1012:05:252
938699181cyclictest831ksoftirqd/1011:35:182
938699181cyclictest831ksoftirqd/1011:35:182
938699181cyclictest831ksoftirqd/1008:15:002
938699181cyclictest831ksoftirqd/1007:50:012
938699181cyclictest831ksoftirqd/1007:20:222
938699181cyclictest3055050irq/54-eth0-tx-11:11:472
938699181cyclictest3054950irq/53-eth0-rx-12:30:312
938699181cyclictest3054950irq/53-eth0-rx-12:11:562
938699181cyclictest3054950irq/53-eth0-rx-12:00:352
938699181cyclictest3054950irq/53-eth0-rx-12:00:352
938699181cyclictest3054950irq/53-eth0-rx-11:41:082
938699181cyclictest3054950irq/53-eth0-rx-11:32:472
938699181cyclictest3054950irq/53-eth0-rx-11:23:482
938699181cyclictest3054950irq/53-eth0-rx-10:42:232
938699181cyclictest3054950irq/53-eth0-rx-10:36:172
938699181cyclictest3054950irq/53-eth0-rx-10:16:432
938699181cyclictest3054950irq/53-eth0-rx-10:11:272
938699181cyclictest3054950irq/53-eth0-rx-10:00:242
938699181cyclictest3054950irq/53-eth0-rx-09:51:182
938699181cyclictest3054950irq/53-eth0-rx-09:48:362
938699181cyclictest3054950irq/53-eth0-rx-09:41:102
938699181cyclictest3054950irq/53-eth0-rx-09:32:572
938699181cyclictest3054950irq/53-eth0-rx-09:21:222
938699181cyclictest12250irq/42-ahci08:08:202
938699181cyclictest12250irq/42-ahci08:01:092
9385991816cyclictest3030-21ssh10:59:5011
9385991816cyclictest21757-21proc_pri12:35:2211
938599181cyclictest3054950irq/53-eth0-rx-10:15:5411
938599181cyclictest0-21swapper/912:12:3411
938599181cyclictest0-21swapper/911:34:2411
938599181cyclictest0-21swapper/911:14:3211
938599181cyclictest0-21swapper/909:55:1311
938599181cyclictest0-21swapper/909:44:0411
938599181cyclictest0-21swapper/909:10:4411
938599181cyclictest0-21swapper/908:15:1711
938499180cyclictest0-21swapper/809:35:0110
9381991816cyclictest29543-21snmp_rack3slot909:00:367
9364991816cyclictest29135-21snmp_easybox.os10:25:254
9364991816cyclictest19287-21snmp_rack3slot907:20:114
9364991816cyclictest13886-21iostat10:40:164
9364991816cyclictest13842-21diskstats11:35:114
9364991816cyclictest13842-21diskstats11:35:114
9364991816cyclictest13504-21snmp_rack3slot912:00:494
9364991816cyclictest13504-21snmp_rack3slot912:00:494
935699183cyclictest0-21swapper/110:50:271
935699183cyclictest0-21swapper/109:56:091
935699182cyclictest0-21swapper/109:26:431
935699182cyclictest0-21swapper/109:26:431
9387991716cyclictest197822sleep1110:19:143
9386991716cyclictest831ksoftirqd/1007:40:142
9386991716cyclictest0-21swapper/1008:21:042
9386991716cyclictest0-21swapper/1007:55:152
938699170cyclictest831ksoftirqd/1011:15:112
938699170cyclictest831ksoftirqd/1010:45:012
938699170cyclictest72572sleep1007:47:432
938699170cyclictest318832sleep1009:05:162
938699170cyclictest3054950irq/53-eth0-rx-12:15:112
938699170cyclictest3054950irq/53-eth0-rx-10:55:082
938699170cyclictest3054950irq/53-eth0-rx-10:50:172
938699170cyclictest3054950irq/53-eth0-rx-09:15:142
938699170cyclictest3054950irq/53-eth0-rx-09:15:142
938699170cyclictest3054950irq/53-eth0-rx-09:00:012
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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