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2026-08-05 - 16:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Wed Aug 05, 2026 12:46:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15933210994sleep100-21swapper/1007:07:042
15963210592sleep10-21swapper/107:07:311
30549501040irq/53-eth0-rx-0-21swapper/207:09:344
15845210491sleep60-21swapper/607:05:488
122501000irq/42-ahci0-21swapper/307:08:585
3054950970irq/53-eth0-rx-0-21swapper/507:07:297
3054950950irq/53-eth0-rx-0-21swapper/807:09:2210
3054950940irq/53-eth0-rx-0-21swapper/707:08:519
3054950910irq/53-eth0-rx-0-21swapper/407:07:566
1596028271sleep110-21swapper/1107:07:293
171450750irq/56-eth1-rx-0-21swapper/907:08:3911
1583926654sleep00-21swapper/007:05:420
16342993617cyclictest0-21swapper/1109:19:153
1634299237cyclictest0-21swapper/1109:08:233
1634299237cyclictest0-21swapper/1109:08:233
1634199192cyclictest3054950irq/53-eth0-rx-12:37:032
1634199192cyclictest3054950irq/53-eth0-rx-12:30:592
1634199192cyclictest3054950irq/53-eth0-rx-12:29:022
1634199192cyclictest3054950irq/53-eth0-rx-12:01:122
1634199192cyclictest3054950irq/53-eth0-rx-10:45:102
1634199192cyclictest3054950irq/53-eth0-rx-09:44:592
1634099192cyclictest0-21swapper/912:02:2311
1634099192cyclictest0-21swapper/911:26:3011
3055050180irq/54-eth0-tx-0-21swapper/209:11:544
3054950180irq/53-eth0-rx-0-21swapper/709:11:219
3054950180irq/53-eth0-rx-0-21swapper/1109:11:583
16342991816cyclictest286192sleep1108:11:233
16341991817cyclictest67642sleep1011:37:242
16341991817cyclictest0-21swapper/1009:10:172
1634199181cyclictest3055050irq/54-eth0-tx-11:41:292
1634199181cyclictest3055050irq/54-eth0-tx-10:18:502
1634199181cyclictest3055050irq/54-eth0-tx-09:48:372
1634199181cyclictest3054950irq/53-eth0-rx-12:22:062
1634199181cyclictest3054950irq/53-eth0-rx-12:18:162
1634199181cyclictest3054950irq/53-eth0-rx-12:12:052
1634199181cyclictest3054950irq/53-eth0-rx-12:05:062
1634199181cyclictest3054950irq/53-eth0-rx-11:58:292
1634199181cyclictest3054950irq/53-eth0-rx-11:52:212
1634199181cyclictest3054950irq/53-eth0-rx-11:17:462
1634199181cyclictest3054950irq/53-eth0-rx-11:13:272
1634199181cyclictest3054950irq/53-eth0-rx-10:57:552
1634199181cyclictest3054950irq/53-eth0-rx-10:51:172
1634199181cyclictest3054950irq/53-eth0-rx-10:41:042
1634199181cyclictest3054950irq/53-eth0-rx-10:13:062
1634199181cyclictest3054950irq/53-eth0-rx-10:06:132
1634199181cyclictest3054950irq/53-eth0-rx-09:50:082
1634199181cyclictest3054950irq/53-eth0-rx-09:27:352
1634199181cyclictest12250irq/42-ahci07:26:422
1634099184cyclictest0-21swapper/912:35:5711
1634099181cyclictest3055050irq/54-eth0-tx-09:42:5811
1634099181cyclictest0-21swapper/909:30:2411
1633999184cyclictest0-21swapper/810:50:1810
1633899184cyclictest0-21swapper/710:15:189
1633899180cyclictest0-21swapper/710:20:409
1633899180cyclictest0-21swapper/710:20:399
16302991816cyclictest17754-21snmp_rack3slot910:01:254
3055050170irq/54-eth0-tx-0-21swapper/810:20:4910
3055050170irq/54-eth0-tx-0-21swapper/810:20:4910
3055050170irq/54-eth0-tx-0-21swapper/109:11:571
1634299170cyclictest0-21swapper/1110:24:423
1634299170cyclictest0-21swapper/1110:24:423
16341991716cyclictest0-21swapper/1011:00:022
1634199170cyclictest97512sleep1010:20:372
1634199170cyclictest97512sleep1010:20:372
1634199170cyclictest4992sleep1008:36:502
1634199170cyclictest48522chrt09:00:272
1634199170cyclictest32172chrt08:51:512
1634199170cyclictest321392sleep1008:32:132
1634199170cyclictest311472sleep1008:25:242
1634199170cyclictest3055050irq/54-eth0-tx-09:32:002
1634199170cyclictest3054950irq/53-eth0-rx-11:46:052
1634199170cyclictest3054950irq/53-eth0-rx-11:30:332
1634199170cyclictest3054950irq/53-eth0-rx-11:26:272
1634199170cyclictest3054950irq/53-eth0-rx-11:05:202
1634199170cyclictest3054950irq/53-eth0-rx-10:00:322
1634199170cyclictest3054950irq/53-eth0-rx-09:55:502
1634199170cyclictest3054950irq/53-eth0-rx-08:55:192
1634199170cyclictest3054950irq/53-eth0-rx-08:06:452
1634199170cyclictest3054950irq/53-eth0-rx-07:56:112
1634199170cyclictest3054950irq/53-eth0-rx-07:40:142
1634199170cyclictest3054950irq/53-eth0-rx-07:22:262
1634199170cyclictest294682sleep1008:16:102
1634199170cyclictest285922sleep1008:10:582
1634199170cyclictest267522sleep1008:00:342
1634199170cyclictest267522sleep1008:00:342
1634199170cyclictest242082sleep1007:46:192
1634199170cyclictest239632sleep1009:35:192
1634199170cyclictest224322sleep1007:35:312
1634199170cyclictest215722sleep1007:30:302
1634199170cyclictest205242sleep1011:22:212
1634199170cyclictest189722sleep1007:15:282
1634199170cyclictest168432sleep1007:10:512
1634199170cyclictest159652sleep1010:25:382
1634199170cyclictest135142sleep1009:20:072
1634199170cyclictest12612sleep1008:40:012
1634199170cyclictest12250irq/42-ahci10:35:062
1634199170cyclictest12250irq/42-ahci10:30:202
1634199170cyclictest12250irq/42-ahci09:06:372
1634199170cyclictest12250irq/42-ahci09:06:372
1634199170cyclictest12250irq/42-ahci08:45:412
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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