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2026-03-19 - 13:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Thu Mar 19, 2026 00:46:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501170irq/53-eth0-rx-0-21swapper/219:09:304
8911210997sleep10-21swapper/119:06:201
8919210693sleep70-21swapper/719:06:259
9918501020irq/53-eth0-rx-0-21swapper/419:06:376
991850950irq/53-eth0-rx-0-21swapper/519:06:597
12850940irq/42-ahci0-21swapper/319:09:285
991850910irq/53-eth0-rx-0-21swapper/1119:07:183
991850890irq/53-eth0-rx-0-21swapper/819:07:2410
172450700irq/56-eth1-rx-0-21swapper/919:09:3611
899726858sleep60-21swapper/619:07:258
916626157sleep100-21swapper/1019:08:532
896325853sleep00-21swapper/019:06:540
935699290cyclictest25493-21chrt21:29:220
9397992827cyclictest0-21swapper/1121:21:233
939799250cyclictest0-21swapper/1121:25:183
939799220cyclictest0-21swapper/1120:17:213
935699200cyclictest0-21swapper/021:16:310
9396991917cyclictest811rcuc/1021:13:302
939599192cyclictest991850irq/53-eth0-rx-23:42:5311
939599192cyclictest0-21swapper/923:57:1711
939599192cyclictest0-21swapper/923:53:2411
939599192cyclictest0-21swapper/923:24:0411
9392991917cyclictest0-21swapper/621:04:568
939699182cyclictest991850irq/53-eth0-rx-23:13:182
939699182cyclictest991850irq/53-eth0-rx-00:23:112
9396991817cyclictest29274-21ssh23:42:442
9396991817cyclictest0-21swapper/1023:56:592
9396991817cyclictest0-21swapper/1023:47:112
9396991817cyclictest0-21swapper/1023:06:422
9396991817cyclictest0-21swapper/1022:21:352
9396991817cyclictest0-21swapper/1022:15:092
9396991817cyclictest0-21swapper/1022:11:052
9396991817cyclictest0-21swapper/1022:01:142
9396991817cyclictest0-21swapper/1021:40:352
9396991817cyclictest0-21swapper/1019:49:062
9396991817cyclictest0-21swapper/1019:24:432
9396991817cyclictest0-21swapper/1019:18:192
9396991817cyclictest0-21swapper/1000:27:012
939699181cyclictest991950irq/54-eth0-tx-22:57:442
939699181cyclictest991950irq/54-eth0-tx-22:36:562
939699181cyclictest991950irq/54-eth0-tx-00:14:562
939699181cyclictest991950irq/54-eth0-tx-00:14:562
939699181cyclictest991850irq/53-eth0-rx-23:33:152
939699181cyclictest991850irq/53-eth0-rx-23:20:062
939699181cyclictest991850irq/53-eth0-rx-22:45:022
939699181cyclictest991850irq/53-eth0-rx-22:43:402
939699181cyclictest991850irq/53-eth0-rx-22:06:362
939699181cyclictest991850irq/53-eth0-rx-21:55:262
939699181cyclictest991850irq/53-eth0-rx-21:36:312
939699181cyclictest991850irq/53-eth0-rx-21:25:572
939699181cyclictest991850irq/53-eth0-rx-20:34:512
939699181cyclictest991850irq/53-eth0-rx-20:34:502
939699181cyclictest991850irq/53-eth0-rx-00:34:592
939699181cyclictest991850irq/53-eth0-rx-00:01:502
939699181cyclictest12850irq/42-ahci20:08:532
939599181cyclictest991950irq/54-eth0-tx-22:04:1411
939599181cyclictest991950irq/54-eth0-tx-21:46:2111
939599181cyclictest31567-21ssh00:36:3111
939599181cyclictest0-21swapper/923:36:0311
939599181cyclictest0-21swapper/923:27:3911
939599181cyclictest0-21swapper/923:19:2711
939599181cyclictest0-21swapper/919:15:1611
939599181cyclictest0-21swapper/900:19:1611
9392991816cyclictest22926-21munin-run00:05:008
939799170cyclictest0-21swapper/1100:35:213
9396991716cyclictest234482sleep1000:05:042
9396991716cyclictest20634-21perl20:50:142
9396991716cyclictest0-21swapper/1019:32:092
939699170cyclictest991950irq/54-eth0-tx-23:50:032
939699170cyclictest991850irq/53-eth0-rx-23:00:062
939699170cyclictest991850irq/53-eth0-rx-22:50:222
939699170cyclictest991850irq/53-eth0-rx-22:30:132
939699170cyclictest991850irq/53-eth0-rx-22:25:062
939699170cyclictest991850irq/53-eth0-rx-21:50:112
939699170cyclictest991850irq/53-eth0-rx-21:30:062
939699170cyclictest991850irq/53-eth0-rx-21:20:242
939699170cyclictest991850irq/53-eth0-rx-21:15:132
939699170cyclictest991850irq/53-eth0-rx-21:05:262
939699170cyclictest991850irq/53-eth0-rx-20:45:182
939699170cyclictest991850irq/53-eth0-rx-20:27:452
939699170cyclictest991850irq/53-eth0-rx-20:27:442
939699170cyclictest991850irq/53-eth0-rx-20:10:112
939699170cyclictest991850irq/53-eth0-rx-19:55:572
939699170cyclictest991850irq/53-eth0-rx-19:51:352
939699170cyclictest991850irq/53-eth0-rx-19:36:582
939699170cyclictest991850irq/53-eth0-rx-00:35:372
939699170cyclictest811rcuc/1019:40:192
939699170cyclictest65592sleep1023:25:092
939699170cyclictest50952sleep1000:15:152
939699170cyclictest283192chrt21:00:152
939699170cyclictest266072chrt23:15:082
939699170cyclictest259242chrt20:56:162
939699170cyclictest220672chrt19:25:052
939699170cyclictest188882sleep1023:35:112
939699170cyclictest152592chrt20:00:092
939699170cyclictest152032chrt20:44:032
939699170cyclictest152032chrt20:44:022
939699170cyclictest12850irq/42-ahci21:45:312
939699170cyclictest126932sleep1019:11:162
939699170cyclictest113632sleep1020:36:262
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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