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2026-07-02 - 08:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Thu Jul 02, 2026 00:46:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549501140irq/53-eth0-rx-0-21swapper/119:09:291
22793210997sleep90-21swapper/919:07:2411
22784210991sleep00-21swapper/019:07:150
22674210895sleep30-21swapper/319:05:535
22790210291sleep60-21swapper/619:07:218
22765210190sleep100-21swapper/1019:07:012
3054950950irq/53-eth0-rx-0-21swapper/219:05:414
3054950940irq/53-eth0-rx-0-21swapper/519:05:267
3054950930irq/53-eth0-rx-0-21swapper/819:06:1210
3054950890irq/53-eth0-rx-0-21swapper/719:07:439
3055050860irq/54-eth0-tx-0-21swapper/419:06:496
2268627571sleep110-21swapper/1119:06:023
2315099450cyclictest0-21swapper/020:30:120
2315099450cyclictest0-21swapper/020:30:120
2315099330cyclictest0-21swapper/021:11:500
23192993130cyclictest3054950irq/53-eth0-rx-21:11:492
23187993130cyclictest19433-21ssh21:11:589
23177993130cyclictest3054950irq/53-eth0-rx-21:11:486
3055050300irq/54-eth0-tx-0-21swapper/121:12:011
23163993029cyclictest3054950irq/53-eth0-rx-21:12:044
23190992928cyclictest3054950irq/53-eth0-rx-21:11:5910
23150992928cyclictest0-21swapper/021:24:100
3055050280irq/54-eth0-tx-0-21swapper/720:30:159
3055050280irq/54-eth0-tx-0-21swapper/720:30:159
3054950280irq/53-eth0-rx-0-21swapper/820:30:1810
3054950280irq/53-eth0-rx-0-21swapper/820:30:1710
3054950280irq/53-eth0-rx-0-21swapper/1020:30:212
3054950280irq/53-eth0-rx-0-21swapper/1020:30:212
23191992726cyclictest19402-21ssh21:11:5511
2319399220cyclictest0-21swapper/1122:28:103
23193992120cyclictest0-21swapper/1122:17:173
23171992120cyclictest15079-21diskmemload21:11:555
23193991917cyclictest0-21swapper/1121:08:393
2319299192cyclictest3055050irq/54-eth0-tx-21:15:222
2319299192cyclictest3054950irq/53-eth0-rx-23:48:312
2319299192cyclictest3054950irq/53-eth0-rx-22:57:552
2319299192cyclictest3054950irq/53-eth0-rx-22:16:552
2319299192cyclictest3054950irq/53-eth0-rx-21:21:032
2319299192cyclictest3054950irq/53-eth0-rx-00:38:442
2319199192cyclictest0-21swapper/923:33:3311
2319199192cyclictest0-21swapper/923:22:0111
2319199192cyclictest0-21swapper/923:22:0111
2319199192cyclictest0-21swapper/923:05:3411
2319199192cyclictest0-21swapper/923:05:3311
2319199192cyclictest0-21swapper/919:45:1211
2315099194cyclictest0-21swapper/022:28:000
23192991817cyclictest24686-21kworker/10:100:20:292
23192991817cyclictest0-21swapper/1022:35:582
2319299181cyclictest73432chrt21:30:042
2319299181cyclictest3055050irq/54-eth0-tx-21:41:502
2319299181cyclictest3054950irq/53-eth0-rx-23:58:562
2319299181cyclictest3054950irq/53-eth0-rx-23:41:412
2319299181cyclictest3054950irq/53-eth0-rx-23:30:092
2319299181cyclictest3054950irq/53-eth0-rx-23:10:032
2319299181cyclictest3054950irq/53-eth0-rx-23:08:212
2319299181cyclictest3054950irq/53-eth0-rx-23:08:202
2319299181cyclictest3054950irq/53-eth0-rx-23:00:422
2319299181cyclictest3054950irq/53-eth0-rx-22:51:012
2319299181cyclictest3054950irq/53-eth0-rx-22:47:132
2319299181cyclictest3054950irq/53-eth0-rx-22:43:062
2319299181cyclictest3054950irq/53-eth0-rx-22:32:182
2319299181cyclictest3054950irq/53-eth0-rx-22:22:512
2319299181cyclictest3054950irq/53-eth0-rx-22:09:442
2319299181cyclictest3054950irq/53-eth0-rx-21:35:152
2319299181cyclictest3054950irq/53-eth0-rx-19:29:062
2319299181cyclictest3054950irq/53-eth0-rx-00:30:222
2319299181cyclictest3054950irq/53-eth0-rx-00:19:222
2319299181cyclictest3054950irq/53-eth0-rx-00:00:212
2319299181cyclictest12250irq/42-ahci19:12:542
2319199181cyclictest3077-1kworker/9:0H20:36:3111
2319199181cyclictest0-21swapper/923:49:2311
2319199181cyclictest0-21swapper/923:12:1111
2319199181cyclictest0-21swapper/922:35:1711
2319199181cyclictest0-21swapper/922:18:4011
2319199181cyclictest0-21swapper/921:45:5611
2319199181cyclictest0-21swapper/921:27:0811
2319199181cyclictest0-21swapper/900:30:5711
23192991716cyclictest28522sleep1019:23:162
23192991716cyclictest0-21swapper/1021:45:002
2319299170cyclictest99862sleep1019:30:502
2319299170cyclictest90512sleep1023:20:072
2319299170cyclictest90512sleep1023:20:072
2319299170cyclictest70122sleep1020:12:192
2319299170cyclictest66092sleep1000:10:492
2319299170cyclictest64892sleep1023:16:172
2319299170cyclictest48572sleep1021:55:072
2319299170cyclictest38732sleep1020:52:352
2319299170cyclictest3055050irq/54-eth0-tx-00:05:082
2319299170cyclictest3054950irq/53-eth0-rx-23:50:492
2319299170cyclictest3054950irq/53-eth0-rx-23:35:302
2319299170cyclictest3054950irq/53-eth0-rx-22:25:122
2319299170cyclictest3054950irq/53-eth0-rx-22:10:222
2319299170cyclictest3054950irq/53-eth0-rx-21:50:092
2319299170cyclictest3054950irq/53-eth0-rx-21:25:042
2319299170cyclictest3054950irq/53-eth0-rx-20:40:242
2319299170cyclictest3054950irq/53-eth0-rx-20:40:232
2319299170cyclictest3054950irq/53-eth0-rx-20:25:222
2319299170cyclictest3054950irq/53-eth0-rx-20:20:112
2319299170cyclictest3054950irq/53-eth0-rx-19:40:212
2319299170cyclictest3054950irq/53-eth0-rx-00:25:052
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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