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2026-07-05 - 16:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Sun Jul 05, 2026 12:46:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
122501130irq/42-ahci0-21swapper/207:08:374
5346211095sleep70-21swapper/707:05:129
8179210891sleep00-21swapper/007:06:170
5343210895sleep40-21swapper/407:05:096
122501080irq/42-ahci0-21swapper/107:08:361
3054950950irq/53-eth0-rx-0-21swapper/507:05:207
3054950930irq/53-eth0-rx-0-21swapper/807:07:1210
3054950930irq/53-eth0-rx-0-21swapper/307:05:415
3054950870irq/53-eth0-rx-0-21swapper/907:05:2711
816227768sleep100-21swapper/1007:06:032
827026453sleep60-21swapper/607:07:248
832025853sleep110-21swapper/1107:08:053
861699260cyclictest0-21swapper/010:09:060
866399192cyclictest3054950irq/53-eth0-rx-11:09:572
866399192cyclictest3054950irq/53-eth0-rx-11:04:302
866399192cyclictest3054950irq/53-eth0-rx-10:41:002
866399192cyclictest3054950irq/53-eth0-rx-10:37:052
866399192cyclictest3054950irq/53-eth0-rx-10:07:252
866399192cyclictest3054950irq/53-eth0-rx-09:19:352
866299192cyclictest0-21swapper/909:46:1311
8669991816cyclictest3054950irq/53-eth0-rx-10:30:173
8663991817cyclictest0-21swapper/1012:01:182
8663991817cyclictest0-21swapper/1011:38:222
866399181cyclictest3055050irq/54-eth0-tx-11:22:412
866399181cyclictest3055050irq/54-eth0-tx-10:57:142
866399181cyclictest3055050irq/54-eth0-tx-09:52:022
866399181cyclictest3055050irq/54-eth0-tx-09:13:112
866399181cyclictest3054950irq/53-eth0-rx-12:35:382
866399181cyclictest3054950irq/53-eth0-rx-12:35:372
866399181cyclictest3054950irq/53-eth0-rx-12:21:292
866399181cyclictest3054950irq/53-eth0-rx-12:15:262
866399181cyclictest3054950irq/53-eth0-rx-12:15:252
866399181cyclictest3054950irq/53-eth0-rx-11:56:122
866399181cyclictest3054950irq/53-eth0-rx-11:33:482
866399181cyclictest3054950irq/53-eth0-rx-11:14:042
866399181cyclictest3054950irq/53-eth0-rx-10:47:342
866399181cyclictest3054950irq/53-eth0-rx-10:32:062
866399181cyclictest3054950irq/53-eth0-rx-10:29:392
866399181cyclictest3054950irq/53-eth0-rx-10:16:182
866399181cyclictest3054950irq/53-eth0-rx-10:12:342
866399181cyclictest3054950irq/53-eth0-rx-10:01:312
866399181cyclictest3054950irq/53-eth0-rx-09:56:252
866399181cyclictest3054950irq/53-eth0-rx-09:47:402
866399181cyclictest3054950irq/53-eth0-rx-09:31:252
866399181cyclictest3054950irq/53-eth0-rx-09:26:332
866399181cyclictest3054950irq/53-eth0-rx-07:35:182
866399181cyclictest12250irq/42-ahci12:12:252
866399180cyclictest155132sleep1007:15:162
866399180cyclictest144942sleep1008:44:022
866299181cyclictest21531-1kworker/9:2H09:17:3611
866299181cyclictest0-21swapper/912:39:3511
866299181cyclictest0-21swapper/912:39:3411
866299181cyclictest0-21swapper/912:05:2611
866299181cyclictest0-21swapper/912:00:1911
866299181cyclictest0-21swapper/911:45:1711
866299181cyclictest0-21swapper/911:35:4011
866299181cyclictest0-21swapper/911:25:3611
866299181cyclictest0-21swapper/911:07:4311
866299181cyclictest0-21swapper/910:55:3111
866299181cyclictest0-21swapper/910:54:0111
866299181cyclictest0-21swapper/910:30:1811
866299181cyclictest0-21swapper/909:59:3511
866299181cyclictest0-21swapper/908:05:1511
866299181cyclictest0-21swapper/908:05:1411
866299181cyclictest0-21swapper/907:40:1611
8659991816cyclictest21231-21qemu-kvm08:24:098
866399170cyclictest72262sleep1007:50:072
866399170cyclictest33582sleep1008:26:242
866399170cyclictest324912sleep1011:25:082
866399170cyclictest310572sleep1009:05:152
866399170cyclictest3055050irq/54-eth0-tx-11:40:152
866399170cyclictest3054950irq/53-eth0-rx-12:30:142
866399170cyclictest3054950irq/53-eth0-rx-12:30:142
866399170cyclictest3054950irq/53-eth0-rx-12:25:292
866399170cyclictest3054950irq/53-eth0-rx-12:25:282
866399170cyclictest3054950irq/53-eth0-rx-12:05:252
866399170cyclictest3054950irq/53-eth0-rx-11:45:582
866399170cyclictest3054950irq/53-eth0-rx-11:15:012
866399170cyclictest3054950irq/53-eth0-rx-10:50:352
866399170cyclictest3054950irq/53-eth0-rx-10:21:012
866399170cyclictest3054950irq/53-eth0-rx-09:40:152
866399170cyclictest3054950irq/53-eth0-rx-09:35:072
866399170cyclictest3054950irq/53-eth0-rx-09:20:012
866399170cyclictest3054950irq/53-eth0-rx-09:20:012
866399170cyclictest3054950irq/53-eth0-rx-09:00:172
866399170cyclictest3054950irq/53-eth0-rx-08:45:092
866399170cyclictest3054950irq/53-eth0-rx-08:45:092
866399170cyclictest3054950irq/53-eth0-rx-08:35:152
866399170cyclictest3054950irq/53-eth0-rx-08:22:252
866399170cyclictest3054950irq/53-eth0-rx-07:55:392
866399170cyclictest3054950irq/53-eth0-rx-07:45:212
866399170cyclictest3054950irq/53-eth0-rx-07:26:162
866399170cyclictest3054950irq/53-eth0-rx-07:10:222
866399170cyclictest284762sleep1008:17:232
866399170cyclictest249792chrt07:30:052
866399170cyclictest247792sleep1008:11:462
866399170cyclictest223762sleep1008:55:032
866399170cyclictest223762sleep1008:55:022
866399170cyclictest211632sleep1008:50:272
866399170cyclictest210262chrt08:06:092
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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