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2026-03-21 - 04:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Sat Mar 21, 2026 00:46:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20196210991sleep00-21swapper/019:07:070
9918501070irq/53-eth0-rx-0-21swapper/119:09:401
128501000irq/42-ahci0-21swapper/319:08:265
991850960irq/53-eth0-rx-0-21swapper/519:06:197
991850960irq/53-eth0-rx-0-21swapper/219:07:184
991850920irq/53-eth0-rx-0-21swapper/419:08:106
991850910irq/53-eth0-rx-0-21swapper/819:06:2810
991850900irq/53-eth0-rx-0-21swapper/719:06:079
991850710irq/53-eth0-rx-0-21swapper/919:05:2611
2022926454sleep60-21swapper/619:07:388
1728826354sleep100-21swapper/1019:05:052
2006325753sleep110-21swapper/1119:05:313
20568993115cyclictest5291-21kworker/0:222:09:470
20592992321cyclictest14472-21ssh23:48:155
2059299212cyclictest0-21swapper/300:38:245
20568992019cyclictest0-21swapper/020:10:330
2061099190cyclictest0-21swapper/1121:17:113
2061099190cyclictest0-21swapper/1121:17:103
2060999192cyclictest991850irq/53-eth0-rx-23:47:172
2060999192cyclictest991850irq/53-eth0-rx-23:31:012
2060999192cyclictest991850irq/53-eth0-rx-23:29:092
2060999192cyclictest991850irq/53-eth0-rx-23:16:072
2060999192cyclictest991850irq/53-eth0-rx-22:55:202
2060999192cyclictest991850irq/53-eth0-rx-22:40:412
2060999192cyclictest991850irq/53-eth0-rx-22:38:152
2060999192cyclictest991850irq/53-eth0-rx-22:32:112
2060999192cyclictest991850irq/53-eth0-rx-22:11:012
2060999192cyclictest991850irq/53-eth0-rx-21:52:002
2060999192cyclictest991850irq/53-eth0-rx-21:44:092
2060999192cyclictest991850irq/53-eth0-rx-21:31:072
2060999192cyclictest991850irq/53-eth0-rx-20:50:142
2060999192cyclictest991850irq/53-eth0-rx-00:34:492
2060999192cyclictest991850irq/53-eth0-rx-00:34:492
2060999192cyclictest991850irq/53-eth0-rx-00:24:192
2060999192cyclictest991850irq/53-eth0-rx-00:01:562
20609991917cyclictest0-21swapper/1021:56:582
20607991917cyclictest0-21swapper/823:55:0210
20604991916cyclictest701-21qemu-kvm20:26:467
20592991913cyclictest2551-21ssh22:45:185
20609991817cyclictest8981-21kworker/10:222:15:302
20609991817cyclictest21575-21cstates19:10:102
20609991817cyclictest0-21swapper/1023:55:482
20609991817cyclictest0-21swapper/1023:55:482
20609991817cyclictest0-21swapper/1023:35:142
20609991817cyclictest0-21swapper/1023:21:542
20609991817cyclictest0-21swapper/1023:10:282
20609991817cyclictest0-21swapper/1022:45:092
20609991817cyclictest0-21swapper/1021:36:452
20609991817cyclictest0-21swapper/1021:01:002
20609991817cyclictest0-21swapper/1020:36:302
20609991817cyclictest0-21swapper/1020:05:182
20609991817cyclictest0-21swapper/1020:00:142
20609991817cyclictest0-21swapper/1019:57:352
20609991817cyclictest0-21swapper/1019:38:432
20609991817cyclictest0-21swapper/1000:35:232
20609991817cyclictest0-21swapper/1000:05:382
2060999181cyclictest991950irq/54-eth0-tx-21:20:202
2060999181cyclictest991950irq/54-eth0-tx-21:20:192
2060999181cyclictest991850irq/53-eth0-rx-23:50:062
2060999181cyclictest991850irq/53-eth0-rx-23:41:322
2060999181cyclictest991850irq/53-eth0-rx-23:05:112
2060999181cyclictest991850irq/53-eth0-rx-23:00:122
2060999181cyclictest991850irq/53-eth0-rx-22:51:202
2060999181cyclictest991850irq/53-eth0-rx-22:25:122
2060999181cyclictest991850irq/53-eth0-rx-22:24:182
2060999181cyclictest991850irq/53-eth0-rx-22:06:162
2060999181cyclictest991850irq/53-eth0-rx-22:02:262
2060999181cyclictest991850irq/53-eth0-rx-21:45:232
2060999181cyclictest991850irq/53-eth0-rx-21:25:132
2060999181cyclictest991850irq/53-eth0-rx-21:10:592
2060999181cyclictest991850irq/53-eth0-rx-21:10:582
2060999181cyclictest991850irq/53-eth0-rx-20:44:072
2060999181cyclictest991850irq/53-eth0-rx-20:19:342
2060999181cyclictest991850irq/53-eth0-rx-19:55:002
2060999181cyclictest991850irq/53-eth0-rx-19:46:442
2060999181cyclictest991850irq/53-eth0-rx-19:30:232
2060999181cyclictest991850irq/53-eth0-rx-19:25:192
2060999181cyclictest991850irq/53-eth0-rx-00:25:132
2060999181cyclictest991850irq/53-eth0-rx-00:15:302
2060999181cyclictest991850irq/53-eth0-rx-00:12:062
2060999181cyclictest12850irq/42-ahci21:15:042
2060999181cyclictest12850irq/42-ahci21:15:032
2060999181cyclictest12850irq/42-ahci20:49:532
2060899181cyclictest761ksoftirqd/922:50:2611
2060899181cyclictest761ksoftirqd/900:36:3911
2060899181cyclictest761ksoftirqd/900:24:4111
2060899181cyclictest761ksoftirqd/900:10:1911
2060899181cyclictest5188-21latency_hist21:00:0111
2060899181cyclictest31826-21ssh00:01:2511
2060899181cyclictest31685-21fschecks_count20:50:1211
2060899181cyclictest31374-21grep22:15:2611
2060899181cyclictest15964-21latency_hist23:50:0111
2060899181cyclictest13319-21sh22:28:5011
2060899181cyclictest0-21swapper/923:58:2211
2060899181cyclictest0-21swapper/923:58:2211
2060899181cyclictest0-21swapper/923:04:1611
2060899181cyclictest0-21swapper/922:40:1011
2060899181cyclictest0-21swapper/922:36:1111
2060899181cyclictest0-21swapper/922:20:1811
2060899181cyclictest0-21swapper/922:10:0211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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