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2026-06-12 - 12:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Fri Jun 12, 2026 00:46:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549501070irq/53-eth0-rx-0-21swapper/119:09:371
30549501070irq/53-eth0-rx-0-21swapper/119:09:361
2159210695sleep30-21swapper/319:06:365
2159210695sleep30-21swapper/319:06:355
30549501040irq/53-eth0-rx-0-21swapper/419:05:186
30549501040irq/53-eth0-rx-0-21swapper/419:05:186
2254210390sleep100-21swapper/1019:07:432
2254210390sleep100-21swapper/1019:07:422
30549501000irq/53-eth0-rx-0-21swapper/219:09:574
30549501000irq/53-eth0-rx-0-21swapper/219:09:574
3054950930irq/53-eth0-rx-0-21swapper/719:06:529
3054950930irq/53-eth0-rx-0-21swapper/719:06:519
3055050850irq/54-eth0-tx-0-21swapper/819:07:1710
3055050850irq/54-eth0-tx-0-21swapper/819:07:1610
3054950830irq/53-eth0-rx-0-21swapper/519:05:197
3054950830irq/53-eth0-rx-0-21swapper/519:05:187
12250750irq/42-ahci0-21swapper/919:08:1811
12250750irq/42-ahci0-21swapper/919:08:1711
3054950670irq/53-eth0-rx-0-21swapper/1119:07:323
3054950670irq/53-eth0-rx-0-21swapper/1119:07:323
225826553sleep00-21swapper/019:07:450
225826553sleep00-21swapper/019:07:440
226626353sleep60-21swapper/619:07:508
226626353sleep60-21swapper/619:07:508
2659992914cyclictest0-21swapper/1121:09:043
265899192cyclictest3054950irq/53-eth0-rx-23:10:482
265899192cyclictest3054950irq/53-eth0-rx-21:59:312
265799192cyclictest0-21swapper/923:08:0611
265799192cyclictest0-21swapper/922:47:1511
265799192cyclictest0-21swapper/922:47:1411
265799192cyclictest0-21swapper/921:25:4011
265799192cyclictest0-21swapper/900:12:5611
2658991817cyclictest0-21swapper/1023:37:162
265899181cyclictest3055050irq/54-eth0-tx-21:17:132
265899181cyclictest3054950irq/53-eth0-rx-23:17:542
265899181cyclictest3054950irq/53-eth0-rx-23:09:002
265899181cyclictest3054950irq/53-eth0-rx-22:46:252
265899181cyclictest3054950irq/53-eth0-rx-22:46:242
265899181cyclictest3054950irq/53-eth0-rx-22:31:392
265899181cyclictest3054950irq/53-eth0-rx-22:21:222
265899181cyclictest3054950irq/53-eth0-rx-22:15:182
265899181cyclictest3054950irq/53-eth0-rx-00:16:372
265899181cyclictest292842chrt19:43:092
265899181cyclictest292842chrt19:43:092
265799181cyclictest7695-21kworker/9:223:46:4411
265799181cyclictest0-21swapper/923:25:4111
265799181cyclictest0-21swapper/923:20:2111
265799181cyclictest0-21swapper/923:10:3111
265799181cyclictest0-21swapper/922:50:2411
265799181cyclictest0-21swapper/922:50:2311
265799181cyclictest0-21swapper/922:37:1011
265799181cyclictest0-21swapper/922:10:1511
265799181cyclictest0-21swapper/922:08:1811
265799181cyclictest0-21swapper/921:55:1011
265799181cyclictest0-21swapper/921:45:2511
265799181cyclictest0-21swapper/921:22:4811
265799181cyclictest0-21swapper/921:14:3511
265799181cyclictest0-21swapper/920:57:5611
265799181cyclictest0-21swapper/920:54:5311
265799181cyclictest0-21swapper/919:32:4611
265799181cyclictest0-21swapper/900:30:5411
265799181cyclictest0-21swapper/900:00:1911
2638991816cyclictest7831-21snmp_rack3slot919:57:174
265999170cyclictest0-21swapper/1122:41:343
265999170cyclictest0-21swapper/1122:30:423
2658991716cyclictest0-21swapper/1022:41:512
265899170cyclictest49422sleep1023:34:372
265899170cyclictest4442chrt19:47:462
265899170cyclictest41332sleep1019:51:342
265899170cyclictest318812chrt22:35:062
265899170cyclictest311962sleep1023:00:232
265899170cyclictest30882sleep1000:25:432
265899170cyclictest306682sleep1023:55:152
265899170cyclictest3055050irq/54-eth0-tx-22:50:312
265899170cyclictest3055050irq/54-eth0-tx-22:50:302
265899170cyclictest3055050irq/54-eth0-tx-21:20:512
265899170cyclictest3055050irq/54-eth0-tx-20:15:192
265899170cyclictest3055050irq/54-eth0-tx-00:21:542
265899170cyclictest3054950irq/53-eth0-rx-23:45:012
265899170cyclictest3054950irq/53-eth0-rx-23:20:122
265899170cyclictest3054950irq/53-eth0-rx-22:55:242
265899170cyclictest3054950irq/53-eth0-rx-22:25:372
265899170cyclictest3054950irq/53-eth0-rx-22:11:572
265899170cyclictest3054950irq/53-eth0-rx-22:05:452
265899170cyclictest3054950irq/53-eth0-rx-22:00:242
265899170cyclictest3054950irq/53-eth0-rx-21:50:182
265899170cyclictest3054950irq/53-eth0-rx-21:45:122
265899170cyclictest3054950irq/53-eth0-rx-21:40:192
265899170cyclictest3054950irq/53-eth0-rx-21:35:182
265899170cyclictest3054950irq/53-eth0-rx-21:25:232
265899170cyclictest3054950irq/53-eth0-rx-20:42:482
265899170cyclictest3054950irq/53-eth0-rx-20:07:352
265899170cyclictest3054950irq/53-eth0-rx-20:00:202
265899170cyclictest3054950irq/53-eth0-rx-19:57:112
265899170cyclictest3054950irq/53-eth0-rx-19:33:252
265899170cyclictest3054950irq/53-eth0-rx-19:10:222
265899170cyclictest3054950irq/53-eth0-rx-00:36:232
265899170cyclictest3054950irq/53-eth0-rx-00:30:032
265899170cyclictest3054950irq/53-eth0-rx-00:05:142
265899170cyclictest3054950irq/53-eth0-rx-00:03:522
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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