You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-08 - 12:03
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Fri May 08, 2026 00:46:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501200irq/53-eth0-rx-0-21swapper/219:09:114
29683210893sleep70-21swapper/719:06:259
29531210895sleep100-21swapper/1019:05:292
9918501030irq/53-eth0-rx-0-21swapper/119:09:181
991850940irq/53-eth0-rx-0-21swapper/419:06:276
2970929487sleep50-21swapper/519:06:487
991950930irq/54-eth0-tx-0-21swapper/319:06:115
991850900irq/53-eth0-rx-0-21swapper/919:06:3911
991850900irq/53-eth0-rx-0-21swapper/819:07:0610
991850880irq/53-eth0-rx-0-21swapper/1119:08:043
2970426055sleep00-21swapper/019:06:420
2979925955sleep60-21swapper/619:08:018
3014899310cyclictest0-21swapper/1122:20:333
30148992927cyclictest0-21swapper/1122:14:403
991950280irq/54-eth0-tx-0-21swapper/822:10:0310
991950280irq/54-eth0-tx-0-21swapper/1122:09:563
991850280irq/53-eth0-rx-0-21swapper/822:09:4510
991850280irq/53-eth0-rx-0-21swapper/422:09:536
991850280irq/53-eth0-rx-0-21swapper/222:10:024
991850280irq/53-eth0-rx-0-21swapper/222:09:564
991850280irq/53-eth0-rx-0-21swapper/1022:09:562
30148992827cyclictest0-21swapper/1119:23:153
12850280irq/42-ahci0-21swapper/922:10:0011
991850200irq/53-eth0-rx-0-21swapper/022:09:590
30147992014cyclictest0-21swapper/1022:35:142
30147992014cyclictest0-21swapper/1022:35:132
30147992013cyclictest23918-21kworker/10:122:27:462
30147992013cyclictest23799-21ssh22:58:032
30147992013cyclictest23799-21ssh22:58:032
30147992013cyclictest0-21swapper/1023:46:332
30147992013cyclictest0-21swapper/1023:38:312
30147992013cyclictest0-21swapper/1023:11:442
30147992013cyclictest0-21swapper/1021:58:592
30147992012cyclictest30657-21ssh23:04:292
30147992012cyclictest0-21swapper/1023:54:272
3014799192cyclictest991850irq/53-eth0-rx-23:58:372
3014799192cyclictest991850irq/53-eth0-rx-21:21:352
3014799192cyclictest991850irq/53-eth0-rx-00:35:032
3014799192cyclictest991850irq/53-eth0-rx-00:30:322
3014799192cyclictest991850irq/53-eth0-rx-00:14:102
30147991913cyclictest0-21swapper/1023:42:152
30147991913cyclictest0-21swapper/1023:31:452
30147991913cyclictest0-21swapper/1022:21:322
30147991913cyclictest0-21swapper/1022:15:502
30147991913cyclictest0-21swapper/1021:52:542
30147991913cyclictest0-21swapper/1021:34:352
30147991913cyclictest0-21swapper/1021:26:112
30147991913cyclictest0-21swapper/1021:17:092
30147991913cyclictest0-21swapper/1019:11:472
30147991913cyclictest0-21swapper/1000:22:012
30147991912cyclictest4173-21ssh00:01:432
30147991912cyclictest3751-21ssh23:08:252
30147991912cyclictest21020-21sensors_temp21:05:222
30147991912cyclictest19721-21ssh22:00:192
30147991912cyclictest14837-21ssh23:16:472
30147991912cyclictest0-21swapper/1021:11:442
30147991911cyclictest25193-1kworker/10:0H19:47:322
30147991911cyclictest0-21swapper/1019:38:242
30147991911cyclictest0-21swapper/1000:27:342
30147991813cyclictest23918-21kworker/10:122:12:072
30147991813cyclictest0-21swapper/1022:31:012
30147991813cyclictest0-21swapper/1021:39:372
30147991813cyclictest0-21swapper/1020:55:592
30147991811cyclictest0-21swapper/1022:45:452
30147991811cyclictest0-21swapper/1021:49:272
30147991811cyclictest0-21swapper/1020:32:472
30147991811cyclictest0-21swapper/1020:29:082
30147991811cyclictest0-21swapper/1019:56:112
3014799181cyclictest991850irq/53-eth0-rx-22:41:402
3014799181cyclictest991850irq/53-eth0-rx-00:17:422
3014799181cyclictest12850irq/42-ahci19:20:432
3014799181cyclictest109362chrt00:08:152
3014699182cyclictest0-21swapper/923:43:0711
3014699182cyclictest0-21swapper/923:01:4411
3014699182cyclictest0-21swapper/921:41:3911
3014699182cyclictest0-21swapper/921:28:0511
3014699181cyclictest991950irq/54-eth0-tx-22:47:0911
3014699181cyclictest991850irq/53-eth0-rx-00:07:0211
3014699181cyclictest18016-21sh21:32:0411
3014699181cyclictest0-21swapper/923:45:4911
3014699181cyclictest0-21swapper/923:32:5111
3014699181cyclictest0-21swapper/923:26:3411
3014699181cyclictest0-21swapper/923:20:1511
3014699181cyclictest0-21swapper/923:10:4811
3014699181cyclictest0-21swapper/923:07:5311
3014699181cyclictest0-21swapper/922:03:1511
3014699181cyclictest0-21swapper/921:57:1311
3014699181cyclictest0-21swapper/920:55:0211
3014699181cyclictest0-21swapper/900:17:2511
30139991816cyclictest21867-21qemu-kvm21:33:417
30139991816cyclictest10365-21qemu-kvm20:24:327
3010999181cyclictest0-21swapper/119:25:131
3014799172cyclictest0-21swapper/1020:09:562
30147991716cyclictest0-21swapper/1022:50:202
30147991716cyclictest0-21swapper/1019:40:422
3014799170cyclictest991850irq/53-eth0-rx-23:25:382
3014799170cyclictest991850irq/53-eth0-rx-23:23:562
3014799170cyclictest991850irq/53-eth0-rx-19:25:162
3014799170cyclictest831ksoftirqd/1019:15:022
3014799170cyclictest70572sleep1020:46:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional