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2026-07-15 - 13:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot3.osadl.org (updated Wed Jul 15, 2026 12:46:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
8136210896sleep90-21swapper/907:07:4911
8136210896sleep90-21swapper/907:07:4911
8120210894sleep100-21swapper/1007:07:382
8120210894sleep100-21swapper/1007:07:382
8155210591sleep110-21swapper/1107:08:033
8155210591sleep110-21swapper/1107:08:033
8085210491sleep50-21swapper/507:07:097
8085210491sleep50-21swapper/507:07:097
30549501000irq/53-eth0-rx-0-21swapper/207:05:134
30549501000irq/53-eth0-rx-0-21swapper/207:05:134
3054950980irq/53-eth0-rx-0-21swapper/307:07:465
3054950980irq/53-eth0-rx-0-21swapper/307:07:465
12250980irq/42-ahci0-21swapper/707:09:449
12250980irq/42-ahci0-21swapper/707:09:449
828829792sleep10-21swapper/107:09:051
828829792sleep10-21swapper/107:09:041
3054950920irq/53-eth0-rx-0-21swapper/407:06:446
3054950920irq/53-eth0-rx-0-21swapper/407:06:446
813328877sleep60-21swapper/607:07:468
813328877sleep60-21swapper/607:07:458
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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