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2025-10-18 - 05:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot3.osadl.org (updated Sat Oct 18, 2025 00:46:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
16774210592sleep70-21swapper/719:08:119
16627210592sleep10-21swapper/119:06:171
122501020irq/42-ahci0-21swapper/219:09:194
3066450970irq/53-eth0-tx-0-21swapper/319:05:165
3066350930irq/52-eth0-rx-0-21swapper/919:05:1811
3066350910irq/52-eth0-rx-0-21swapper/419:06:006
3066350880irq/52-eth0-rx-0-21swapper/519:06:137
1686427672sleep100-21swapper/1019:08:372
1691827471sleep80-21swapper/819:09:2510
3066350680irq/52-eth0-rx-0-21swapper/1119:06:263
1465126049sleep00-21swapper/019:05:160
1668225955sleep60-21swapper/619:06:588
3066350280irq/52-eth0-rx-0-21swapper/721:29:239
3066350280irq/52-eth0-rx-0-21swapper/721:29:239
1710699191cyclictest31813-21snmp_rack3slot921:10:243
17105991917cyclictest811rcuc/1021:40:312
17105991917cyclictest811rcuc/1021:40:302
1710499196cyclictest0-21swapper/920:10:0011
1710499181cyclictest0-21swapper/922:31:0311
1699180watchdog/00-21swapper/020:28:510
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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