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2025-05-02 - 12:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot3.osadl.org (updated Fri May 02, 2025 00:46:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20644210592sleep10-21swapper/119:07:131
122501030irq/42-ahci0-21swapper/419:05:486
20541210290sleep50-21swapper/519:05:547
2963550940irq/54-eth0-tx-0-21swapper/719:08:319
12250920irq/42-ahci0-21swapper/319:08:345
2963450900irq/53-eth0-rx-0-21swapper/219:06:134
2055828170sleep80-21swapper/819:06:0810
113850780irq/18-parport00-21swapper/1019:05:282
2056327463sleep110-21swapper/1119:06:123
2076726150sleep00-21swapper/019:08:120
2055925853sleep90-21swapper/919:06:1011
1773325753sleep60-21swapper/619:05:068
2104799373cyclictest0-21swapper/1000:24:082
2104699372cyclictest0-21swapper/919:12:5711
2104599372cyclictest0-21swapper/819:51:2410
2104499373cyclictest0-21swapper/721:32:139
2104799363cyclictest0-21swapper/1020:17:232
2104799363cyclictest0-21swapper/1020:17:232
2104799363cyclictest0-21swapper/1019:54:542
2104799361cyclictest0-21swapper/1022:05:132
2104799361cyclictest0-21swapper/1021:26:172
2104699362cyclictest0-21swapper/921:53:3211
2104699362cyclictest0-21swapper/920:08:1611
2104599363cyclictest0-21swapper/823:56:4510
2104499361cyclictest0-21swapper/720:24:289
2104099362cyclictest0-21swapper/620:20:538
2104699351cyclictest0-21swapper/919:57:4311
2104599353cyclictest0-21swapper/819:10:2610
2104499351cyclictest0-21swapper/722:36:319
2104099351cyclictest0-21swapper/620:39:138
2102299352cyclictest0-21swapper/321:20:245
2105199341cyclictest0-21swapper/1119:52:283
2105199341cyclictest0-21swapper/1100:22:003
2104799342cyclictest0-21swapper/1022:17:532
2104799340cyclictest0-21swapper/1023:40:442
2104799340cyclictest0-21swapper/1023:40:432
2104699343cyclictest0-21swapper/923:24:3811
2104699343cyclictest0-21swapper/923:24:3711
2104699342cyclictest0-21swapper/922:47:2911
2104699342cyclictest0-21swapper/922:08:5811
2104699342cyclictest0-21swapper/921:29:1311
2104699341cyclictest0-21swapper/922:16:2911
2104699341cyclictest0-21swapper/920:27:1411
2104599341cyclictest0-21swapper/822:56:0210
2104499343cyclictest0-21swapper/700:23:149
2104499340cyclictest0-21swapper/722:22:009
2104499340cyclictest0-21swapper/720:31:039
2104499340cyclictest0-21swapper/720:31:039
2104099342cyclictest0-21swapper/622:47:158
2103499342cyclictest0-21swapper/500:00:197
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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