You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-05 - 15:44
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot3.osadl.org (updated Thu Mar 05, 2026 12:46:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9918501070irq/53-eth0-rx-0-21swapper/307:08:245
20722210791sleep00-21swapper/007:05:340
20816210692sleep70-21swapper/707:06:419
20871210592sleep10-21swapper/107:07:231
9918501000irq/53-eth0-rx-0-21swapper/807:05:1910
128501000irq/42-ahci0-21swapper/207:06:394
991850920irq/53-eth0-rx-0-21swapper/407:07:286
991850910irq/53-eth0-rx-0-21swapper/507:06:387
991850880irq/53-eth0-rx-0-21swapper/1107:05:513
12850820irq/42-ahci0-21swapper/907:08:1811
12850730irq/42-ahci0-21swapper/1007:08:322
2076626353sleep60-21swapper/607:06:048
2128399370cyclictest0-21swapper/1107:10:393
2123299300cyclictest0-21swapper/007:10:230
12850300irq/42-ahci0-21swapper/009:24:470
21283992928cyclictest0-21swapper/1108:24:053
2128399290cyclictest0-21swapper/1109:22:513
2123299269cyclictest0-21swapper/009:14:420
21232992612cyclictest0-21swapper/009:16:380
2128199247cyclictest831ksoftirqd/1007:40:432
2128199236cyclictest831ksoftirqd/1009:14:122
2128199225cyclictest831ksoftirqd/1010:07:512
2123299220cyclictest0-21swapper/010:24:120
2123299220cyclictest0-21swapper/010:18:360
991850210irq/53-eth0-rx-0-21swapper/1109:18:053
21283992019cyclictest0-21swapper/1108:26:063
2128199203cyclictest831ksoftirqd/1009:00:262
2125399200cyclictest0-21swapper/309:12:445
2128199192cyclictest991850irq/53-eth0-rx-12:26:042
2128199192cyclictest991850irq/53-eth0-rx-11:52:102
2128199192cyclictest991850irq/53-eth0-rx-11:09:442
2128199192cyclictest991850irq/53-eth0-rx-10:51:232
2128199192cyclictest991850irq/53-eth0-rx-09:39:032
2128199192cyclictest991850irq/53-eth0-rx-08:20:202
21281991915cyclictest831ksoftirqd/1009:20:262
2127799192cyclictest0-21swapper/910:49:4811
2127799192cyclictest0-21swapper/910:26:1811
2127799192cyclictest0-21swapper/909:16:0411
2127799190cyclictest0-21swapper/909:12:2911
2127099194cyclictest0-21swapper/609:28:078
2126799190cyclictest13467-21qemu-kvm09:12:337
2126199190cyclictest0-21swapper/409:12:306
21232991917cyclictest0-21swapper/010:08:290
2123299190cyclictest0-21swapper/009:30:220
2123299190cyclictest0-21swapper/008:55:210
2128399185cyclictest0-21swapper/1111:55:013
21283991816cyclictest58122chrt09:29:373
21281991817cyclictest831ksoftirqd/1011:55:522
21281991817cyclictest0-21swapper/1012:30:332
21281991817cyclictest0-21swapper/1011:31:112
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional