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2026-04-05 - 21:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot4.osadl.org (updated Sun Apr 05, 2026 12:46:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15013049914338,73cyclictest1570034-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
10:16:290
15013049914338,73cyclictest1570034-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
10:16:280
158554421410,5sleep20-21swapper/209:38:382
179747821140,6sleep230-21ksoftirqd/212:20:162
15013049910227,51cyclictest1667013-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
10:56:130
1501320999885,7cyclictest1511066-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
07:53:353
15555852970,4sleep00-21swapper/009:15:280
150130499971,78cyclictest0-21swapper/009:40:250
150130499961,86cyclictest0-21swapper/012:19:390
150130499961,86cyclictest0-21swapper/012:19:390
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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