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2026-01-22 - 06:53
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot4.osadl.org (updated Thu Jan 22, 2026 00:46:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4066210235963574,7sleep34065350-21kworker/3:1+events@
dbs_work_handler
19:05:233
406753799122107,7cyclictest4063302-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:16:282
40675279911592,15cyclictest4085282-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:06:500
40675379911298,7cyclictest4169898-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:57:012
406754899111106,2cyclictest0-21swapper/421:06:504
40675279911150,46cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:17:290
40675279911150,46cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:17:280
40675279911085,17cyclictest4113733-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:11:510
40675329910894,7cyclictest4109556-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:51:481
40675279910844,29cyclictest84644-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:24:000
40675279910755,44cyclictest77091-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:35:370
40675379910591,8cyclictest4096113-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:30:362
40675379910591,8cyclictest4096113-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:30:352
40675489910499,2cyclictest0-21swapper/421:11:514
40675279910445,51cyclictest4096113-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:30:300
40675279910445,51cyclictest4096113-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:30:290
40675279910440,56cyclictest4179773-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:10:170
40675279910440,56cyclictest4179773-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:10:160
40675279910053,37cyclictest4067521-21cyclictest19:35:180
4067537999985,7cyclictest4096113-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:40:342
4067527999862,28cyclictest36332-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:56:340
4067527999862,28cyclictest36332-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:56:340
4067537999682,7cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:52:002
4067527999549,39cyclictest4130390-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:32:470
4067537999467,10cyclictest29721-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:00:142
4067537999467,10cyclictest29721-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:00:132
4067543999365,9cyclictest36332-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:52:043
4067543999365,9cyclictest36332-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:52:033
4067537999379,7cyclictest4113733-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:10:342
4067527999326,35cyclictest0-21swapper/021:59:040
4067537999279,7cyclictest42509-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:22:212
4067537999278,7cyclictest63204-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:06:352
4067537999178,7cyclictest4085282-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:46:472
406752799918,4cyclictest4152174-21apt-get21:40:130
406752799918,4cyclictest4152174-21apt-get21:40:120
4067548999085,2cyclictest0-21swapper/423:37:244
4067527999067,7cyclictest63204-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
00:12:120
4067527999067,7cyclictest63204-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
00:12:120
4067537998974,8cyclictest4085282-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:50:342
4067537998876,6cyclictest142448-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:13:352
4067537998876,6cyclictest142448-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:13:352
4067548998781,3cyclictest0-21swapper/400:12:124
4067548998781,3cyclictest0-21swapper/400:12:124
4067537998772,8cyclictest142448-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:38:402
4067537998772,8cyclictest142448-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:38:402
4067527998759,8cyclictest4116385-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:20:340
4067548998675,6cyclictest4119346-21diskmemload-423:30:344
4067548998675,6cyclictest4119346-21diskmemload-423:30:344
4067537998672,7cyclictest142448-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:30:212
4067548998580,2cyclictest0-21swapper/422:11:354
4067548998580,2cyclictest0-21swapper/422:11:344
4067537998573,6cyclictest4069271-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
19:21:312
4067537998571,7cyclictest4079471-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:15:112
4067537998571,7cyclictest4079471-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:15:112
4067537998469,8cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:15:202
4067537998469,8cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:15:192
4067527998450,7cyclictest42509-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:15:360
4067548998371,6cyclictest149906-21ssh00:15:364
4067537998371,6cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:36:112
4067527998356,7cyclictest4085282-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:20:240
4067548998273,5cyclictest4128251-21ssh21:20:354
4067537998269,7cyclictest4085282-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:25:562
4067537998267,8cyclictest42509-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:13:212
4067527998272,7cyclictest4082032-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:46:400
4067527998272,7cyclictest4082032-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:46:390
4067527998261,7cyclictest63204-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:30:340
4067527998261,7cyclictest63204-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:30:330
4067527998258,7cyclictest4071445-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
19:25:200
4067548998176,2cyclictest0-21swapper/422:56:344
4067548998176,2cyclictest0-21swapper/422:56:334
4067543998168,6cyclictest4085282-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:10:113
4067527998157,8cyclictest142448-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:15:360
4067527998150,16cyclictest4162915-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
22:27:450
4067527998134,6cyclictest13-21ksoftirqd/022:02:160
406725928153,20sleep40-21swapper/419:08:324
4067548998073,3cyclictest0-21swapper/420:47:384
4067548998066,9cyclictest135345-21ssh00:04:154
4067548998066,9cyclictest135345-21ssh00:04:154
4067527998050,27cyclictest4155884-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:53:370
4067548997968,6cyclictest81767-21ssh23:20:214
4067548997964,8cyclictest67698-21ssh23:09:024
4067532997965,7cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:55:491
4067527997965,7cyclictest4063302-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:19:430
4067527997932,27cyclictest69050irq/528-eth0-Tx00:35:260
4067527997932,27cyclictest69050irq/528-eth0-Tx00:35:260
4067548997872,3cyclictest0-21swapper/419:25:204
4067543997865,6cyclictest42509-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:12:183
4067537997865,7cyclictest4085282-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:56:492
4067537997865,7cyclictest4085282-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:56:482
4067537997864,7cyclictest4113733-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:20:172
4067537997851,8cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:29:122
4067532997861,9cyclictest4122955-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:05:391
4067527997866,8cyclictest4079471-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
19:40:340
4067553997771,3cyclictest0-21swapper/520:05:355
4067553997770,3cyclictest0-21swapper/523:58:245
4067548997771,2cyclictest0-21swapper/422:54:234
4067548997771,2cyclictest0-21swapper/422:54:234
4067537997763,7cyclictest63204-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:33:162
4067537997763,7cyclictest63204-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:33:162
4067532997765,6cyclictest142448-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:23:391
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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