You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-26 - 01:05
OSADL QA Farm

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of system in rack #3, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next 		  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot4.osadl.org (updated Tue Aug 25, 2026 12:46:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)		T*(,W**)
latency
(µs)		CmdPIDPrioCmd
2045115228112788,13sleep12026406-21kworker/1:2+events@
dbs_work_handler		07:05:381
2044003223402315,15sleep40-21swapper/407:05:104
20458609912226,29cyclictest2271123-21rm11:25:120
20458609912026,36cyclictest0-21swapper/011:50:190
2045860991202,59cyclictest2233350-21sed10:55:460
204588199119112,3cyclictest0-21swapper/409:59:404
20458609911635,28cyclictest2219719-21ps10:45:390
2045860991161,101cyclictest0-21swapper/007:58:030
2045860991141,94cyclictest0-21swapper/008:05:480
20458609911366,35cyclictest0-21swapper/008:01:550
20458709911081,6cyclictest2303104-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork		12:25:002
20458609911019,81cyclictest2303104-21kworker/u12:0+rpciod@
rpc_async_schedule		12:25:020
20458819910898,6cyclictest2171680-21ssh10:09:424
20458709910692,7cyclictest2303104-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork		12:20:002
20458609910627,68cyclictest67550irq/529-eth0-Tx11:59:550
2045860991051,93cyclictest0-21swapper/008:22:030
2045860991051,92cyclictest0-21swapper/011:36:590
2045860991051,62cyclictest2363486-21ld12:35:350
20458609910475,25cyclictest2256730-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork		11:34:540
20458609910445,3cyclictest0-21swapper/010:24:530
20458609910445,3cyclictest0-21swapper/010:24:530
2045860991041,97cyclictest0-21swapper/007:10:270
2045860991032,61cyclictest2094420-21diskmemload09:40:460
2045860991032,61cyclictest2094420-21diskmemload09:40:460
2045860991031,47cyclictest0-21swapper/009:24:420
20458609910151,17cyclictest0-21swapper/008:10:030
20458609910125,23cyclictest67550irq/529-eth0-Tx12:03:340
2045860991011,61cyclictest0-21swapper/010:53:140
2045860991011,56cyclictest0-21swapper/011:02:010
20458609910114,70cyclictest67650irq/530-eth0-Tx12:17:520
20458609910022,29cyclictest67450irq/528-eth0-Tx12:05:040
20458609910022,29cyclictest67450irq/528-eth0-Tx12:05:030
2045860991001,57cyclictest0-21swapper/012:25:240
2045860991001,57cyclictest0-21swapper/007:38:370
2045860999966,25cyclictest2096211-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork		09:14:300
204586099992,10cyclictest2172817-21df_abs10:10:200
204586099991,63cyclictest0-21swapper/007:21:060
204586099991,45cyclictest0-21swapper/007:48:170
204586099991,45cyclictest0-21swapper/007:48:160
204586099991,3cyclictest0-21swapper/010:25:450
204586099991,3cyclictest0-21swapper/010:25:450
204586099981,48cyclictest0-21swapper/011:20:130
2045860999726,32cyclictest67550irq/529-eth0-Tx11:07:140
2045860999726,32cyclictest67550irq/529-eth0-Tx11:07:140
204586099971,53cyclictest0-21swapper/008:17:330
204586099971,4cyclictest2094420-21diskmemload10:00:180
2045881999690,3cyclictest0-21swapper/412:15:004
2045881999690,3cyclictest0-21swapper/412:14:594
2045881999682,8cyclictest2283523-21ssh11:34:534
204586099963,37cyclictest2153860-21/usr/sbin/munin09:55:380
2045860999633,25cyclictest67650irq/530-eth0-Tx09:15:170
2045860999632,27cyclictest67550irq/529-eth0-Tx10:40:370
204586099962,50cyclictest0-21swapper/010:38:370
2045860999548,15cyclictest67350irq/527-eth0-Tx11:48:040
2045860999548,15cyclictest67350irq/527-eth0-Tx11:48:030
204586099952,53cyclictest0-21swapper/012:30:260
204586099951,54cyclictest2169522-21ssh10:07:330
204586099944,39cyclictest67550irq/529-eth0-Tx09:45:150
204586099944,39cyclictest67550irq/529-eth0-Tx09:45:150
204586099942,7cyclictest2114186-21/usr/sbin/munin09:25:420
204586099942,5cyclictest2292541-21/usr/sbin/munin11:40:480
204586099941,62cyclictest0-21swapper/007:40:230
204586099932,61cyclictest2152412-21cat09:55:020
2045860999323,13cyclictest0-21swapper/011:10:460
204586099931,76cyclictest0-21swapper/009:30:120
204586099931,76cyclictest0-21swapper/009:30:120
204586099931,61cyclictest0-21swapper/007:27:480
2045860999234,22cyclictest67350irq/527-eth0-Tx07:30:190
2045860999234,22cyclictest67350irq/527-eth0-Tx07:30:180
204586099922,6cyclictest2179221-21aten2_r3power_v10:15:180
204586099922,5cyclictest2331578-21unixbench_multi12:10:440
204586099922,5cyclictest2331578-21unixbench_multi12:10:430
204586099922,5cyclictest2132126-21latency_hist09:40:000
204586099922,5cyclictest2132126-21latency_hist09:40:000
2045875999179,6cyclictest2053687-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork		07:44:173
204586099911,64cyclictest0-21swapper/008:44:030
204586099911,57cyclictest0-21swapper/007:19:110
204586099911,57cyclictest0-21swapper/007:19:100
204586099911,4cyclictest0-21swapper/008:55:410
204586099901,61cyclictest0-21swapper/008:28:530
204586099892,6cyclictest2263940-21sendmail-msp11:20:010
204586099892,59cyclictest0-21swapper/008:48:170
204586099892,59cyclictest0-21swapper/008:48:170
2045860998826,24cyclictest2203348-21ssh10:33:350
2045860998739,15cyclictest0-21swapper/007:51:390
2045875998673,7cyclictest2070396-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork		08:29:243
2045870998674,6cyclictest2156175-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork		10:54:472
2045870998572,7cyclictest2165779-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork		10:19:422
2045881998479,2cyclictest0-21swapper/410:04:414
2045870998473,5cyclictest2053687-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork		07:34:182
2045870998473,5cyclictest2053687-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork		07:34:182
2045875998066,7cyclictest2186549-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork		11:32:463
2045870998070,7cyclictest2249204-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork		11:19:502
2045881997974,2cyclictest0-21swapper/409:40:454
2045881997974,2cyclictest0-21swapper/409:40:454
2045881997967,7cyclictest2147155-21ssh09:50:354
2045875997966,6cyclictest2084038-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork		09:29:333
204586099791,63cyclictest0-21swapper/009:02:270
204586099791,55cyclictest0-21swapper/008:50:070
22991402780,4sleep40-21swapper/411:45:524
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional