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2026-08-04 - 17:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot4.osadl.org (updated Tue Aug 04, 2026 12:46:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1140866215121498,6sleep21134844-21kworker/2:0+events@
dbs_work_handler
07:07:082
114125899135121,7cyclictest1342716-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
11:24:483
11412489911499,8cyclictest1213783-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
10:34:381
11412489911499,8cyclictest1213783-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
10:34:371
11412429911388,6cyclictest1405116-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
12:09:550
11412429911388,6cyclictest1405116-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
12:09:550
11412489911096,7cyclictest1296775-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
11:39:511
11412489910694,6cyclictest1317362-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
11:04:441
11412429910438,43cyclictest1304705-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
10:38:510
114124299991,82cyclictest1202009-21grep09:20:240
1141248999884,7cyclictest1389506-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
11:44:521
1141242999843,5cyclictest13-21ksoftirqd/009:33:580
1141242999843,5cyclictest13-21ksoftirqd/009:33:580
1141263999683,7cyclictest1320795-21ssh10:50:134
1141242999671,15cyclictest67350irq/527-eth0-Tx11:03:210
1141248999480,7cyclictest1304705-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
10:44:401
1141248999480,7cyclictest1304705-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
10:44:391
13566282910,5sleep40-21swapper/411:16:404
114124299911,76cyclictest1189167-21head09:05:440
1141268998982,3cyclictest0-21swapper/511:29:495
1141268998982,3cyclictest0-21swapper/511:29:495
12328542850,5sleep50-21swapper/509:44:045
1141263998579,3cyclictest0-21swapper/407:35:344
1141263998578,4cyclictest0-21swapper/409:12:004
1141242998560,16cyclictest67450irq/528-eth0-Tx10:20:130
1141242998560,15cyclictest67350irq/527-eth0-Tx11:40:410
1141242998559,17cyclictest67450irq/528-eth0-Tx10:30:330
1141242998559,17cyclictest67450irq/528-eth0-Tx10:30:330
1141242998552,17cyclictest0-21swapper/008:10:330
1141242998550,7cyclictest1198667-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
09:27:270
1141242998523,37cyclictest0-21swapper/011:25:270
1141242998523,37cyclictest0-21swapper/011:25:270
13226412840,4sleep30-21swapper/310:50:483
1141263998470,8cyclictest1193007-21diskmemload-412:34:094
1141258998472,6cyclictest1241878-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
09:59:343
12801042830,4sleep30-21swapper/310:19:543
12801042830,4sleep30-21swapper/310:19:533
1141263998371,5cyclictest1460735-21ssh12:35:334
1141242998346,18cyclictest1146145-21missed_timers07:20:250
1141242998341,4cyclictest1287917-21df_inode10:25:210
1141242998341,4cyclictest1287917-21df_inode10:25:200
1141258998268,7cyclictest1169848-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
08:34:153
1141242998259,5cyclictest1460367-21cat12:35:250
114124299821,8cyclictest1280393-21cat10:20:010
114124299821,8cyclictest1280393-21cat10:20:000
1141263998168,7cyclictest1309987-21ssh10:41:234
1141263998168,7cyclictest1309987-21ssh10:41:224
14103862800,4chrt0-21swapper/211:57:202
1141263998074,3cyclictest0-21swapper/408:15:354
1141263998073,4cyclictest0-21swapper/408:40:364
1141263998073,4cyclictest0-21swapper/408:40:354
1141242998058,4cyclictest67450irq/528-eth0-Tx10:50:010
114124299802,56cyclictest1174513-21taskset08:30:310
1141268997973,2cyclictest0-21swapper/509:14:205
1141258997965,7cyclictest1396351-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
11:49:523
114124299792,38cyclictest0-21swapper/011:35:430
114124299791,50cyclictest1157390-21latency_hist07:50:020
114124299791,50cyclictest1157390-21latency_hist07:50:010
1141263997871,3cyclictest0-21swapper/411:25:274
1141263997871,3cyclictest0-21swapper/411:25:274
1141258997865,7cyclictest1222046-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
09:35:463
1141242997869,6cyclictest1414948-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
12:04:540
1141242997866,4cyclictest67350irq/527-eth0-Tx10:50:330
1141242997860,5cyclictest0-21swapper/009:19:210
1141258997764,7cyclictest1396351-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
11:58:463
1141242997734,26cyclictest67350irq/527-eth0-Tx12:20:390
114124299772,5cyclictest1144310-21ntpq07:15:370
1141268997670,3cyclictest0-21swapper/507:25:275
1141263997671,2cyclictest0-21swapper/411:10:274
1141263997664,7cyclictest1403039-21ssh11:51:414
1141242997647,16cyclictest67450irq/528-eth0-Tx09:35:190
114124299762,57cyclictest0-21swapper/008:20:020
1141263997569,3cyclictest0-21swapper/412:25:474
114124299759,53cyclictest14-21rcu_preempt09:48:270
1141242997553,14cyclictest0-21swapper/008:20:420
1141242997553,14cyclictest0-21swapper/008:20:410
1141242997541,16cyclictest1189535-21diskmemload11:45:230
1141263997468,3cyclictest0-21swapper/408:50:374
1141263997468,3cyclictest0-21swapper/407:55:254
1141263997467,4cyclictest0-21swapper/407:30:234
1141263997467,3cyclictest0-21swapper/408:45:284
1141263997465,5cyclictest1412275-21ssh11:59:124
1141258997462,6cyclictest1359946-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
11:31:463
1141258997460,7cyclictest1213783-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
10:14:363
1141258997460,7cyclictest1213783-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
10:14:363
1141242997447,19cyclictest67550irq/529-eth0-Tx08:00:330
1141268997367,3cyclictest0-21swapper/510:31:475
1141268997367,3cyclictest0-21swapper/510:31:465
1141263997368,2cyclictest0-21swapper/410:15:354
1141263997368,2cyclictest0-21swapper/410:15:344
1141258997359,7cyclictest1296775-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
11:14:453
114124299738,53cyclictest13-21ksoftirqd/009:56:540
1141242997364,6cyclictest1179867-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
08:49:170
114124299731,63cyclictest67550irq/529-eth0-Tx12:10:240
114124299731,56cyclictest0-21swapper/009:00:410
1141263997266,2cyclictest0-21swapper/409:30:194
1141263997266,2cyclictest0-21swapper/409:30:184
1141263997265,3cyclictest0-21swapper/411:09:464
1141258997258,7cyclictest1405116-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
12:20:233
1141242997251,4cyclictest67450irq/528-eth0-Tx07:40:410
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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