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2025-06-16 - 20:15
OSADL QA Farm

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of system in rack #3, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot4.osadl.org (updated Mon Jun 16, 2025 12:47:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)		T*(,W**)
latency
(µs)		CmdPIDPrioCmd
526655227652742,14sleep40-21swapper/407:05:434
525771217711753,6sleep3524661-21kworker/3:2+events@
dbs_work_handler		07:05:223
527127991261,93cyclictest694175-21kworker/u12:2+flush-179:96@
wb_workfn		11:21:170
527127991161,105cyclictest0-21swapper/009:05:010
5271279910977,23cyclictest0-21swapper/008:20:170
5271279910977,23cyclictest0-21swapper/008:20:170
5271279910917,47cyclictest0-21swapper/011:05:290
5271279910915,79cyclictest0-21swapper/010:20:400
5271279910915,79cyclictest0-21swapper/010:20:400
52715499108101,3cyclictest0-21swapper/512:37:055
52715499108101,3cyclictest0-21swapper/512:37:055
5271279910841,46cyclictest0-21swapper/010:39:540
527127991071,3cyclictest0-21swapper/012:20:430
527127991071,3cyclictest0-21swapper/012:20:420
5271389910694,6cyclictest662088-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork		10:56:522
527127991061,93cyclictest0-21swapper/007:44:150
527127991061,93cyclictest0-21swapper/007:44:150
5271279910573,23cyclictest0-21swapper/008:10:170
527127991051,65cyclictest554910-1kworker/0:1H+mmc_complete@
mmc_blk_mq_complete_work		08:45:250
527127991051,65cyclictest554910-1kworker/0:1H+mmc_complete@
mmc_blk_mq_complete_work		08:45:250
5271279910481,15cyclictest579384-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork		09:36:040
5271279910481,15cyclictest579384-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork		09:36:030
5271279910449,43cyclictest0-21swapper/008:04:310
5271279910449,43cyclictest0-21swapper/008:04:310
5271279910343,44cyclictest0-21swapper/010:31:300
527127991031,88cyclictest0-21swapper/008:15:350
5271279910269,23cyclictest64250irq/527-eth0-Tx08:30:410
5271279910173,13cyclictest64250irq/527-eth0-Tx11:10:400
5271279910173,13cyclictest64250irq/527-eth0-Tx11:10:400
5271279910164,27cyclictest64350irq/528-eth0-Tx12:05:290
5271279910164,27cyclictest64350irq/528-eth0-Tx12:05:280
5271279910155,30cyclictest0-21swapper/007:12:130
527127991011,89cyclictest0-21swapper/008:53:550
5271279910058,27cyclictest0-21swapper/011:49:290
527127999957,26cyclictest0-21swapper/008:05:190
527127999957,26cyclictest0-21swapper/008:05:190
527127999866,22cyclictest64250irq/527-eth0-Tx09:40:590
527127999866,22cyclictest64250irq/527-eth0-Tx09:40:590
527127999864,4cyclictest64250irq/527-eth0-Tx12:03:130
527127999864,4cyclictest64250irq/527-eth0-Tx12:03:120
527127999843,43cyclictest0-21swapper/007:35:270
527127999843,43cyclictest0-21swapper/007:35:270
52712799981,92cyclictest0-21swapper/008:40:310
52712799981,92cyclictest0-21swapper/008:40:310
52712799981,66cyclictest0-21swapper/007:46:200
527154999790,3cyclictest0-21swapper/511:11:555
527154999790,3cyclictest0-21swapper/511:11:545
52712799972,90cyclictest0-21swapper/008:57:570
527127999666,22cyclictest0-21swapper/007:23:280
527127999650,18cyclictest0-21swapper/007:30:270
527127999650,18cyclictest0-21swapper/007:30:270
52712799961,68cyclictest0-21swapper/009:20:420
527127999556,28cyclictest64350irq/528-eth0-Tx10:07:430
52712799951,69cyclictest574735-21diskmemload09:59:490
527127999464,5cyclictest637504-21ssh10:11:000
527127999464,5cyclictest637504-21ssh10:11:000
527127999450,17cyclictest0-21swapper/011:32:030
527127999450,17cyclictest0-21swapper/011:32:030
52712799942,64cyclictest0-21swapper/010:15:460
52712799942,5cyclictest690721-21latency_hist11:05:030
52712799942,5cyclictest690721-21latency_hist11:05:020
52712799942,56cyclictest0-21swapper/012:15:430
527127999420,38cyclictest726320-21latency_hist11:40:020
52712799941,67cyclictest0-21swapper/011:41:150
52712799941,67cyclictest0-21swapper/011:41:140
52712799941,66cyclictest0-21swapper/009:35:040
52712799941,66cyclictest0-21swapper/009:35:030
52712799932,69cyclictest48-21rcuop/410:40:150
52712799932,69cyclictest48-21rcuop/410:40:140
527138999282,4cyclictest576545-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork		09:31:032
527138999282,4cyclictest576545-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork		09:31:032
527127999247,14cyclictest0-21swapper/010:46:040
527127999246,14cyclictest0-21swapper/010:55:380
527127999215,45cyclictest790947-21ssh12:33:140
52712799921,47cyclictest796401-21ssh12:37:130
52712799921,47cyclictest796401-21ssh12:37:130
527127999157,3cyclictest0-21swapper/007:15:150
527127999148,16cyclictest0-21swapper/009:10:530
527127999148,16cyclictest0-21swapper/009:10:530
527127999147,15cyclictest0-21swapper/009:46:110
527127999053,5cyclictest64250irq/527-eth0-Tx12:25:280
527154998983,3cyclictest0-21swapper/507:40:265
527154998983,3cyclictest0-21swapper/507:40:265
527138998975,7cyclictest728048-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork		11:42:012
527138998975,7cyclictest728048-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork		11:42:002
527127998956,4cyclictest64450irq/529-eth0-Tx10:25:350
527127998947,15cyclictest0-21swapper/011:55:490
52712799891,51cyclictest534889-21chrt07:28:570
527127998859,3cyclictest0-21swapper/011:20:010
52712799882,5cyclictest626487-21open_files10:00:400
52712799882,5cyclictest626487-21open_files10:00:400
52712799882,5cyclictest544311-21ls07:50:390
52712799882,5cyclictest544311-21ls07:50:380
52712799881,82cyclictest0-21swapper/011:29:090
52712799881,58cyclictest615789-21irqstats09:50:260
52712799871,60cyclictest0-21swapper/009:15:110
52712799871,51cyclictest0-21swapper/007:58:330
52712799871,51cyclictest0-21swapper/007:58:330
52712799871,48cyclictest0-21swapper/009:05:180
527127998714,40cyclictest0-21swapper/011:50:180
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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