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2026-02-02 - 07:11
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot4.osadl.org (updated Mon Feb 02, 2026 00:46:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1040897231913174,7sleep21021249-21kworker/2:0+events@
dbs_work_handler
19:05:362
1040897231913174,7sleep21021249-21kworker/2:0+events@
dbs_work_handler
19:05:362
10419009914259,55cyclictest1105221-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:46:280
104194099121116,2cyclictest0-21swapper/523:58:235
10419119911299,6cyclictest1045583-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
19:20:592
10419119911299,6cyclictest1045583-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
19:20:582
10419239910895,6cyclictest1246283-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:26:183
10419239910660,16cyclictest1272578-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:59:233
10419009910556,29cyclictest1222524-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:35:390
10419239910388,7cyclictest1067753-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:41:073
10419239910388,7cyclictest1067753-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:41:063
10419409910296,3cyclictest0-21swapper/519:10:585
10419119910290,6cyclictest1163814-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
22:26:142
1041940999993,3cyclictest0-21swapper/522:43:295
1041940999992,3cyclictest0-21swapper/519:17:355
104190099998,67cyclictest650-21jbd2/mmcblk1p3-21:40:220
104190099998,67cyclictest650-21jbd2/mmcblk1p3-21:40:220
1041940999690,3cyclictest0-21swapper/520:51:075
1041911999581,8cyclictest1163814-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
22:20:142
104122529576,10sleep50-21swapper/519:05:405
104122529576,10sleep50-21swapper/519:05:395
13140442940,4sleep41314043-21ssh00:10:454
11858042940,16sleep337-21ksoftirqd/322:29:273
1041940999386,3cyclictest0-21swapper/521:49:345
104190099928,69cyclictest0-21swapper/019:15:120
1041940999185,3cyclictest0-21swapper/522:51:175
1041911999176,8cyclictest1294608-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
00:05:272
104190099919,68cyclictest1218758-21if_eth122:55:230
1041940999084,3cyclictest0-21swapper/521:01:075
1041900999039,28cyclictest13-21ksoftirqd/023:40:300
1041900999010,46cyclictest13301-21runrttasks21:59:290
1041940998982,3cyclictest0-21swapper/500:38:535
1041940998982,3cyclictest0-21swapper/500:38:535
1041911998977,6cyclictest1105221-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:36:092
1041911998977,6cyclictest1105221-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:36:082
1041900998959,16cyclictest1079978-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:31:070
1041940998881,3cyclictest0-21swapper/523:21:345
104190099889,50cyclictest1286434-21ssh23:49:490
104190099889,50cyclictest1286434-21ssh23:49:480
1041900998832,41cyclictest13-21ksoftirqd/022:53:360
1041911998774,6cyclictest1201685-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:57:062
1041911998773,7cyclictest1329498-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
00:38:342
1041911998773,7cyclictest1329498-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
00:38:342
1041911998768,7cyclictest1141949-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
22:16:142
1041905998774,7cyclictest1294608-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
00:08:441
104190099879,44cyclictest1152363-21kworker/u12:2+rpciod@
rpc_async_schedule
22:20:180
1041940998678,4cyclictest0-21swapper/500:33:525
1041905998672,7cyclictest1183786-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:15:351
1041905998672,7cyclictest1183786-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:15:351
1041911998573,6cyclictest1122882-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:44:342
1041911998573,6cyclictest1122882-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:44:332
1041911998571,7cyclictest1329498-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
00:34:222
1041923998472,6cyclictest1105221-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:53:333
1041905998472,6cyclictest1326841-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
00:29:351
104190099848,58cyclictest0-21swapper/022:08:370
1041900998430,7cyclictest1230587-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:15:090
1041900998430,7cyclictest1230587-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:15:090
1041940998377,3cyclictest0-21swapper/520:40:395
1041940998377,3cyclictest0-21swapper/520:40:385
1041900998368,8cyclictest1272578-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:58:230
104083728353,21sleep40-21swapper/419:05:334
104083728353,21sleep40-21swapper/419:05:324
1041940998276,3cyclictest0-21swapper/521:27:415
1041940998275,3cyclictest0-21swapper/522:55:345
1041911998269,7cyclictest1079978-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:07:342
1041905998269,7cyclictest1141949-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
22:06:131
1041905998269,7cyclictest1091348-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:21:091
1041905998266,9cyclictest1246283-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:25:341
104190099827,70cyclictest0-21swapper/000:10:150
1041940998174,3cyclictest0-21swapper/522:05:335
1041923998152,8cyclictest1097703-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:16:393
1041911998169,6cyclictest1067753-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:35:362
1041911998167,7cyclictest1222524-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:36:022
1041911998167,7cyclictest1183786-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:15:192
1041911998167,7cyclictest1183786-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:15:182
1041911998167,7cyclictest1045583-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
20:09:352
1041900998165,7cyclictest1064421-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:10:310
1041900998165,7cyclictest1064421-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:10:310
1041923998068,6cyclictest1246283-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:47:103
1041923998068,6cyclictest1246283-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:47:103
1041923998067,7cyclictest1152363-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:23:353
1041923998058,9cyclictest1222524-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:23:083
1041923998050,7cyclictest1222524-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:19:003
1041911998066,7cyclictest1183786-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
22:50:392
1041911998064,10cyclictest1246283-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:25:262
104190099808,45cyclictest0-21swapper/000:33:460
1041940997973,3cyclictest0-21swapper/520:45:585
1041940997973,3cyclictest0-21swapper/500:13:355
1041911997966,7cyclictest1272578-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
00:02:442
1041911997965,7cyclictest1191847-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:35:182
1041911997965,7cyclictest1079978-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:45:332
1041911997957,8cyclictest1272578-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:54:572
1041911997957,8cyclictest1272578-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:54:572
104190099799,53cyclictest0-21swapper/000:21:350
104190099799,52cyclictest0-21swapper/021:50:460
1041900997964,7cyclictest1045583-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
19:29:350
1041940997872,3cyclictest0-21swapper/519:50:385
1041940997871,3cyclictest0-21swapper/519:46:035
1041923997865,7cyclictest1183786-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
22:46:153
1041923997864,7cyclictest1045583-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
20:05:343
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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