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2026-02-14 - 11:36
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot4.osadl.org (updated Sat Feb 14, 2026 00:46:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
585655233043286,6sleep2583556-21kworker/2:1+events@
dbs_work_handler
19:07:162
5856582919910,4sleep50-21swapper/519:07:205
5856102504484,10sleep40-21swapper/419:06:424
586013991291,47cyclictest810096-21ssh23:30:440
5860139912722,73cyclictest591886-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
19:35:460
586013991232,106cyclictest802916-21grep23:25:250
586013991232,106cyclictest802916-21grep23:25:250
64684921140,3sleep50-21swapper/521:20:375
64684921140,3sleep50-21swapper/521:20:365
5860139911385,21cyclictest636486-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:29:240
5860139911385,21cyclictest636486-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:29:230
5860139911290,15cyclictest579545-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
19:11:420
5860139911223,73cyclictest744192-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
22:38:430
5860139911154,33cyclictest13-21ksoftirqd/023:40:430
586013991072,94cyclictest0-21swapper/000:18:550
5860139910582,15cyclictest775153-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:13:050
5860139910568,21cyclictest666636-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:31:570
5860329910498,3cyclictest0-21swapper/423:47:024
5860329910398,2cyclictest0-21swapper/420:16:514
5860139910360,36cyclictest790496-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:13:540
586013991022,90cyclictest0-21swapper/021:52:120
586013991022,88cyclictest637629-21ssh21:13:230
586013991021,87cyclictest0-21swapper/019:30:300
5860139910168,21cyclictest69050irq/528-eth0-Tx00:08:570
5860139910165,16cyclictest666636-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:23:520
5860139910163,15cyclictest636486-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:56:260
5860329910093,3cyclictest0-21swapper/419:21:454
5860329910087,6cyclictest637911-21diskmemload-400:38:384
5860139910058,16cyclictest797022-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:45:410
586013991002,85cyclictest709533-21ssh22:10:330
586013991002,81cyclictest0-21swapper/019:50:000
586013991002,81cyclictest0-21swapper/019:50:000
5860139910025,40cyclictest0-21swapper/022:01:180
586013991000,78cyclictest622051-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:37:470
586013999966,23cyclictest68950irq/527-eth0-Tx00:30:370
58601399992,77cyclictest0-21swapper/021:35:390
58601399991,87cyclictest0-21swapper/019:50:190
586013999868,20cyclictest0-21swapper/020:40:400
586013999861,14cyclictest596469-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:59:150
586013999861,14cyclictest596469-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:59:140
586013999828,48cyclictest0-21swapper/020:00:420
58601399981,83cyclictest0-21swapper/022:15:370
586013999765,22cyclictest69150irq/529-eth0-Tx22:40:050
58601399971,87cyclictest0-21swapper/020:58:240
58601399971,87cyclictest0-21swapper/020:58:240
586013999670,14cyclictest68950irq/527-eth0-Tx22:50:390
586013999670,14cyclictest68950irq/527-eth0-Tx22:50:390
586013999665,21cyclictest0-21swapper/021:15:240
586013999664,23cyclictest588234-21/usr/sbin/munin19:15:420
586013999664,23cyclictest588234-21/usr/sbin/munin19:15:420
586013999664,22cyclictest68950irq/527-eth0-Tx19:25:280
586013999664,22cyclictest68950irq/527-eth0-Tx19:25:280
586013999641,33cyclictest615176-21latency20:20:240
8887952950,3sleep50-21swapper/500:35:005
586013999563,22cyclictest68950irq/527-eth0-Tx21:20:350
586013999563,22cyclictest68950irq/527-eth0-Tx21:20:340
586018999478,8cyclictest666636-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:17:101
586013999467,13cyclictest69150irq/529-eth0-Tx19:40:220
586013999462,22cyclictest69150irq/529-eth0-Tx22:07:590
586013999462,22cyclictest69150irq/529-eth0-Tx22:07:580
586013999458,21cyclictest69150irq/529-eth0-Tx19:20:320
586013999448,24cyclictest0-21swapper/023:20:270
586013999448,24cyclictest0-21swapper/023:20:270
58601399942,69cyclictest0-21swapper/021:40:140
58601399941,81cyclictest0-21swapper/020:50:000
586032999387,3cyclictest0-21swapper/400:23:284
586032999387,3cyclictest0-21swapper/400:23:284
586013999356,23cyclictest69050irq/528-eth0-Tx23:50:410
586023999263,7cyclictest210-21kswapd023:45:122
58601399922,61cyclictest891958-21rm00:36:450
58601399921,80cyclictest0-21swapper/000:02:000
58601399921,73cyclictest768088-21ssh22:57:240
58601399921,45cyclictest636486-21kworker/u12:3+rpciod@
rpc_async_schedule
21:32:170
586013999158,21cyclictest69150irq/529-eth0-Tx23:36:430
586013999157,24cyclictest68950irq/527-eth0-Tx22:25:450
58601399911,71cyclictest0-21swapper/023:10:000
58601399911,60cyclictest0-21swapper/000:23:190
58601399911,60cyclictest0-21swapper/000:23:190
586032999084,3cyclictest0-21swapper/420:55:174
586032999084,3cyclictest0-21swapper/420:55:164
586032999083,3cyclictest0-21swapper/421:46:364
586013999060,20cyclictest68950irq/527-eth0-Tx21:05:220
586013999049,24cyclictest0-21swapper/023:00:190
586013999045,15cyclictest790650-21sh23:15:330
586013999045,15cyclictest790650-21sh23:15:330
586013998948,25cyclictest681108-21taskset21:48:070
586013998933,29cyclictest0-21swapper/022:47:170
58601399892,76cyclictest0-21swapper/023:55:370
586023998874,7cyclictest587653-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:16:442
586023998874,7cyclictest587653-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:16:432
586013998854,22cyclictest0-21swapper/021:00:210
586013998840,27cyclictest0-21swapper/000:25:180
586013998840,27cyclictest0-21swapper/000:25:170
58601399881,73cyclictest0-21swapper/020:15:360
586032998774,7cyclictest690735-21ssh21:55:374
58601399871,61cyclictest0-21swapper/020:05:390
586032998681,2cyclictest0-21swapper/423:42:254
586032998676,6cyclictest862514-21ssh00:13:324
586032998674,6cyclictest637911-21diskmemload-423:19:354
586032998674,6cyclictest637911-21diskmemload-423:19:344
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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