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2026-02-03 - 01:59
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot4.osadl.org (updated Tue Feb 03, 2026 00:46:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
34463722932910,10sleep23425100-21kworker/2:0+events@
dbs_work_handler
19:05:262
344756299126112,7cyclictest3510197-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:42:452
34475539912629,42cyclictest3488483-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:03:000
34475539912629,42cyclictest3488483-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:03:000
344756799117104,7cyclictest3479752-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:37:353
34475539911681,7cyclictest3697800-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:25:350
344756299115102,7cyclictest3638019-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:27:582
34475679911397,9cyclictest3510197-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
22:17:503
344757799110105,2cyclictest0-21swapper/521:57:475
34475539911075,7cyclictest3697800-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:08:020
34475629910894,7cyclictest3486042-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:12:392
34475629910693,7cyclictest3479752-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:42:342
34475629910693,7cyclictest3479752-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:42:342
34475539910671,7cyclictest3741484-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
00:32:380
34475629910389,7cyclictest3450641-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:22:302
3447567999985,7cyclictest3655196-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:19:353
3447567999985,7cyclictest3655196-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:19:343
3447571999884,8cyclictest3680303-21ssh23:37:344
3447577999786,5cyclictest34900242sleep520:52:365
3447553999535,37cyclictest3679889-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:40:030
3447553999524,45cyclictest3479752-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:36:190
3447571999380,7cyclictest3626989-21ssh22:55:134
3447567999380,7cyclictest3466225-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:02:253
3447567999278,7cyclictest3750319-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:34:053
3447567999260,9cyclictest3510197-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
22:10:563
3447562999161,6cyclictest3557479-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
22:00:582
3447553999156,17cyclictest3447885-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:16:560
3447553999133,7cyclictest3423664-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
19:13:330
3447553999124,5cyclictest3710049-21ssh00:00:540
3447553999124,5cyclictest3710049-21ssh00:00:530
3447567999076,7cyclictest3587856-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:44:353
3447562999076,7cyclictest3611784-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
23:05:342
3447562999060,7cyclictest3488483-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:50:352
36511952890,3sleep10-21swapper/123:14:551
3447571998882,3cyclictest0-21swapper/400:25:154
3447571998878,5cyclictest3686878-21ssh23:42:584
3447567998874,7cyclictest3450641-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
19:30:343
3447553998814,54cyclictest3447885-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:24:530
3447577998773,7cyclictest3467595-21chrt19:57:355
3447567998775,6cyclictest3538656-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:46:553
3447567998774,6cyclictest3510197-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:51:333
3447567998761,9cyclictest3569126-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:26:143
3447553998729,37cyclictest3450641-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
19:51:000
3447567998673,7cyclictest3450641-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:09:353
3447553998633,29cyclictest69050irq/528-eth0-Tx23:45:330
344755399861,26cyclictest0-21swapper/022:54:590
3447577998579,3cyclictest0-21swapper/520:13:235
3447571998574,6cyclictest3613521-21ssh22:44:314
3447571998572,7cyclictest3580333-21ssh22:17:344
3447562998571,7cyclictest3741484-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
00:35:242
3447562998571,7cyclictest3450641-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
19:19:352
344755399852,7cyclictest69250irq/530-eth0-Tx21:50:140
3447577998478,3cyclictest0-21swapper/521:10:205
3447567998472,6cyclictest3510197-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
22:02:493
3447567998470,7cyclictest3450641-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
19:35:343
344755399842,50cyclictest3703418-21timerandwakeup23:55:430
3447571998369,7cyclictest0-21swapper/423:46:034
3447567998360,9cyclictest3734441-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
00:35:303
3447562998362,8cyclictest3638019-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:24:322
3447562998362,8cyclictest3638019-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:24:312
3447553998338,7cyclictest3714250-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
00:20:280
3447553998333,24cyclictest69250irq/530-eth0-Tx21:20:320
3447577998276,3cyclictest0-21swapper/522:30:355
3447567998268,7cyclictest3496198-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:09:553
3447562998269,6cyclictest3569126-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:35:102
3447562998267,8cyclictest3423664-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
19:10:152
3447558998266,8cyclictest3510197-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:27:421
3447558998266,8cyclictest3510197-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:27:421
3447577998176,2cyclictest0-21swapper/523:41:055
3447577998175,3cyclictest0-21swapper/523:37:345
3447571998175,3cyclictest0-21swapper/422:45:504
3447571998175,3cyclictest0-21swapper/422:45:494
3447571998174,4cyclictest0-21swapper/421:55:334
3447571998168,7cyclictest3757276-21ssh00:39:204
3447571998166,9cyclictest3704277-21ssh23:56:284
3447567998167,8cyclictest3569126-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
23:10:153
3447567998166,8cyclictest3466225-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:10:153
3447562998168,7cyclictest3569126-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:11:352
3447553998144,17cyclictest0-21swapper/023:35:450
3447553998132,35cyclictest3471799-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:44:310
3447553998132,35cyclictest3471799-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:44:300
344755399811,18cyclictest0-21swapper/000:10:180
344755399811,18cyclictest0-21swapper/000:10:170
3447571998068,6cyclictest3464052-21taskset19:50:054
3447571998067,7cyclictest3588388-21sh22:24:244
3447571998067,7cyclictest3499649-21diskmemload-421:54:344
3447571998066,8cyclictest3643053-21ssh23:07:344
3447567998068,6cyclictest3714655-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
00:11:343
3447567998068,6cyclictest3714655-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
00:11:343
3447567998066,7cyclictest3496198-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
21:21:393
3447567998064,8cyclictest3548199-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:55:423
3447567998059,8cyclictest3697800-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:16:473
3447567998059,8cyclictest3697800-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:16:473
3447562998051,7cyclictest3527667-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:36:022
3447553998029,7cyclictest13-21ksoftirqd/021:55:250
3447577997974,2cyclictest0-21swapper/500:25:155
3447577997973,3cyclictest0-21swapper/519:37:215
3447571997969,5cyclictest3737927-21ssh00:23:444
3447571997966,7cyclictest3728438-21ssh00:15:424
3447571997966,7cyclictest3728438-21ssh00:15:414
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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