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2026-07-05 - 18:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot4.osadl.org (updated Sun Jul 05, 2026 12:46:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
34888512518501,6sleep03480611-21kworker/0:0+events@
dbs_work_handler
07:07:280
34888512518501,6sleep03480611-21kworker/0:0+events@
dbs_work_handler
07:07:270
34891979912144,56cyclictest3513561-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
08:15:110
34891979912144,56cyclictest3513561-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
08:15:110
3489197991101,95cyclictest0-21swapper/010:27:330
3489197991081,96cyclictest0-21swapper/007:25:270
3489197991081,96cyclictest0-21swapper/007:25:260
3489197991081,95cyclictest0-21swapper/008:40:360
34892099910794,6cyclictest3528632-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
08:50:183
34891979910773,24cyclictest67450irq/528-eth0-Tx08:45:250
3489197991071,91cyclictest0-21swapper/012:18:590
34891979910673,24cyclictest67450irq/528-eth0-Tx12:32:400
34891979910628,60cyclictest3581445-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
10:22:430
34891979910628,60cyclictest3581445-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
10:22:430
3489197991052,86cyclictest3706480-21ssh11:26:150
3489197991041,87cyclictest0-21swapper/012:05:180
34891979910369,22cyclictest67450irq/528-eth0-Tx09:50:130
34891979910369,21cyclictest67450irq/528-eth0-Tx10:30:190
34891979910221,24cyclictest3561978-21ssh09:30:330
34891979910221,24cyclictest3561978-21ssh09:30:330
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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