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2025-12-20 - 11:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot4.osadl.org (updated Sat Dec 20, 2025 00:46:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
882897235923573,6sleep1882811-21kworker/1:0+events@
dbs_work_handler
19:07:141
8817612581567,6sleep2880969-21kworker/2:3+events@
dbs_work_handler
19:05:202
8832619912537,16cyclictest893121-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
20:19:150
8832619911861,37cyclictest1059031-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:56:390
8832619911836,43cyclictest68950irq/527-eth0-Tx21:30:380
8832619911836,43cyclictest68950irq/527-eth0-Tx21:30:380
8832749911499,7cyclictest1041973-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
22:37:093
88326599114102,6cyclictest1165163-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:03:191
8832619911448,43cyclictest1010194-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
22:25:280
8832659911299,6cyclictest863989-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
19:21:401
8832619911119,7cyclictest969230-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:48:590
8832619911060,15cyclictest1189762-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:33:500
8832619910974,27cyclictest960699-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:37:010
8832619910974,27cyclictest960699-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
21:37:010
8832619910860,15cyclictest1077145-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:00:260
8832619910630,6cyclictest929355-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:08:290
8832619910630,6cyclictest929355-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:08:290
8832619910527,56cyclictest901209-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
20:39:410
8832839910498,3cyclictest0-21swapper/521:27:005
8832839910297,2cyclictest0-21swapper/520:01:465
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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