You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-16 - 10:08
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot4.osadl.org (updated Sun Aug 16, 2026 00:46:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4062430231243098,16sleep50-21swapper/519:05:145
406317722880,4sleep3341irq_work/319:05:303
40642369917299,50cyclictest4147544-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:57:210
40642369915997,40cyclictest159262-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
00:17:470
406423699148103,31cyclictest20100-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:47:310
406423699129101,20cyclictest152672-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
00:32:470
12287521170,5sleep014-21rcu_preempt23:45:200
406424799114100,7cyclictest4059817-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
19:11:522
406424799114100,7cyclictest4059817-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
19:11:522
40642369911459,18cyclictest0-21swapper/023:20:190
40642369911387,18cyclictest4082191-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
20:01:580
40642369911383,23cyclictest49807-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:52:320
40642369911383,23cyclictest49807-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
22:52:320
40642369911090,17cyclictest4132187-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:37:160
40642369911049,27cyclictest67450irq/528-eth0-Tx00:35:230
4064236991101,76cyclictest2604-21ssh22:14:330
4064236991101,76cyclictest2604-21ssh22:14:330
40642529910583,9cyclictest37574-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
23:02:333
40642369910458,38cyclictest121938-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
00:27:470
40642479910086,7cyclictest20100-21kworker/u12:1+events_unbound@
flush_memcg_stats_dwork
22:42:292
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional