OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of system in rack #3, slot #4

Click here to display the system's profile data or here to proceed to next system.

Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.
Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance

Characteristics of the 50 highest latencies:

System rack3slot4.osadl.org (updated Tue Jun 17, 2025 00:46:48)
Delayed (victim)					Switcher (culprit)			Timestamp	CPU
PID	Prio	Total latency (µs)	T^(,W^*) latency (µs)	Cmd	PID	Prio	Cmd	Timestamp	CPU
1616425	2	2239	2214,16	sleep4	0	-21	swapper/4	19:05:21	4
1617900	99	158	125,24	cyclictest	1782350	-21	kworker/u12:0+events_unbound@ flush_memcg_stats_dwork	23:03:13	0
1617922	99	119	113,3	cyclictest	0	-21	swapper/5	20:52:59	5
1617900	99	108	98,7	cyclictest	1773329	-21	kworker/u12:2+events_unbound@ flush_memcg_stats_dwork	00:38:27	0
1617910	99	106	94,6	cyclictest	1788768	-21	kworker/u12:1+events_unbound@ flush_memcg_stats_dwork	23:13:16	3
1617910	99	106	94,6	cyclictest	1788768	-21	kworker/u12:1+events_unbound@ flush_memcg_stats_dwork	23:13:15	3
1617910	99	106	94,6	cyclictest	1659285	-21	kworker/u12:2+events_unbound@ flush_memcg_stats_dwork	20:58:02	3
1617905	99	106	92,7	cyclictest	1753635	-21	kworker/u12:2+events_unbound@ flush_memcg_stats_dwork	22:33:10	1
1617905	99	106	92,7	cyclictest	1753635	-21	kworker/u12:2+events_unbound@ flush_memcg_stats_dwork	22:33:09	1
1617900	99	105	90,8	cyclictest	1854728	-21	kworker/u12:3+events_unbound@ flush_memcg_stats_dwork	23:58:22	0
1727880	2	98	0,8	sleep0	13	-21	ksoftirqd/0	22:05:03	0
1727880	2	98	0,8	sleep0	13	-21	ksoftirqd/0	22:05:02	0
1617916	99	97	93,2	cyclictest	0	-21	swapper/4	20:52:59	4
1617900	99	96	83,6	cyclictest	1838610	-21	kworker/u12:4+events_unbound@ flush_memcg_stats_dwork	23:43:20	0
1617900	99	96	83,6	cyclictest	1838610	-21	kworker/u12:4+events_unbound@ flush_memcg_stats_dwork	23:43:19	0
1617910	99	94	82,6	cyclictest	1827006	-21	kworker/u12:3+events_unbound@ flush_memcg_stats_dwork	23:33:19	3
1617910	99	94	82,6	cyclictest	1827006	-21	kworker/u12:3+events_unbound@ flush_memcg_stats_dwork	23:33:18	3
1617900	99	93	83,7	cyclictest	1722540	-21	kworker/u12:3+events_unbound@ flush_memcg_stats_dwork	22:18:08	0
1617900	99	93	83,7	cyclictest	1722540	-21	kworker/u12:3+events_unbound@ flush_memcg_stats_dwork	22:18:07	0
1617900	99	92	64,18	cyclictest	643	50	irq/528-eth0-Tx	19:40:17	0
1617910	99	91	79,6	cyclictest	1876265	-21	kworker/u12:4+events_unbound@ flush_memcg_stats_dwork	00:18:23	3
1617905	99	91	79,6	cyclictest	1676549	-21	kworker/u12:4+events_unbound@ flush_memcg_stats_dwork	21:53:06	1
1617909	99	90	76,7	cyclictest	1722540	-21	kworker/u12:3+events_unbound@ flush_memcg_stats_dwork	22:23:07	2
1617909	99	90	76,7	cyclictest	1722540	-21	kworker/u12:3+events_unbound@ flush_memcg_stats_dwork	22:23:06	2
1617916	99	86	71,9	cyclictest	1673711	-21	ssh	21:17:39	4
1617900	99	86	11,55	cyclictest	645	50	irq/530-eth0-Tx	21:25:40	0
1617922	99	84	78,3	cyclictest	0	-21	swapper/5	21:08:00	5
1617922	99	84	76,4	cyclictest	0	-21	swapper/5	21:41:54	5
1617909	99	84	71,6	cyclictest	1773329	-21	kworker/u12:2+events_unbound@ flush_memcg_stats_dwork	00:23:23	2
1617905	99	84	71,6	cyclictest	1591743	-21	kworker/u12:1+events_unbound@ flush_memcg_stats_dwork	19:57:56	1
1617900	99	84	57,17	cyclictest	642	50	irq/527-eth0-Tx	23:35:45	0
1617900	99	84	25,46	cyclictest	0	-21	swapper/0	23:15:01	0
1617900	99	84	25,46	cyclictest	0	-21	swapper/0	23:15:00	0
1617922	99	83	78,2	cyclictest	0	-21	swapper/5	20:21:43	5
1617900	99	83	64,8	cyclictest	644	50	irq/529-eth0-Tx	21:45:38	0
1617900	99	83	56,8	cyclictest	1734985	-21	wc	22:10:39	0
1617900	99	83	56,8	cyclictest	1734985	-21	wc	22:10:38	0
1617900	99	83	48,17	cyclictest	0	-21	swapper/0	20:30:25	0
1617922	99	82	77,2	cyclictest	0	-21	swapper/5	20:35:39	5
1617905	99	82	69,6	cyclictest	1670831	-21	kworker/u12:1+events_unbound@ flush_memcg_stats_dwork	21:33:04	1
1617905	99	82	69,6	cyclictest	1670831	-21	kworker/u12:1+events_unbound@ flush_memcg_stats_dwork	21:33:03	1
1617916	99	81	69,7	cyclictest	1845687	-21	ssh	23:45:45	4
1617916	99	81	69,7	cyclictest	1845687	-21	ssh	23:45:45	4
1617909	99	81	67,7	cyclictest	1715395	-21	kworker/u12:2+events_unbound@ flush_memcg_stats_dwork	22:03:07	2
1617909	99	81	67,7	cyclictest	1715395	-21	kworker/u12:2+events_unbound@ flush_memcg_stats_dwork	22:03:07	2
1617905	99	81	67,7	cyclictest	1773329	-21	kworker/u12:2+events_unbound@ flush_memcg_stats_dwork	23:53:20	1
1617900	99	81	53,18	cyclictest	642	50	irq/527-eth0-Tx	00:10:29	0
1617900	99	81	53,18	cyclictest	642	50	irq/527-eth0-Tx	00:10:28	0
1617900	99	81	1,3	cyclictest	0	-21	swapper/0	19:10:27	0
1617900	99	80	52,16	cyclictest	643	50	irq/528-eth0-Tx	19:50:35	0
^Timer ^*Wakeup (latency=timer+wakeup+contextswitch)


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This page was last modified on 2019-05-28 - 00:17