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2026-05-30 - 08:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot6.osadl.org (updated Sat May 30, 2026 00:45:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
302509913015,31cyclictest0-21swapper/120:05:141
2945521250,6chrt29458-21aten2.4_r3power22:10:151
302469912117,91cyclictest0-21swapper/021:55:130
30250991199,60cyclictest36-21kcompactd000:10:161
30250991168,61cyclictest8209-21diskmemload21:10:111
302509911614,36cyclictest0-21swapper/123:55:221
302509911612,29cyclictest0-21swapper/120:50:221
302469911113,83cyclictest0-21swapper/021:35:140
302469911110,85cyclictest0-21swapper/019:55:130
302469910871,27cyclictest14-21ksoftirqd/019:25:100
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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