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2026-05-16 - 21:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot6.osadl.org (updated Sat May 16, 2026 12:44:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
56779911891,19cyclictest14-21ksoftirqd/012:00:090
56779911589,18cyclictest14-21ksoftirqd/011:20:130
56779911483,20cyclictest14-21ksoftirqd/010:45:560
56779911384,16cyclictest14-21ksoftirqd/009:25:230
56779911178,23cyclictest14-21ksoftirqd/009:35:150
56779910981,18cyclictest14-21ksoftirqd/008:40:120
56779910980,17cyclictest14-21ksoftirqd/007:25:130
56779910980,17cyclictest14-21ksoftirqd/007:25:130
56779910680,17cyclictest14-21ksoftirqd/010:15:120
56779910478,17cyclictest14-21ksoftirqd/009:20:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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