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2026-09-01 - 02:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot6.osadl.org (updated Tue Sep 01, 2026 00:45:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
159729911677,26cyclictest26-21ksoftirqd/123:20:121
159729911477,25cyclictest26-21ksoftirqd/122:05:161
159729911273,27cyclictest26-21ksoftirqd/121:45:241
159729910562,32cyclictest26-21ksoftirqd/122:50:121
159729910464,28cyclictest26-21ksoftirqd/121:10:121
159729910259,33cyclictest26-21ksoftirqd/120:30:121
159729910159,30cyclictest26-21ksoftirqd/122:40:141
159729910159,30cyclictest26-21ksoftirqd/122:40:131
159729910154,35cyclictest26-21ksoftirqd/123:50:241
159729910154,35cyclictest26-21ksoftirqd/123:50:241
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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