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2025-11-30 - 17:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Sun Nov 30, 2025 12:45:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
222629911530,40cyclictest22254-21cyclictest11:30:150
222679911115,83cyclictest0-21swapper/110:15:211
222679911012,82cyclictest0-21swapper/108:50:131
222679911011,86cyclictest0-21swapper/110:00:141
22267991096,88cyclictest2522-21date09:15:011
22267991088,87cyclictest43822sleep109:20:111
222679910860,35cyclictest26-21ksoftirqd/108:15:161
222679910814,81cyclictest0-21swapper/110:45:161
222679910813,80cyclictest0-21swapper/111:30:121
222679910813,78cyclictest0-21swapper/109:35:111
222679910812,81cyclictest0-21swapper/110:05:151
222679910811,82cyclictest0-21swapper/112:30:111
222629910875,20cyclictest14-21ksoftirqd/007:45:110
222679910713,80cyclictest0-21swapper/110:10:131
222679910713,78cyclictest0-21swapper/110:25:161
222679910713,78cyclictest0-21swapper/109:25:151
222679910713,77cyclictest0-21swapper/112:10:151
222679910711,82cyclictest0-21swapper/108:55:121
222679910614,77cyclictest0-21swapper/111:25:121
222679910613,78cyclictest0-21swapper/110:55:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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