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2026-09-05 - 14:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Sat Sep 05, 2026 12:45:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19467210920,40sleep00-21swapper/007:08:390
19467210920,40sleep00-21swapper/007:08:390
19780998050,16cyclictest0-21swapper/011:40:120
19780997954,13cyclictest14-21ksoftirqd/009:15:240
19780997846,18cyclictest14-21ksoftirqd/008:45:130
19780997844,20cyclictest0-21swapper/008:35:140
19780997747,18cyclictest30654-21diskmemload09:10:140
19780997543,23cyclictest14-21ksoftirqd/011:10:160
19783997342,15cyclictest26-21ksoftirqd/107:20:001
19783997243,10cyclictest503-21snmpd08:07:531
19780997251,12cyclictest14-21ksoftirqd/012:30:140
19780997244,21cyclictest14-21ksoftirqd/007:10:150
19780997244,21cyclictest14-21ksoftirqd/007:10:150
19780997244,19cyclictest14-21ksoftirqd/007:35:250
19780997244,18cyclictest14-21ksoftirqd/008:25:150
19783997145,10cyclictest11161-21telnet11:15:181
19783997141,14cyclictest26-21ksoftirqd/110:20:001
19780997141,18cyclictest0-21swapper/011:45:130
19783997025,22cyclictest26-21ksoftirqd/111:40:001
19783997024,22cyclictest26-21ksoftirqd/109:00:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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