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2026-03-19 - 22:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Thu Mar 19, 2026 12:45:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20896999970,18cyclictest26-21ksoftirqd/110:30:111
20896999867,17cyclictest26-21ksoftirqd/109:55:111
20896999667,16cyclictest26-21ksoftirqd/107:45:251
20896999564,17cyclictest26-21ksoftirqd/108:00:131
2089199957,16cyclictest0-21swapper/009:40:120
2051529522,27sleep00-21swapper/007:08:040
2051529522,27sleep00-21swapper/007:08:030
20896999265,18cyclictest26-21ksoftirqd/108:25:131
20896999265,16cyclictest26-21ksoftirqd/109:20:131
20896999263,19cyclictest26-21ksoftirqd/108:10:141
20896999161,16cyclictest26-21ksoftirqd/111:45:101
2089199916,68cyclictest0-21swapper/010:00:260
2054329128,18sleep10-21swapper/107:08:241
2054329128,18sleep10-21swapper/107:08:241
2089199898,11cyclictest0-21swapper/012:35:120
20896998863,16cyclictest26-21ksoftirqd/112:00:141
20896998762,13cyclictest26-21ksoftirqd/112:30:121
20896998755,19cyclictest26-21ksoftirqd/107:50:101
2089199876,65cyclictest0-21swapper/007:30:130
20896998554,19cyclictest26-21ksoftirqd/107:25:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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