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2026-09-08 - 14:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Tue Sep 08, 2026 12:45:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20480211834,66sleep00-21swapper/007:07:200
209179911483,18cyclictest26-21ksoftirqd/107:45:121
209159911214,78cyclictest0-21swapper/009:45:250
3220421110,6sleep031781-21diskmemload09:10:180
209179911181,19cyclictest26-21ksoftirqd/112:00:151
209179910980,19cyclictest26-21ksoftirqd/110:55:121
209159910910,78cyclictest0-21swapper/008:00:120
209159910813,76cyclictest0-21swapper/011:00:140
209159910813,76cyclictest0-21swapper/011:00:140
209179910779,17cyclictest26-21ksoftirqd/112:25:141
209179910775,18cyclictest26-21ksoftirqd/111:25:121
209179910775,18cyclictest26-21ksoftirqd/109:05:131
209159910716,68cyclictest0-21swapper/007:25:220
209159910612,71cyclictest0-21swapper/008:15:110
209159910412,69cyclictest0-21swapper/010:10:160
209179910271,21cyclictest26-21ksoftirqd/112:10:131
209179910270,21cyclictest26-21ksoftirqd/109:10:121
209159910113,19cyclictest0-21swapper/009:35:130
209159910111,67cyclictest0-21swapper/008:45:140
209159910042,41cyclictest14-21ksoftirqd/009:20:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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