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2026-07-08 - 11:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Wed Jul 08, 2026 00:45:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
55779911467,35cyclictest26-21ksoftirqd/121:05:111
55779911434,22cyclictest0-21swapper/123:50:161
55739911383,19cyclictest14-21ksoftirqd/000:35:120
55739910880,15cyclictest14-21ksoftirqd/020:10:120
55739910377,14cyclictest0-21swapper/023:25:120
55739910371,18cyclictest14-21ksoftirqd/019:20:150
55779910211,20cyclictest0-21swapper/122:00:151
5577991019,26cyclictest0-21swapper/119:55:131
55779910112,24cyclictest0-21swapper/120:20:121
55739910169,19cyclictest0-21swapper/023:05:130
539821010,6chrt5395-21aten2.4_r3power20:40:161
55779910012,21cyclictest0-21swapper/122:20:141
5577999912,20cyclictest0-21swapper/100:10:141
5573999967,19cyclictest14-21ksoftirqd/023:35:130
5573999828,63cyclictest14-21ksoftirqd/000:20:110
557799979,22cyclictest0-21swapper/120:15:131
557799979,22cyclictest0-21swapper/120:15:131
5577999713,23cyclictest0-21swapper/121:30:251
5577999712,21cyclictest0-21swapper/121:15:161
557799959,27cyclictest0-21swapper/122:05:101
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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