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2026-07-11 - 13:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Sat Jul 11, 2026 00:44:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
42309913266,17cyclictest14-21ksoftirqd/020:50:120
42309911354,16cyclictest14-21ksoftirqd/020:15:110
42309911253,19cyclictest14-21ksoftirqd/000:05:150
42309911016,23cyclictest0-21swapper/022:10:110
42309911013,25cyclictest0-21swapper/020:55:120
42309910814,24cyclictest0-21swapper/019:10:110
42309910714,24cyclictest0-21swapper/022:45:120
4230991039,44cyclictest503-21snmpd22:15:130
42309910315,23cyclictest0-21swapper/019:55:120
42309910235,20cyclictest14-21ksoftirqd/019:40:100
42359910148,28cyclictest26-21ksoftirqd/123:55:111
42309910115,23cyclictest0-21swapper/023:35:120
42309910113,24cyclictest0-21swapper/000:30:110
42309910113,23cyclictest0-21swapper/021:55:120
42309910017,20cyclictest0-21swapper/019:35:120
4230999917,23cyclictest0-21swapper/020:30:110
4230999715,18cyclictest0-21swapper/022:00:110
4230999612,22cyclictest0-21swapper/020:05:120
156362950,5chrt15639-21kernelversion21:10:251
4235998712,60cyclictest0-21swapper/100:20:251
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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