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2026-05-10 - 20:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot6.osadl.org (updated Sun May 10, 2026 12:45:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28139911210,87cyclictest0-21swapper/011:20:130
28169911081,18cyclictest26-21ksoftirqd/108:55:151
28139911012,22cyclictest0-21swapper/008:20:150
28139910867,31cyclictest14-21ksoftirqd/007:10:140
28169910678,15cyclictest26-21ksoftirqd/110:55:141
28139910655,31cyclictest14-21ksoftirqd/007:15:130
28169910573,22cyclictest26-21ksoftirqd/108:35:151
28139910559,35cyclictest0-21swapper/010:10:150
28169910474,18cyclictest26-21ksoftirqd/108:10:151
28139910354,31cyclictest14-21ksoftirqd/008:25:140
999821020,6chrt9760-21/usr/sbin/munin10:30:181
2642210228,25sleep10-21swapper/107:09:391
28139910157,26cyclictest14-21ksoftirqd/011:50:130
28139910150,32cyclictest14-21ksoftirqd/010:15:110
289122980,5chrt28169-21/usr/sbin/munin09:50:380
2816999771,16cyclictest26-21ksoftirqd/110:00:121
2813999746,32cyclictest14-21ksoftirqd/007:50:170
67792960,5chrt6782-21kernelversion10:20:250
2813999654,31cyclictest14-21ksoftirqd/012:20:120
2813999511,63cyclictest0-21swapper/012:25:110
2816999429,54cyclictest0-21swapper/112:35:111
2813999411,65cyclictest0-21swapper/009:45:110
2813999339,34cyclictest14-21ksoftirqd/008:05:130
2816999257,23cyclictest26-21ksoftirqd/109:55:151
2816999257,22cyclictest26-21ksoftirqd/109:25:131
2816999222,25cyclictest231irq_work/107:40:111
2813999111,58cyclictest0-21swapper/007:20:120
2816999055,23cyclictest26-21ksoftirqd/111:45:141
2816999054,23cyclictest26-21ksoftirqd/109:30:141
2813999013,56cyclictest0-21swapper/011:35:120
2816998756,19cyclictest26-21ksoftirqd/108:15:131
2816998651,25cyclictest26-21ksoftirqd/107:25:121
2816998651,25cyclictest26-21ksoftirqd/107:25:121
2816998646,27cyclictest26-21ksoftirqd/112:10:111
2816998612,62cyclictest0-21swapper/110:05:151
2816998611,62cyclictest0-21swapper/108:20:141
2813998636,30cyclictest14-21ksoftirqd/011:05:120
2813998613,51cyclictest0-21swapper/009:25:120
2813998612,51cyclictest0-21swapper/011:55:110
2813998611,57cyclictest0-21swapper/007:40:130
2813998611,56cyclictest0-21swapper/012:30:130
2813998611,56cyclictest0-21swapper/012:30:120
2816998553,21cyclictest26-21ksoftirqd/108:45:151
2816998541,31cyclictest26-21ksoftirqd/110:50:221
2816998541,31cyclictest26-21ksoftirqd/110:50:221
2816998514,62cyclictest0-21swapper/108:50:251
2816998513,61cyclictest0-21swapper/107:30:121
2813998512,52cyclictest0-21swapper/011:10:220
2816998448,25cyclictest26-21ksoftirqd/109:05:231
2816998419,53cyclictest0-21swapper/107:10:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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