You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-23 - 04:56

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #3, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot6s.osadl.org (updated Mon Mar 23, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
316432117106,6sleep30-21swapper/319:08:583
31448210986,18sleep00-21swapper/019:06:270
31465210190,6sleep20-21swapper/219:06:412
31667210081,14sleep10-21swapper/119:09:171
48492850,1sleep0101ktimersoftd/021:32:140
275762730,1sleep20-21swapper/222:30:122
205752700,1sleep320577-21fschecks_time21:15:143
253362690,0sleep20-21swapper/222:27:192
3175299350,18cyclictest0-21swapper/122:25:121
327012300,1sleep30-21swapper/322:01:023
15772290,5sleep13175299cyclictest22:02:541
91892270,0sleep10-21swapper/122:10:191
3175299232,7cyclictest0-21swapper/119:11:581
3175399221,8cyclictest0-21swapper/222:06:042
3175399221,19cyclictest0-21swapper/222:00:112
3175399220,20cyclictest14866-21diskmemload22:48:012
3175299221,19cyclictest0-21swapper/122:45:121
3175299221,19cyclictest0-21swapper/119:25:121
3175399210,3cyclictest27070-21ssh23:03:152
3175399210,3cyclictest17665-21ssh22:20:032
3175399210,3cyclictest0-21swapper/223:36:472
3175399210,2cyclictest0-21swapper/221:43:472
3175299210,19cyclictest0-21swapper/119:55:121
31753992015,3cyclictest10632-21ssh23:20:112
3175399200,3cyclictest28500-21ssh23:05:102
3175399200,3cyclictest0-21swapper/223:41:182
3175399200,3cyclictest0-21swapper/221:51:022
3175399200,3cyclictest0-21swapper/200:34:192
3175399200,2cyclictest14866-21diskmemload00:15:022
3175399200,2cyclictest0-21swapper/222:55:112
3175399200,2cyclictest0-21swapper/222:36:532
3175399200,2cyclictest0-21swapper/221:28:302
3175399200,2cyclictest0-21swapper/221:00:302
3175399200,2cyclictest0-21swapper/220:56:032
3175399200,18cyclictest0-21swapper/223:26:052
3175399200,12cyclictest0-21swapper/223:55:192
3175399190,3cyclictest6686-21ssh23:15:142
3175399190,3cyclictest16429-21ssh22:18:262
3175399190,3cyclictest0-21swapper/223:10:352
3175399190,3cyclictest0-21swapper/219:46:022
3175399190,2cyclictest0-21swapper/223:50:062
3175399190,2cyclictest0-21swapper/223:30:142
3175399190,2cyclictest0-21swapper/222:53:142
3175399190,2cyclictest0-21swapper/222:40:142
3175399190,2cyclictest0-21swapper/222:12:162
3175399190,2cyclictest0-21swapper/221:46:092
3175399190,2cyclictest0-21swapper/221:30:152
3175399190,2cyclictest0-21swapper/221:19:202
3175399190,2cyclictest0-21swapper/220:26:032
3175399190,2cyclictest0-21swapper/200:35:512
3175399190,2cyclictest0-21swapper/200:13:222
3175399190,2cyclictest0-21swapper/200:07:202
31752991915,2cyclictest23-21ksoftirqd/121:32:051
3175299191,16cyclictest0-21swapper/120:20:111
3175199190,2cyclictest0-21swapper/021:00:110
3175199190,18cyclictest0-21swapper/022:30:100
3175499180,1cyclictest0-21swapper/322:25:113
3175399180,2cyclictest0-21swapper/223:45:152
3175399180,2cyclictest0-21swapper/223:45:152
3175399180,2cyclictest0-21swapper/221:56:592
3175399180,2cyclictest0-21swapper/221:36:022
3175399180,2cyclictest0-21swapper/221:20:192
3175399180,2cyclictest0-21swapper/221:10:022
3175399180,2cyclictest0-21swapper/221:05:152
3175399180,2cyclictest0-21swapper/220:36:022
3175399180,2cyclictest0-21swapper/220:05:152
3175399180,2cyclictest0-21swapper/220:00:192
3175399180,2cyclictest0-21swapper/219:36:032
3175399180,2cyclictest0-21swapper/219:10:142
3175399180,2cyclictest0-21swapper/200:25:022
3175399180,2cyclictest0-21swapper/200:20:342
3175399180,2cyclictest0-21swapper/200:00:102
3175399180,17cyclictest0-21swapper/219:25:132
31753991710,6cyclictest0-21swapper/220:30:142
3175399170,2cyclictest0-21swapper/220:48:142
3175399170,2cyclictest0-21swapper/220:40:112
3175399170,2cyclictest0-21swapper/220:10:102
3175399170,2cyclictest0-21swapper/219:55:302
3175399170,2cyclictest0-21swapper/219:50:152
3175399170,2cyclictest0-21swapper/219:40:152
3175399170,2cyclictest0-21swapper/219:30:102
3175399170,2cyclictest0-21swapper/219:15:472
3175299170,7cyclictest0-21swapper/119:18:021
3175299170,2cyclictest0-21swapper/123:21:051
31754991611,3cyclictest0-21swapper/323:30:003
3175399160,2cyclictest0-21swapper/220:50:152
3175399160,2cyclictest0-21swapper/220:20:022
3175399160,2cyclictest0-21swapper/220:15:192
3175399160,2cyclictest0-21swapper/219:20:142
3175299161,13cyclictest16136-21iostat23:25:171
31751991612,3cyclictest28518-21ssh23:05:110
3175499151,12cyclictest4040-21diskstats19:20:143
3175499151,12cyclictest0-21swapper/300:23:083
31754991510,3cyclictest0-21swapper/300:26:523
3175499150,13cyclictest14866-21diskmemload23:42:093
3175499150,13cyclictest0-21swapper/319:41:013
3175499150,13cyclictest0-21swapper/300:32:223
3175299153,2cyclictest0-21swapper/100:07:251
3175299150,2cyclictest2924-21kworker/1:121:17:041
31751991512,2cyclictest23274-21kworker/u8:123:36:050
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional