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2026-02-08 - 15:34
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #3, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot6s.osadl.org (updated Sun Feb 08, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31286211894,19sleep00-21swapper/007:09:060
31215211897,15sleep20-21swapper/207:08:122
310612115104,6sleep30-21swapper/307:06:133
31116211194,12sleep10-21swapper/107:06:551
50282900,0sleep20-21swapper/209:32:352
125052760,0sleep20-21swapper/209:40:172
52282750,1sleep10-21swapper/111:55:001
182002750,1sleep00-21swapper/010:57:230
327482700,0sleep20-21swapper/212:25:002
31386993817,19cyclictest0-21swapper/207:30:112
31384993817,19cyclictest0-21swapper/007:55:110
3138499360,3cyclictest0-21swapper/009:55:100
3138699256,1cyclictest0-21swapper/210:55:122
31387992314,7cyclictest15483-21diskmemload11:40:113
15632230,1sleep00-21swapper/007:15:140
3138799220,20cyclictest0-21swapper/309:20:103
238822220,1sleep10-21swapper/111:04:101
139762220,0sleep30-21swapper/310:17:343
3138799210,19cyclictest0-21swapper/310:35:123
3138699210,19cyclictest0-21swapper/208:15:102
3138499210,19cyclictest0-21swapper/011:55:110
52672200,1sleep25269-21sh11:19:222
52672200,1sleep25269-21sh11:19:222
3138799200,18cyclictest0-21swapper/307:25:113
3138699201,15cyclictest0-21swapper/207:41:032
31386991916,2cyclictest20447-21kworker/u8:109:58:042
3138699191,13cyclictest0-21swapper/209:08:042
3138699190,14cyclictest0-21swapper/210:01:042
3138599191,13cyclictest0-21swapper/109:30:001
3138499191,2cyclictest0-21swapper/010:45:120
113172190,0sleep00-21swapper/009:40:000
3138699181,5cyclictest0-21swapper/207:19:042
3138699181,2cyclictest0-21swapper/208:06:052
3138699181,2cyclictest0-21swapper/208:06:042
3138699181,2cyclictest0-21swapper/207:47:052
3138699180,3cyclictest0-21swapper/207:29:042
3138499180,2cyclictest0-21swapper/008:50:110
31387991713,2cyclictest0-21swapper/310:59:153
31387991712,3cyclictest0-21swapper/312:35:063
3138699171,7cyclictest0-21swapper/210:17:042
31386991714,2cyclictest29072-21kworker/u8:111:50:042
31386991714,2cyclictest16561-21kworker/u8:209:19:042
31386991714,2cyclictest14762-21kworker/u8:112:17:042
3138699171,2cyclictest0-21swapper/208:25:042
3138699170,16cyclictest0-21swapper/211:23:052
281102170,0sleep20-21swapper/208:20:122
92202160,0sleep10-21swapper/110:12:111
31386991613,2cyclictest7256-21kworker/u8:112:32:042
31386991613,2cyclictest31957-21kworker/u8:010:40:042
3138699160,2cyclictest0-21swapper/208:03:052
3138599162,8cyclictest5047-21copy07:25:001
3138599161,3cyclictest0-21swapper/110:05:131
3138599160,3cyclictest0-21swapper/112:39:501
3138799152,12cyclictest381ktimersoftd/310:29:453
31387991512,2cyclictest381ktimersoftd/309:54:583
31387991511,3cyclictest0-21swapper/310:45:233
3138799150,3cyclictest19153-21ssh11:34:153
3138799150,13cyclictest9850-21ssh10:13:163
3138799150,13cyclictest381ktimersoftd/312:00:263
3138799150,13cyclictest0-21swapper/309:15:153
31386991512,2cyclictest31957-21kworker/u8:010:38:052
31386991512,2cyclictest28160-21kworker/u8:109:26:042
31386991512,2cyclictest27780-21kworker/u8:011:28:042
31386991512,2cyclictest21006-21kworker/u8:212:14:052
31386991512,2cyclictest17612-21kworker/u8:110:28:042
31386991512,2cyclictest12162-21kworker/u8:010:24:042
3138699150,2cyclictest0-21swapper/207:59:042
3138699150,13cyclictest0-21swapper/212:35:072
3138599152,8cyclictest19674-21copy11:35:001
3138599151,12cyclictest28379-21apt-get12:20:111
3138599151,12cyclictest18583-21apt-get07:55:251
3138599151,12cyclictest0-21swapper/109:20:011
31385991510,3cyclictest25110-21df_abs11:05:131
31385991510,3cyclictest0-21swapper/109:13:311
3138499151,3cyclictest14138-21http_loadtime07:45:130
3138499151,3cyclictest10756-21apt11:25:120
3138499151,12cyclictest6585-21aten2.4_r3power10:10:130
3138499151,12cyclictest15272-21ssh10:19:420
31384991510,3cyclictest22971-21ssh10:27:210
3138499150,3cyclictest31700-21ssh11:11:540
3138499150,13cyclictest15483-21diskmemload10:32:330
3138499150,13cyclictest0-21swapper/009:00:180
3138799141,12cyclictest381ktimersoftd/311:58:443
31387991411,2cyclictest381ktimersoftd/311:05:183
31387991411,2cyclictest0-21swapper/312:17:543
31387991411,2cyclictest0-21swapper/308:50:253
3138799140,2cyclictest0-21swapper/311:48:563
3138799140,12cyclictest0-21swapper/311:25:253
3138699149,3cyclictest25677-21irqstats10:30:172
31386991411,2cyclictest9041-21kworker/u8:212:03:042
31386991411,2cyclictest4101-21kworker/u8:012:05:042
31386991411,2cyclictest31773-21kworker/u8:010:06:042
31386991411,2cyclictest29210-21kworker/u8:207:11:052
31386991411,2cyclictest28339-21kworker/u8:012:27:042
31386991411,2cyclictest22972-21kworker/u8:011:40:042
31386991411,2cyclictest17199-21kworker/u8:208:14:042
31386991411,2cyclictest13882-21kworker/u8:311:36:052
31386991411,2cyclictest13458-21kworker/u8:009:11:052
31386991411,2cyclictest0-21swapper/209:50:052
3138699140,13cyclictest0-21swapper/208:34:052
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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