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2026-02-25 - 19:40
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #3, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack3slot6s.osadl.org (updated Wed Feb 25, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
322372117106,6sleep30-21swapper/307:08:033
32158211597,12sleep10-21swapper/107:07:001
321222115104,6sleep20-21swapper/207:06:342
30615210985,17sleep00-21swapper/007:05:110
289132820,0sleep20-21swapper/211:36:112
296112760,1sleep00-21swapper/009:55:400
87312640,0sleep00-21swapper/011:15:170
286632520,0sleep20-21swapper/211:02:282
32421993615,19cyclictest27933-21ssh12:10:102
32420993614,18cyclictest16491-21diskmemload09:45:121
32419993632,2cyclictest0-21swapper/007:50:110
309132260,1sleep10-21swapper/112:12:411
3241999230,2cyclictest0-21swapper/012:10:000
3242199221,19cyclictest0-21swapper/209:25:122
315652220,0sleep00-21swapper/009:25:140
32422992118,2cyclictest6491-21kworker/u8:109:18:043
3242299211,18cyclictest0-21swapper/308:30:103
3242299210,2cyclictest0-21swapper/311:45:133
3242199211,18cyclictest0-21swapper/207:45:132
3242099210,19cyclictest0-21swapper/109:50:111
32422992017,2cyclictest9377-21kworker/u8:110:47:043
32422992017,2cyclictest4253-21kworker/u8:007:31:053
32422992017,2cyclictest24875-21kworker/u8:110:59:043
32422992017,2cyclictest2168-21kworker/u8:109:46:053
32422992016,2cyclictest23158-21ssh12:05:103
3242299201,2cyclictest0-21swapper/310:33:053
32421992011,7cyclictest0-21swapper/211:50:172
3242199200,3cyclictest24733-21ssh10:25:142
3242199200,3cyclictest0-21swapper/209:30:242
3242199200,13cyclictest0-21swapper/211:25:142
3241999200,2cyclictest0-21swapper/011:10:110
32422991916,2cyclictest6491-21kworker/u8:108:48:043
32422991916,2cyclictest326-21kworker/u8:107:12:053
32422991916,2cyclictest29898-21kworker/u8:012:12:053
32422991916,2cyclictest27186-21kworker/u8:310:52:043
32422991916,2cyclictest24875-21kworker/u8:111:08:043
32422991916,2cyclictest23062-21kworker/u8:112:27:053
32422991916,2cyclictest23048-21kworker/u8:009:52:043
3242199198,3cyclictest10741-21ssh09:36:152
3242199193,6cyclictest0-21swapper/208:50:222
3242199190,11cyclictest0-21swapper/210:19:132
3242199190,11cyclictest0-21swapper/209:11:372
32419991914,3cyclictest26884-21ssh11:35:100
32422991815,2cyclictest9377-21kworker/u8:110:44:043
32422991815,2cyclictest7886-21kworker/u8:211:16:043
32422991815,2cyclictest6491-21kworker/u8:109:12:043
32422991815,2cyclictest6491-21kworker/u8:109:07:053
32422991815,2cyclictest6377-21kworker/u8:111:54:053
32422991815,2cyclictest335-21kworker/u8:110:04:043
32422991815,2cyclictest30634-21kworker/u8:011:14:053
32422991815,2cyclictest2514-21kworker/u8:208:41:053
32422991815,2cyclictest23062-21kworker/u8:112:18:053
32422991815,2cyclictest2168-21kworker/u8:109:33:053
32422991815,2cyclictest21021-21kworker/u8:011:35:043
32422991815,2cyclictest14751-21kworker/u8:108:07:053
3242199189,7cyclictest0-21swapper/211:14:152
3242199188,2cyclictest0-21swapper/209:55:042
3242199181,6cyclictest0-21swapper/207:50:232
3242199181,11cyclictest18737-21ssh12:34:182
3241999180,13cyclictest0-21swapper/011:28:050
32422991714,2cyclictest7886-21kworker/u8:211:22:053
32422991714,2cyclictest24839-21kworker/u8:008:36:043
32422991714,2cyclictest20784-21kworker/u8:208:25:043
32422991714,2cyclictest20784-21kworker/u8:208:21:053
32422991714,2cyclictest17148-21kworker/u8:210:19:043
3242299170,7cyclictest0-21swapper/310:25:033
3242199179,2cyclictest0-21swapper/210:05:042
3242199178,2cyclictest0-21swapper/210:00:132
3242199178,2cyclictest0-21swapper/209:22:592
3242199177,2cyclictest0-21swapper/212:02:512
3242199172,6cyclictest0-21swapper/207:30:252
3242199170,9cyclictest0-21swapper/212:25:532
3242199170,11cyclictest0-21swapper/212:21:092
3242199170,11cyclictest0-21swapper/211:40:582
3242199170,11cyclictest0-21swapper/209:16:262
3242199170,10cyclictest0-21swapper/212:19:282
252002170,0sleep10-21swapper/110:25:161
32422991613,2cyclictest29565-21kworker/u8:009:24:053
32422991613,2cyclictest23062-21kworker/u8:112:20:043
32422991613,2cyclictest21021-21kworker/u8:011:43:043
32422991613,2cyclictest20784-21kworker/u8:208:04:043
32422991613,2cyclictest15655-21kworker/u8:207:16:053
32422991613,2cyclictest15655-21kworker/u8:207:16:043
32422991613,2cyclictest11487-21kworker/u8:211:58:043
3242299160,2cyclictest0-21swapper/310:38:053
3242299160,2cyclictest0-21swapper/309:42:043
3242299160,11cyclictest0-21swapper/309:00:043
3242199169,2cyclictest0-21swapper/211:24:482
3242199168,2cyclictest16491-21diskmemload11:31:482
3242199167,2cyclictest0-21swapper/211:05:132
3242199164,3cyclictest16491-21diskmemload11:46:552
3242199162,6cyclictest0-21swapper/209:00:232
3242199160,2cyclictest0-21swapper/209:45:482
3242199160,15cyclictest0-21swapper/212:35:182
3242199160,10cyclictest16491-21diskmemload10:53:562
3242099161,13cyclictest0-21swapper/112:00:241
32420991611,3cyclictest0-21swapper/108:55:141
98852150,0sleep10-21swapper/112:25:051
32422991512,2cyclictest14680-21kworker/u8:212:34:043
3242299150,2cyclictest0-21swapper/310:23:053
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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