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2026-07-10 - 23:04

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #3, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot6s.osadl.org (updated Fri Jul 10, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3142721090,0sleep10-21swapper/110:16:571
14794210998,6sleep30-21swapper/307:06:223
14804210886,17sleep10-21swapper/107:06:281
14918210695,6sleep20-21swapper/207:07:572
14838210079,16sleep00-21swapper/007:06:550
183182740,0sleep10-21swapper/110:36:441
262272730,0sleep20-21swapper/210:11:202
13212710,0sleep20-21swapper/209:45:522
15110993515,18cyclictest0-21swapper/309:15:113
1510899271,18cyclictest0-21swapper/109:25:131
246362260,1sleep30-21swapper/310:44:043
239782260,2sleep339-21ksoftirqd/310:10:023
1510799250,10cyclictest0-21swapper/011:35:110
1510999222,7cyclictest0-21swapper/211:04:062
1510999222,7cyclictest0-21swapper/211:04:052
15109992219,2cyclictest10116-21kworker/u8:108:55:052
15109992118,2cyclictest7155-21kworker/u8:111:38:052
15108992114,5cyclictest30151-21ssh09:42:041
15109992017,2cyclictest595-21kworker/u8:011:30:052
15109992017,2cyclictest23950-21kworker/u8:209:40:042
15109992017,2cyclictest20712-21kworker/u8:210:43:042
15109992017,2cyclictest18873-21kworker/u8:212:22:062
15109991916,2cyclictest31172-21kworker/u8:007:52:012
15109991916,2cyclictest28438-21kworker/u8:007:28:042
15109991916,2cyclictest26923-21kworker/u8:111:20:042
15109991916,2cyclictest26752-21kworker/u8:009:10:052
15109991916,2cyclictest12552-21kworker/u8:009:34:042
15109991916,2cyclictest1004-21kworker/u8:109:15:042
1510999190,2cyclictest0-21swapper/211:10:022
1510999190,2cyclictest0-21swapper/211:10:012
1510899190,2cyclictest0-21swapper/110:20:101
1510799191,2cyclictest0-21swapper/010:50:120
1511099180,2cyclictest0-21swapper/310:20:103
15109991815,2cyclictest29830-21kworker/u8:112:15:042
15109991815,2cyclictest2045-21kworker/u8:210:56:012
15109991815,2cyclictest18525-21kworker/u8:207:23:042
15109991815,2cyclictest16820-21kworker/u8:008:37:042
1510999181,2cyclictest0-21swapper/209:35:052
1510999180,2cyclictest0-21swapper/211:43:052
1510899180,16cyclictest30558-21diskmemload09:15:111
15109991714,2cyclictest4831-21kworker/u8:312:27:042
15109991714,2cyclictest29476-21kworker/u8:010:05:042
15109991714,2cyclictest28438-21kworker/u8:007:38:022
15109991714,2cyclictest27645-21kworker/u8:011:06:012
15109991714,2cyclictest23734-21kworker/u8:208:52:042
15109991714,2cyclictest21123-21kworker/u8:108:05:042
15109991714,2cyclictest18257-21kworker/u8:111:46:042
15109991714,2cyclictest14930-21kworker/u8:107:15:042
15109991714,2cyclictest12733-21kworker/u8:208:33:052
1510999170,2cyclictest0-21swapper/212:05:042
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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