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2025-12-27 - 20:20

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #3, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot6s.osadl.org (updated Sat Dec 27, 2025 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30907211493,16sleep20-21swapper/207:06:302
29389211493,15sleep10-21swapper/107:05:081
31169210897,6sleep00-21swapper/007:09:510
31007210588,12sleep30-21swapper/307:07:473
268272920,1sleep3381ktimersoftd/310:37:113
129012800,1sleep30-21swapper/309:44:493
118322780,0sleep00-21swapper/011:35:170
77572670,0sleep00-21swapper/009:38:160
120452670,0sleep00-21swapper/012:13:420
95182540,1sleep011-21rcuc/009:40:160
3120799310,29cyclictest0-21swapper/010:30:120
319322300,1sleep1221ktimersoftd/111:59:351
161232250,1sleep20-21swapper/209:47:442
181572220,0sleep20-21swapper/207:55:162
180732220,1sleep20-21swapper/211:05:122
151112220,0sleep10-21swapper/111:00:341
320882210,0sleep20-21swapper/209:29:322
31210992118,2cyclictest30883-21kworker/u8:212:07:043
3120799201,2cyclictest0-21swapper/008:00:120
3120799200,18cyclictest0-21swapper/009:00:110
264612200,1sleep00-21swapper/010:00:130
31210991916,2cyclictest28361-21kworker/u8:009:33:043
3121099191,2cyclictest0-21swapper/310:40:053
3121099190,17cyclictest0-21swapper/311:55:053
3120999190,18cyclictest0-21swapper/210:35:122
31208991916,2cyclictest21604-21kworker/u8:210:40:041
31210991815,2cyclictest4600-21kworker/u8:109:50:043
31210991815,2cyclictest3828-21kworker/u8:010:49:033
31210991815,2cyclictest30883-21kworker/u8:212:10:043
31210991815,2cyclictest30070-21kworker/u8:210:05:043
31210991815,2cyclictest29677-21kworker/u8:208:28:053
31210991815,2cyclictest25234-21kworker/u8:010:02:043
31210991815,2cyclictest2483-21kworker/u8:111:34:053
31210991815,2cyclictest22695-21kworker/u8:209:26:043
31210991815,2cyclictest16319-21kworker/u8:110:33:053
3121099180,16cyclictest0-21swapper/311:06:053
31210991714,2cyclictest4600-21kworker/u8:110:10:043
31210991714,2cyclictest29677-21kworker/u8:208:30:043
31210991714,2cyclictest2483-21kworker/u8:111:29:043
31210991714,2cyclictest24493-21kworker/u8:112:36:043
31210991714,2cyclictest2425-21kworker/u8:010:25:033
31210991714,2cyclictest13394-21kworker/u8:011:37:043
31210991714,2cyclictest13070-21kworker/u8:109:15:053
31210991714,2cyclictest12370-21kworker/u8:012:19:043
31210991714,2cyclictest11158-21kworker/u8:209:56:043
31210991714,2cyclictest10400-21kworker/u8:107:42:043
301182170,1sleep20-21swapper/210:04:392
103672170,0sleep00-21swapper/010:55:240
31210991613,2cyclictest5052-21kworker/u8:207:51:053
31210991613,2cyclictest3237-21kworker/u8:112:21:053
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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