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2026-09-19 - 08:12

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #3, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot6s.osadl.org (updated Sat Sep 19, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1708421380,1sleep317083-21ssh23:21:463
5629211290,16sleep00-21swapper/019:06:250
4690211186,18sleep20-21swapper/219:05:152
5632211087,18sleep30-21swapper/319:06:273
576529484,6sleep10-21swapper/119:08:101
271532700,1sleep30-21swapper/323:32:583
187522700,1sleep2301ktimersoftd/200:33:132
187522700,1sleep2301ktimersoftd/200:33:132
253702690,0sleep30-21swapper/321:12:433
166052680,0sleep30-21swapper/319:35:163
290932270,0sleep30-21swapper/320:05:173
5935992623,2cyclictest30997-21kworker/u8:223:19:052
5933992623,2cyclictest2464-21kworker/u8:122:08:050
5935992522,2cyclictest32385-21kworker/u8:023:43:052
5935992522,2cyclictest24483-21kworker/u8:122:28:052
5935992522,2cyclictest22311-21kworker/u8:121:39:042
5935992522,2cyclictest20286-21kworker/u8:022:52:052
5935992421,2cyclictest24483-21kworker/u8:122:21:042
5935992421,2cyclictest22311-21kworker/u8:121:22:052
5935992421,2cyclictest22311-21kworker/u8:121:22:042
5935992421,2cyclictest17435-21kworker/u8:000:12:052
5935992421,2cyclictest14851-21kworker/u8:123:23:052
5935992421,2cyclictest10498-21kworker/u8:223:50:042
5933992421,2cyclictest30997-21kworker/u8:222:39:040
5933992421,2cyclictest24906-21kworker/u8:121:51:040
5933992421,2cyclictest15550-21kworker/u8:000:39:040
5933992421,2cyclictest11626-21kworker/u8:222:03:040
130862240,0sleep30-21swapper/321:35:003
5935992320,2cyclictest9142-21kworker/u8:022:16:072
5935992320,2cyclictest6216-21kworker/u8:219:12:042
5935992320,2cyclictest17435-21kworker/u8:023:58:022
5935992320,2cyclictest11626-21kworker/u8:221:59:042
5935992320,2cyclictest10958-21kworker/u8:022:43:052
5933992320,2cyclictest2464-21kworker/u8:121:58:020
39212230,1sleep20-21swapper/223:08:352
5935992219,2cyclictest9227-21kworker/u8:023:31:052
5935992219,2cyclictest30997-21kworker/u8:222:59:052
5935992219,2cyclictest3018-21kworker/u8:100:21:052
5935992219,2cyclictest29276-21kworker/u8:200:25:042
5935992219,2cyclictest22311-21kworker/u8:121:32:042
5935992219,2cyclictest1909-21kworker/u8:123:10:012
5935992219,2cyclictest17435-21kworker/u8:000:08:022
593599220,13cyclictest0-21swapper/222:03:042
5935992118,2cyclictest9227-21kworker/u8:023:28:052
5935992118,2cyclictest30997-21kworker/u8:223:02:012
5935992118,2cyclictest27189-21kworker/u8:123:38:042
5935992118,2cyclictest11626-21kworker/u8:221:49:042
5933992118,2cyclictest9142-21kworker/u8:022:31:050
5933992118,2cyclictest30997-21kworker/u8:222:50:040
5933992118,2cyclictest30997-21kworker/u8:222:40:020
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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