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2026-07-02 - 10:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Thu Jul 02, 2026 00:45:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
307209911080,19cyclictest14-21ksoftirqd/023:25:120
234121100,7chrt2343-21grep23:50:340
307219910010,67cyclictest0-21swapper/122:35:121
307209910072,19cyclictest14-21ksoftirqd/021:35:130
30720999868,19cyclictest14-21ksoftirqd/019:55:120
3072199979,64cyclictest0-21swapper/100:05:161
3072199978,69cyclictest0-21swapper/119:40:141
3072199977,70cyclictest0-21swapper/122:25:121
30720999768,18cyclictest14-21ksoftirqd/023:20:140
3072199947,69cyclictest0-21swapper/120:45:121
30720999467,18cyclictest14-21ksoftirqd/023:05:150
3072199938,64cyclictest0-21swapper/123:20:161
3072199936,67cyclictest0-21swapper/120:35:131
30721999312,61cyclictest0-21swapper/122:50:131
30720999366,15cyclictest0-21swapper/020:05:110
30720999364,19cyclictest14-21ksoftirqd/023:10:140
3072199929,65cyclictest0-21swapper/120:30:131
3072199929,62cyclictest0-21swapper/119:45:121
3072199928,66cyclictest0-21swapper/121:45:221
3072199928,63cyclictest0-21swapper/123:00:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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