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2026-07-22 - 04:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Wed Jul 22, 2026 00:45:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
294409911987,21cyclictest29425-21cyclictest22:15:131
294369911775,31cyclictest14-21ksoftirqd/022:45:150
294409911185,17cyclictest26-21ksoftirqd/123:05:121
294369910911,79cyclictest0-21swapper/019:30:130
294369910658,37cyclictest0-21swapper/022:00:130
294409910380,16cyclictest26-21ksoftirqd/123:10:121
294409910070,20cyclictest26-21ksoftirqd/100:35:141
294409910069,18cyclictest26-21ksoftirqd/120:05:121
294409910068,22cyclictest26-21ksoftirqd/121:40:151
29436999948,32cyclictest14-21ksoftirqd/000:25:170
29440999861,22cyclictest26-21ksoftirqd/120:30:151
2944099965,62cyclictest0-21swapper/123:40:021
2943699965,66cyclictest7384-21diskmemload21:10:160
2944099955,62cyclictest0-21swapper/122:07:101
29436999513,61cyclictest0-21swapper/021:35:140
29440999411,67cyclictest0-21swapper/120:35:121
29440999411,67cyclictest0-21swapper/120:35:121
29440999317,63cyclictest0-21swapper/120:15:141
2943699928,22cyclictest0-21swapper/022:30:150
29436999234,35cyclictest562-21runrttasks20:25:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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