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2026-04-06 - 12:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Mon Apr 06, 2026 00:44:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
475329632,18sleep10-21swapper/119:08:261
5087998217,25cyclictest0-21swapper/119:40:321
5087998025,15cyclictest6319-21seq22:13:211
367128031,35sleep00-21swapper/019:05:180
270992800,13sleep0141ksoftirqd/023:10:250
5087997924,21cyclictest22121-21cat21:25:341
5087997917,16cyclictest503-21snmpd00:31:191
5087997825,14cyclictest11748-21seq22:27:071
5085997852,14cyclictest14-21ksoftirqd/021:05:250
5085997850,18cyclictest14-21ksoftirqd/000:05:120
5085997849,16cyclictest14-21ksoftirqd/022:35:130
5085997815,18cyclictest0-21swapper/020:05:110
326402770,28sleep1251rcuc/121:55:321
5085997654,12cyclictest0-21swapper/022:40:150
5087997540,19cyclictest26-21ksoftirqd/100:20:111
5087997524,16cyclictest9410-21ntpq20:50:311
5087997524,16cyclictest8195-21seq22:16:321
5087997524,16cyclictest8195-21seq22:16:321
5085997549,16cyclictest14-21ksoftirqd/021:35:130
5085997446,16cyclictest0-21swapper/022:00:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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