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2026-07-26 - 08:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Sun Jul 26, 2026 00:45:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2767828727,48sleep10-21swapper/119:08:161
2671428221,43sleep00-21swapper/019:05:200
28027996830,15cyclictest14-21ksoftirqd/019:40:010
28027996729,16cyclictest14-21ksoftirqd/021:20:000
2802799667,28cyclictest503-21snmpd23:50:530
167192660,6chrt16722-21grep23:05:480
28027996514,31cyclictest171rcuc/022:58:280
28033996321,9cyclictest26-21ksoftirqd/100:10:051
28033996215,42cyclictest0-21swapper/121:00:351
28027996238,18cyclictest14-21ksoftirqd/021:00:170
28027996219,16cyclictest481-21gdbus22:00:000
28033996137,9cyclictest26-21ksoftirqd/100:27:251
28033996136,9cyclictest26-21ksoftirqd/121:52:241
28033996129,18cyclictest0-21swapper/120:55:141
28033996118,38cyclictest26-21ksoftirqd/122:15:361
28033996036,9cyclictest26-21ksoftirqd/120:40:341
28033996036,8cyclictest26-21ksoftirqd/120:48:051
28033996035,9cyclictest26-21ksoftirqd/123:01:531
28027996037,17cyclictest14-21ksoftirqd/019:30:470
28027996036,18cyclictest14-21ksoftirqd/022:30:340
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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