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2026-07-05 - 17:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Sun Jul 05, 2026 12:45:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
912529831,53sleep00-21swapper/007:05:100
240152980,7chrt24017-21aten2.4_r3power07:45:171
204362840,21chrt26-21ksoftirqd/112:05:321
10870998364,9cyclictest14-21ksoftirqd/008:45:120
91232786,60sleep10-21swapper/107:05:091
10873997641,20cyclictest26-21ksoftirqd/110:55:121
10873997641,20cyclictest26-21ksoftirqd/110:55:121
10873997623,18cyclictest243-21systemd-journal08:55:001
10870997415,53cyclictest0-21swapper/007:25:150
10870997352,10cyclictest14-21ksoftirqd/009:00:130
10873997236,29cyclictest26-21ksoftirqd/112:10:151
10870997216,51cyclictest0-21swapper/009:35:120
10870997212,55cyclictest0-21swapper/010:10:120
10870997040,16cyclictest14-21ksoftirqd/011:15:130
10873996735,25cyclictest26-21ksoftirqd/112:03:211
10870996738,16cyclictest14-21ksoftirqd/012:15:140
10870996715,47cyclictest0-21swapper/007:35:150
10870996638,15cyclictest0-21swapper/009:20:120
82662650,17sleep1251rcuc/108:30:321
10870996537,22cyclictest14-21ksoftirqd/009:10:270
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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