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2026-05-24 - 13:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Sun May 24, 2026 00:45:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21819911517,90cyclictest0-21swapper/019:30:130
21819910813,88cyclictest0-21swapper/000:10:130
2184991067,82cyclictest0-21swapper/120:45:231
21819910549,49cyclictest0-21swapper/021:30:110
21819910414,22cyclictest0-21swapper/019:20:110
21819910412,22cyclictest0-21swapper/023:55:150
975921030,6chrt9762-21latency21:00:241
21819910316,23cyclictest0-21swapper/021:25:130
21819910215,20cyclictest0-21swapper/023:50:120
21819910215,18cyclictest0-21swapper/020:10:120
21819910214,22cyclictest0-21swapper/019:10:120
21819910116,22cyclictest0-21swapper/000:15:150
21819910116,19cyclictest0-21swapper/022:05:140
21819910114,21cyclictest0-21swapper/022:00:170
21819910012,21cyclictest0-21swapper/019:25:120
2181999931,19cyclictest2174-21cyclictest20:40:110
2181999917,17cyclictest0-21swapper/022:10:130
2181999914,22cyclictest0-21swapper/022:50:240
159329919,36sleep00-21swapper/019:05:370
2181999817,18cyclictest0-21swapper/022:15:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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