You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-22 - 14:16
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Thu Jan 22, 2026 12:45:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1543721340,6chrt15440-21sed08:25:020
202999911688,17cyclictest26-21ksoftirqd/109:05:241
202999911684,21cyclictest26-21ksoftirqd/112:20:121
202999911684,21cyclictest26-21ksoftirqd/112:20:121
202969911612,89cyclictest0-21swapper/011:05:120
202999911587,18cyclictest26-21ksoftirqd/111:10:241
202999911185,17cyclictest26-21ksoftirqd/108:40:111
202999911180,20cyclictest26-21ksoftirqd/107:45:141
202999910979,19cyclictest26-21ksoftirqd/109:10:141
202999910880,19cyclictest26-21ksoftirqd/110:55:071
202999910577,19cyclictest26-21ksoftirqd/111:30:121
202999910576,17cyclictest26-21ksoftirqd/108:45:241
202999910271,21cyclictest26-21ksoftirqd/111:15:131
19818210031,23sleep10-21swapper/107:06:511
20299999768,19cyclictest26-21ksoftirqd/112:15:131
20296999611,63cyclictest0-21swapper/007:25:100
20299999561,21cyclictest26-21ksoftirqd/110:10:121
20299999464,18cyclictest26-21ksoftirqd/110:25:121
20299999362,18cyclictest26-21ksoftirqd/107:20:121
20299999258,24cyclictest26-21ksoftirqd/110:30:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional