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2026-04-24 - 14:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack3slot6.osadl.org (updated Fri Apr 24, 2026 12:44:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4241999653,38cyclictest26-21ksoftirqd/111:55:141
378329416,32sleep10-21swapper/107:07:151
4241998330,9cyclictest26-21ksoftirqd/112:15:261
4241998260,10cyclictest26-21ksoftirqd/108:35:221
424099803,49cyclictest27124-21ntp_states11:10:280
4241997650,15cyclictest26-21ksoftirqd/109:30:231
405327616,51sleep00-21swapper/007:09:360
4241997546,19cyclictest26-21ksoftirqd/110:55:131
154982740,19sleep0171rcuc/009:10:020
4240997340,27cyclictest10344-21telnet10:25:250
4241997237,9cyclictest26-21ksoftirqd/109:15:221
4241997235,31cyclictest26-21ksoftirqd/109:50:001
4241997043,21cyclictest26-21ksoftirqd/110:05:111
4240997032,16cyclictest14-21ksoftirqd/011:27:370
70472690,6sleep10-21swapper/110:15:241
424199699,54cyclictest36-21kcompactd009:20:121
424199699,54cyclictest36-21kcompactd009:20:121
4241996941,18cyclictest26-21ksoftirqd/107:50:231
4241996927,37cyclictest26-21ksoftirqd/111:50:261
4240996935,28cyclictest1014-21telnet11:30:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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