You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-30 - 10:57
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot1.osadl.org (updated Fri Jan 30, 2026 00:45:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1702721800,8sleep116964-21sh22:50:581
1702721800,8sleep116964-21sh22:50:581
1043621230,2sleep10-21swapper/122:11:471
1043621230,2sleep10-21swapper/122:11:471
237521160,3chrt0-21swapper/220:40:542
2792021110,3sleep20-21swapper/200:06:262
2792021110,3sleep20-21swapper/200:06:262
272622880,4sleep30-21swapper/323:33:403
118482760,3chrt0-21swapper/223:50:552
118482760,3chrt0-21swapper/223:50:552
22582690,2sleep01231-21ls19:11:040
22582690,2sleep01231-21ls19:11:040
144492670,3sleep114415-21ssh23:20:561
144492670,3sleep114415-21ssh23:20:561
140522640,3sleep2261rcuc/200:25:552
140522640,3sleep2261rcuc/200:25:552
73042630,3sleep10-21swapper/122:41:011
73042630,3sleep10-21swapper/122:41:011
295242630,3sleep30-21swapper/323:35:573
295242630,3sleep30-21swapper/323:35:573
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional