You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-21 - 17:06
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the highest latencies:
System rack4slot2.osadl.org (updated Mon Sep 21, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1490529640,0chrt14774-1kworker/u3:207:06:440
3242829611,0sleep032457-21users09:30:360
7450950,0irq/46-4a1000009787-21sshd08:25:150
7450940,0irq/46-4a1000005026-21threads11:20:360
15292999468,0cyclictest0-21swapper11:30:240
7450930,0irq/46-4a10000028577-21memory07:45:180
7450930,0irq/46-4a1000002789-21tune2fs11:15:020
7450930,0irq/46-4a10000014176-21basename08:39:350
7350930,0irq/45-4a1000004365-21/usr/sbin/munin09:44:560
7450920,0irq/46-4a10000028505-21runrttasks10:55:120
7450920,0irq/46-4a10000024533-21/usr/sbin/munin07:35:070
7450920,0irq/46-4a10000023068-21df12:14:510
7450920,0irq/46-4a10000014732-21sshd11:50:030
15292999258,0cyclictest0-21swapper09:35:230
15292999258,0cyclictest0-21swapper07:40:250
7450910,0irq/46-4a100000627-21chrt07:59:430
7450910,0irq/46-4a10000030309-21memory12:35:200
7450910,0irq/46-4a10000027277-21unixbench_singl10:50:330
7450910,0irq/46-4a10000025355-21/usr/sbin/munin09:10:270
7450910,0irq/46-4a10000021647-21if_eth007:25:090
7450910,0irq/46-4a10000020948-21sshd12:09:020
7450910,0irq/46-4a10000019631-21df08:54:500
7450910,0irq/46-4a10000017608-21aten_r4power_po07:15:000
7350910,0irq/45-4a1000009273-21/usr/sbin/munin09:59:480
7350910,0irq/45-4a10000025123-21runrttasks12:20:160
7350910,0irq/45-4a10000023163-1kworker/u3:110:42:410
15292999157,0cyclictest0-21swapper11:40:210
15292999156,0cyclictest0-21swapper08:50:270
7450900,0irq/46-4a1000008295-21zcat08:20:300
7450900,0irq/46-4a1000007792-21fschecks_count09:54:590
7450900,0irq/46-4a100000442-21snmpd07:10:210
7450900,0irq/46-4a10000032572-21seq07:56:350
7450900,0irq/46-4a10000029751-21aten_r4power_po10:59:450
7450900,0irq/46-4a10000029052-21/usr/sbin/munin12:30:330
7450900,0irq/46-4a10000027140-21runrttasks12:25:250
7450900,0irq/46-4a1000002668-21chrt09:40:010
7450900,0irq/46-4a10000026558-21df_inode09:14:560
7450900,0irq/46-4a10000025264-21ntpq10:45:220
7450900,0irq/46-4a10000018462-21/usr/sbin/munin10:25:240
7450900,0irq/46-4a10000018077-21/usr/sbin/munin12:00:050
7450900,0irq/46-4a10000016469-21fw_conntrack08:45:040
7450900,0irq/46-4a10000014749-21chrt10:15:050
7450900,0irq/46-4a10000012802-21runrttasks10:09:520
7450900,0irq/46-4a10000012455-21sh08:34:340
7450900,0irq/46-4a1000001097-21fw_conntrack11:10:080
7450890,0irq/46-4a1000008890-1kworker/u3:211:35:080
7450890,0irq/46-4a1000006421-21grep11:25:210
7450890,0irq/46-4a1000003239-21sensors08:05:290
7450890,0irq/46-4a10000030264-21meminfo07:50:140
7450890,0irq/46-4a10000022782-21grep07:29:380
7450890,0irq/46-4a10000021614-21fw_packets12:10:090
7450890,0irq/46-4a10000021550-21tune2fs09:00:040
7450890,0irq/46-4a10000020143-21ntpq07:20:290
7450890,0irq/46-4a10000017638-21latency_hist10:24:360
7450890,0irq/46-4a10000016439-21perl11:55:010
7450890,0irq/46-4a10000014855-21kernelversion08:40:170
7450890,0irq/46-4a10000011417-21irqstats10:05:110
15292998956,0cyclictest0-21swapper11:45:170
7450880,0irq/46-4a1000006139-21grep09:50:010
7450880,0irq/46-4a1000005718-21wc08:14:380
7450880,0irq/46-4a1000004506-21/usr/sbin/munin08:10:080
7450880,0irq/46-4a10000023160-21runrttasks09:04:570
7450880,0irq/46-4a10000021876-21/usr/sbin/munin10:35:240
7450870,0irq/46-4a100000442-21snmpd11:07:020
7450870,0irq/46-4a10000031006-21chrt09:27:290
7450870,0irq/46-4a10000028296-21diskstats09:19:590
7450870,0irq/46-4a10000019630-21expr10:29:520
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional