You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-29 - 08:21
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot2.osadl.org (updated Thu Jan 29, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
74501960,0irq/46-4a10000029475-21runrttasks19:05:080
2511829014,0sleep025119-21memory20:29:090
7450850,0irq/46-4a100000460-21snmpd23:13:430
7450850,0irq/46-4a10000011195-21sort22:58:510
7350850,0irq/45-4a10000010724-21munin-run19:48:270
209192850,0chrt19025-1kworker/u3:121:53:130
77422845,0sleep07745-21diskstats19:38:480
7450830,0irq/46-4a100000460-21snmpd23:39:050
7450830,0irq/46-4a1000004023-21/usr/sbin/munin21:03:470
7450830,0irq/46-4a10000023665-21sendmail_mailtr20:24:200
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional