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2026-04-22 - 13:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot2.osadl.org (updated Wed Apr 22, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
745013020,0irq/46-4a10000015332-1kworker/u3:219:03:210
156282880,0sleep06368-1kworker/u3:123:41:370
7450870,0irq/46-4a10000029082-21sensors_temp00:21:110
7450860,0irq/46-4a1000003588-21uptime19:56:150
7450860,0irq/46-4a10000030466-21meminfo19:40:540
7450860,0irq/46-4a10000025494-21open_inodes00:11:080
93132850,0sleep08213-1kworker/u3:223:25:180
7450850,0irq/46-4a100000511-21chrt00:33:460
7450850,0irq/46-4a1000003344-21grep21:31:120
7450850,0irq/46-4a10000030324-21fw_conntrack22:50:490
7450850,0irq/46-4a10000029195-21sed19:36:140
7450850,0irq/46-4a10000028464-21runrttasks21:10:400
7450850,0irq/46-4a10000024108-21users22:31:190
220192850,0chrt21152-1kworker/u3:219:16:030
7450840,0irq/46-4a1000007655-21aten_r4power_cu20:10:260
7450840,0irq/46-4a1000005982-21cut21:40:260
7450840,0irq/46-4a1000005762-1kworker/u3:020:10:080
7450840,0irq/46-4a10000032173-21memory19:45:590
7450840,0irq/46-4a10000031818-21df_abs22:55:340
7450840,0irq/46-4a10000030987-21chrt00:26:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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