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2026-06-27 - 19:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot2.osadl.org (updated Sat Jun 27, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
74502630,0irq/46-4a10000012-21ksoftirqd/007:07:350
304659913438,0cyclictest11267-21/usr/sbin/munin12:30:250
304659913244,0cyclictest4501-21/usr/sbin/munin09:00:280
304659913153,0cyclictest7350irq/45-4a10000010:20:250
304659913035,0cyclictest29434-21/usr/sbin/munin10:14:440
304659912936,0cyclictest9102-21/usr/sbin/munin10:49:490
304659912841,0cyclictest0-21swapper12:00:360
304659912841,0cyclictest0-21swapper10:37:560
304659912839,0cyclictest21672-21/usr/sbin/munin11:25:320
304659912838,0cyclictest0-21swapper09:21:490
304659912837,0cyclictest19517-21/usr/sbin/munin09:44:590
304659912741,0cyclictest0-21swapper12:20:480
304659912740,0cyclictest0-21swapper08:34:380
304659912739,0cyclictest0-21swapper07:25:370
304659912639,0cyclictest0-21swapper07:54:440
304659912635,0cyclictest0-21swapper11:53:180
304659912621,0cyclictest26615-21memory11:40:380
304659912541,0cyclictest0-21swapper09:14:540
304659912541,0cyclictest0-21swapper08:24:470
304659912540,0cyclictest0-21swapper08:29:490
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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