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2026-05-22 - 00:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot2.osadl.org (updated Thu May 21, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
745010710,0irq/46-4a1000006995-1kworker/u3:107:03:270
176339910269,0cyclictest0-21swapper11:29:400
176339910169,0cyclictest0-21swapper12:14:550
176339910065,0cyclictest0-21swapper08:34:430
17633999982,0cyclictest18265-21irqstats07:04:420
17633999980,0cyclictest3489-21irqstats11:04:410
17633999680,0cyclictest15364-21fw_conntrack10:04:350
17633999578,0cyclictest30816-21/usr/sbin/munin07:39:410
17633999576,0cyclictest2848-21munin-run09:29:070
17633999576,0cyclictest20530-21fw_conntrack07:09:560
17633999477,0cyclictest32101-21aten_r4power_po12:29:160
17633999477,0cyclictest27407-21irqstats09:04:430
17633999476,0cyclictest4886-21df07:59:220
17633999475,0cyclictest25489-21df_inode10:34:230
17633999474,0cyclictest20668-21meminfo10:19:460
17633999376,0cyclictest26340-21runrttasks07:25:480
17633999374,0cyclictest31530-21seq09:16:080
17633999374,0cyclictest29685-21users12:20:030
17633999274,0cyclictest18805-21chrt08:39:380
17633999174,0cyclictest7002-21memory09:39:510
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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