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2026-05-10 - 19:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot2.osadl.org (updated Sun May 10, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
74502810,0irq/46-4a10000012-21ksoftirqd/007:02:390
7350940,0irq/45-4a10000011815-1kworker/u3:008:35:270
31872940,0sleep01883-1kworker/u3:209:40:430
13324999358,0cyclictest0-21swapper07:24:450
13324999357,0cyclictest0-21swapper07:50:300
134232920,0sleep011901-1kworker/u3:211:45:370
13324999260,0cyclictest0-21swapper08:40:230
13324999258,0cyclictest0-21swapper12:09:590
7350910,0irq/45-4a1000008400-1kworker/u3:008:26:190
7350910,0irq/45-4a10000031482-1kworker/u3:107:59:100
13324999158,0cyclictest0-21swapper11:55:250
291542900,0chrt27437-1kworker/u3:010:58:300
13324999057,0cyclictest0-21swapper07:20:090
13324998958,0cyclictest0-21swapper09:35:120
13324998957,0cyclictest0-21swapper07:35:050
7450880,0irq/46-4a1000009650-21seq11:35:210
7450880,0irq/46-4a10000029739-21/usr/sbin/munin10:59:560
7350880,0irq/45-4a10000014804-1kworker/u3:007:09:570
7350880,0irq/45-4a10000013889-21cron10:14:310
7350880,0irq/45-4a10000011493-1kworker/u3:010:06:380
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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