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2026-09-21 - 17:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot2.osadl.org (updated Mon Sep 21, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1490529640,0chrt14774-1kworker/u3:207:06:440
3242829611,0sleep032457-21users09:30:360
7450950,0irq/46-4a1000009787-21sshd08:25:150
7450940,0irq/46-4a1000005026-21threads11:20:360
15292999468,0cyclictest0-21swapper11:30:240
7450930,0irq/46-4a10000028577-21memory07:45:180
7450930,0irq/46-4a1000002789-21tune2fs11:15:020
7450930,0irq/46-4a10000014176-21basename08:39:350
7350930,0irq/45-4a1000004365-21/usr/sbin/munin09:44:560
7450920,0irq/46-4a10000028505-21runrttasks10:55:120
7450920,0irq/46-4a10000024533-21/usr/sbin/munin07:35:070
7450920,0irq/46-4a10000023068-21df12:14:510
7450920,0irq/46-4a10000014732-21sshd11:50:030
15292999258,0cyclictest0-21swapper09:35:230
15292999258,0cyclictest0-21swapper07:40:250
7450910,0irq/46-4a100000627-21chrt07:59:430
7450910,0irq/46-4a10000030309-21memory12:35:200
7450910,0irq/46-4a10000027277-21unixbench_singl10:50:330
7450910,0irq/46-4a10000025355-21/usr/sbin/munin09:10:270
7450910,0irq/46-4a10000021647-21if_eth007:25:090
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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