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2026-03-21 - 14:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot2.osadl.org (updated Sat Mar 21, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
74502600,0irq/46-4a10000016967-1kworker/u3:007:04:150
173749913749,0cyclictest0-21swapper11:22:180
173749912960,0cyclictest0-21swapper07:22:030
173749912949,0cyclictest0-21swapper07:06:470
173749912545,0cyclictest0-21swapper11:07:250
173749912545,0cyclictest0-21swapper07:52:050
173749912042,0cyclictest0-21swapper10:46:380
17374999462,0cyclictest0-21swapper10:02:200
17374999259,0cyclictest0-21swapper11:37:130
17374999259,0cyclictest0-21swapper10:42:230
17374999156,0cyclictest0-21swapper10:52:290
17374999156,0cyclictest0-21swapper07:42:010
17374999059,0cyclictest0-21swapper08:27:240
17374999056,0cyclictest0-21swapper11:12:020
17374999056,0cyclictest0-21swapper08:41:540
17374998967,0cyclictest0-21swapper09:46:550
17374998959,0cyclictest0-21swapper08:32:250
17374998958,0cyclictest0-21swapper07:12:110
17374998858,0cyclictest0-21swapper09:02:150
17374998853,0cyclictest0-21swapper11:47:090
17374998758,0cyclictest0-21swapper08:52:130
17374998755,0cyclictest0-21swapper12:02:260
17374998755,0cyclictest0-21swapper11:16:440
17374998755,0cyclictest0-21swapper08:21:430
17374998656,0cyclictest0-21swapper10:37:130
17374998655,0cyclictest0-21swapper08:02:190
17374998654,0cyclictest0-21swapper08:17:160
17374998653,0cyclictest0-21swapper11:52:220
17374998563,0cyclictest0-21swapper10:16:440
17374998553,0cyclictest0-21swapper09:52:150
17374998452,0cyclictest0-21swapper12:06:530
17374998451,0cyclictest0-21swapper07:37:250
17374998363,0cyclictest0-21swapper07:27:160
17374998355,0cyclictest0-21swapper08:47:190
17374998352,0cyclictest0-21swapper12:12:050
17374998352,0cyclictest0-21swapper07:57:300
17374998351,0cyclictest0-21swapper12:27:230
7350820,0irq/45-4a10000011921-21ntpq09:57:150
17374998260,0cyclictest0-21swapper09:32:200
17374998252,0cyclictest0-21swapper11:02:190
17374998251,0cyclictest0-21swapper12:26:280
17374998250,0cyclictest0-21swapper10:21:560
17374998249,0cyclictest0-21swapper09:22:020
7350810,0irq/45-4a1000006168-21aten_r4power_cu09:41:390
17374998151,0cyclictest0-21swapper10:32:150
17374998147,0cyclictest0-21swapper09:27:230
7350800,0irq/45-4a1000008866-21unixbench_singl08:12:240
17374998048,0cyclictest0-21swapper08:07:080
17374998045,0cyclictest0-21swapper11:26:530
17374997949,0cyclictest0-21swapper07:32:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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