You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-30 - 03:56
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 792 highest latencies:
System rack4slot2.osadl.org (updated Thu Apr 30, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
73502160,0irq/45-4a10000028564-21kworker/0:019:00:320
7738998357,0cyclictest0-21swapper19:20:070
7738997962,0cyclictest27183-21runrttasks23:47:140
7738997557,0cyclictest19156-21fw_conntrack19:35:270
7738997552,0cyclictest0-21swapper00:05:050
7738997454,0cyclictest5658-21runrttasks22:16:040
7738997355,0cyclictest1844-21fw_forwarded_lo22:01:380
7738997351,0cyclictest4294-21runrttasks00:27:320
7738997351,0cyclictest24905-21awk21:25:590
7738997346,0cyclictest5282-21sshd22:15:000
7738997341,0cyclictest0-21swapper23:58:010
7738997340,0cyclictest5765-21/usr/sbin/munin20:30:500
7738997254,0cyclictest21973-21modprobe21:19:560
7738997253,0cyclictest31629-21runrttasks21:50:210
7738997253,0cyclictest17669-21seq23:07:130
7738997249,0cyclictest0-21swapper22:45:050
7738997245,0cyclictest0-21swapper23:25:090
7738997239,0cyclictest13902-21/usr/sbin/munin22:51:460
7738997154,0cyclictest29822-21sensors_temp20:05:520
7738997153,0cyclictest1300-21awk00:14:570
7738997151,0cyclictest21893-21runrttasks19:44:210
7738997149,0cyclictest13798-21df_abs20:55:150
7738997148,0cyclictest24247-21grep23:34:570
7738997148,0cyclictest17584-21meminfo19:30:370
7738997144,0cyclictest24415-21memory19:50:390
7738997059,0cyclictest7350irq/45-4a10000022:34:580
7738997059,0cyclictest7350irq/45-4a10000019:10:430
7738997054,0cyclictest7043-21df_inode20:35:180
7738997053,0cyclictest27273-21aten_r4power_cu20:00:070
7738997052,0cyclictest11873-21/usr/sbin/munin19:15:430
7738997049,0cyclictest19412-21runrttasks23:14:380
7738997049,0cyclictest13032-21runrttasks20:51:440
7738997048,0cyclictest12038-21runrttasks22:42:330
7738997039,0cyclictest18782-21/usr/sbin/munin21:10:080
7738996954,0cyclictest7350irq/45-4a10000021:20:280
7738996952,0cyclictest15983-21seq19:25:460
7738996951,0cyclictest30977-21fschecks_count20:10:200
7738996949,0cyclictest8506-21ntp_kernel_pll_19:05:410
7738996947,0cyclictest27857-21memory21:35:390
7738996946,0cyclictest30426-21runrttasks21:44:120
7738996945,0cyclictest16479-21chrt21:01:540
7738996847,0cyclictest949-21runrttasks21:56:310
7738996846,0cyclictest32690-21entropy20:15:220
7738996846,0cyclictest18324-21runrttasks21:08:100
7738996846,0cyclictest10506-21tune2fs20:45:230
7738996839,0cyclictest28018-21/usr/sbin/munin23:51:360
7738996836,0cyclictest0-21swapper19:45:070
7738996749,0cyclictest26548-21unixbench_singl19:55:540
7738996749,0cyclictest2532-21seq00:21:220
7738996745,0cyclictest6893-21proc_pri22:21:540
7738996745,0cyclictest20860-21fw_conntrack23:21:340
7738996745,0cyclictest10573-21chrt22:37:180
7738996743,0cyclictest25747-21sed21:30:140
7738996650,0cyclictest15953-1kworker/u3:223:02:380
7738996645,0cyclictest15546-21runrttasks22:59:050
7738996635,0cyclictest4899-21ls20:29:570
7738996635,0cyclictest30644-21/usr/sbin/munin00:01:510
7738996548,0cyclictest7601-1kworker/u3:020:40:380
7738996547,0cyclictest2122-1kworker/u3:100:32:360
7738996545,0cyclictest31385-21runrttasks21:49:230
258172655,0sleep025837-21modprobe23:41:490
7738996431,0cyclictest1838-21/usr/sbin/munin20:20:150
7738996350,0cyclictest7710-21aten_r4power_cu22:25:070
7738996345,0cyclictest3290-21seq22:06:190
7738996342,0cyclictest24412-21aten_r4power_en23:35:070
7738996339,0cyclictest20288-21sshd23:18:580
7738996244,0cyclictest2258-21idleruntime-cro00:19:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional