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2026-03-05 - 18:47
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of all highest latencies:
System rack4slot2.osadl.org (updated Thu Mar 05, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
73502690,0irq/45-4a10000017932sleep007:03:580
22099912652,0cyclictest7350irq/45-4a10000007:27:450
22099912541,0cyclictest4086-21fschecks_time10:22:320
22099912541,0cyclictest25861-21munin-node08:17:130
22099912539,0cyclictest22433-21/usr/sbin/munin08:07:140
22099912537,0cyclictest11104-21/usr/sbin/munin12:17:450
22099912440,0cyclictest0-21swapper12:29:190
22099912342,0cyclictest0-21swapper09:51:220
22099912341,0cyclictest0-21swapper12:11:020
22099912340,0cyclictest0-21swapper08:51:320
22099912339,0cyclictest0-21swapper12:12:380
22099912339,0cyclictest0-21swapper11:14:170
22099912337,0cyclictest28165-21meminfo11:32:450
22099912242,0cyclictest0-21swapper09:52:580
22099912242,0cyclictest0-21swapper07:22:500
22099912235,0cyclictest0-21swapper10:51:400
22099912142,0cyclictest13541-21runrttasks09:15:250
22099912142,0cyclictest0-21swapper10:52:420
22099912142,0cyclictest0-21swapper08:37:570
22099912141,0cyclictest0-21swapper11:22:560
22099912141,0cyclictest0-21swapper10:04:210
22099912140,0cyclictest0-21swapper10:42:180
22099912140,0cyclictest0-21swapper07:07:420
22099912139,0cyclictest0-21swapper12:04:120
22099912138,0cyclictest0-21swapper09:40:490
22099912136,0cyclictest27876-21/usr/sbin/munin08:22:270
22099912046,0cyclictest12-21ksoftirqd/007:57:270
22099912039,0cyclictest0-21swapper11:27:520
22099912036,0cyclictest14286-21fschecks_time09:17:310
22099912035,0cyclictest0-21swapper10:32:430
22099912028,0cyclictest32689-21aten_r4power_cu11:47:130
22099911955,0cyclictest0-21swapper09:46:310
22099911949,0cyclictest0-21swapper09:57:150
22099911940,0cyclictest0-21swapper08:42:430
22099911939,0cyclictest0-21swapper12:25:000
22099911939,0cyclictest0-21swapper11:52:180
22099911939,0cyclictest0-21swapper08:31:450
22099911938,0cyclictest0-21swapper11:42:220
22099911935,0cyclictest0-21swapper08:05:520
22099911926,0cyclictest24661-21irqstats08:12:420
22099911854,0cyclictest0-21swapper10:17:350
22099911849,0cyclictest0-21swapper11:57:200
22099911847,0cyclictest0-21swapper09:08:400
22099911843,0cyclictest7350irq/45-4a10000009:27:400
22099911840,0cyclictest0-21swapper07:33:050
22099911839,0cyclictest0-21swapper10:12:250
22099911839,0cyclictest0-21swapper09:32:240
22099911838,0cyclictest0-21swapper07:47:260
22099911739,0cyclictest0-21swapper10:37:200
22099911737,0cyclictest0-21swapper11:37:170
22099911735,0cyclictest0-21swapper07:55:330
22099911729,0cyclictest6471-21runrttasks08:53:240
22099911638,0cyclictest0-21swapper07:17:340
22099911635,0cyclictest12204-21seq07:37:170
22099911537,0cyclictest0-21swapper10:07:550
22099911536,0cyclictest0-21swapper08:58:010
22099911536,0cyclictest0-21swapper07:42:230
22099911535,0cyclictest0-21swapper11:17:150
22099911511,0cyclictest9470-21ntpq09:02:520
22099911437,0cyclictest0-21swapper08:35:130
22099911430,0cyclictest5959-21/usr/sbin/munin10:27:480
22099911337,0cyclictest0-21swapper07:16:280
22099911336,0cyclictest0-21swapper10:57:510
22099911231,0cyclictest0-21swapper12:33:050
22099911125,0cyclictest20400-21runrttasks11:10:370
22099911034,0cyclictest0-21swapper09:23:330
22099911032,0cyclictest17568-21df_abs11:02:230
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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