You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-04 - 21:11
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot3.osadl.org (updated Wed Feb 04, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2993124130,5sleep029929-21munin-node07:08:240
2922211114,37sleep02927-21munin-node09:03:370
28415210115,16sleep028418-21memory12:03:490
736029814,16sleep07363-21iostat_ios12:38:410
493729814,16sleep04962-21proc_pri09:08:580
1752029814,16sleep017521-21irqstats08:08:420
218829714,21sleep02189-21entropy12:23:320
1273329714,16sleep012737-21hddtemp_smartct09:33:370
3143129614,15sleep031483-21cut12:13:350
3008329617,18sleep029520-21munin-node12:08:490
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional