You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-17 - 20:16
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot3.osadl.org (updated Tue Feb 17, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
301159913516,108cyclictest10156-21munin-node09:26:560
301159913314,109cyclictest27589-21munin-node08:41:430
301159913014,107cyclictest3568-21runrttasks11:52:130
301159913014,105cyclictest9726-21munin-node11:06:230
301159912915,104cyclictest10686-21ls07:51:070
301159912914,105cyclictest32078-21perl07:16:290
301159912914,105cyclictest16828-21chrt08:08:080
301159912814,103cyclictest20832-21munin-run11:41:080
301159912615,101cyclictest6583-21munin-node10:56:310
301159912614,102cyclictest25962-21seq08:36:440
301159912614,101cyclictest27657-21diskstats12:01:240
301159912514,101cyclictest6113-21munin-node09:17:060
301159912414,100cyclictest14132-21idleruntime-cro09:41:080
301159912315,98cyclictest4869-21munin-node12:31:190
301159912315,98cyclictest3568-21runrttasks11:42:050
301159912315,98cyclictest3568-21runrttasks09:41:210
301159912315,98cyclictest20033-21seq08:17:450
301159912314,99cyclictest380-21processes10:36:530
301159912314,99cyclictest3008-21aten_r4power_cu10:46:180
301159912215,98cyclictest26229-21seq11:56:340
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional