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2026-01-20 - 08:27
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot3.osadl.org (updated Tue Jan 20, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
104409914515,68cyclictest20027-21sshd19:41:370
9306212016,23sleep09316-21memory19:07:370
10982210613,80sleep010999-21missed_timers19:12:470
104409910415,79cyclictest25631-21df_abs23:17:250
4907210014,15sleep04921-21munin-node20:32:590
1589929913,15sleep015933-21munin-node21:07:380
1455229913,15sleep014589-21perl00:22:340
525429719,15sleep05274-21munin-node23:52:590
10440999515,71cyclictest3695-21runrttasks00:05:110
10440999515,71cyclictest13530-21chrt00:18:070
2028529414,15sleep020333-21sed21:22:120
10440999415,69cyclictest17746-21nfs_client21:12:480
10440999414,71cyclictest3695-21runrttasks19:27:240
2527129314,15sleep025286-21sh19:57:250
2239729314,15sleep022400-21df_inode23:07:290
10440999315,68cyclictest14531-21ntpq21:02:530
10440999314,70cyclictest6312-21df_abs23:57:290
10440999314,69cyclictest19643-21munin-node22:57:560
10440999314,69cyclictest12167-21munin-node19:17:230
913529214,15sleep09163-21df20:47:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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