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2026-05-07 - 04:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu May 07, 2026 00:44:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71660rcu_preempt0-21swapper/219:23:102
71660rcu_preempt0-21swapper/219:23:102
71500rcu_preempt0-21swapper/022:28:010
71500rcu_preempt0-21swapper/022:28:010
71500rcu_preempt0-21swapper/022:28:010
71450rcu_preempt10697-21sh22:17:300
71450rcu_preempt10697-21sh22:17:300
71450rcu_preempt10697-21sh22:17:300
71450rcu_preempt0-21swapper/022:27:270
71450rcu_preempt0-21swapper/022:27:270
71450rcu_preempt0-21swapper/022:27:270
46050450irq/122-QManpo0-210
46050450irq/122-QManpo0-210
71430rcu_preempt14315-21sendmail-msp00:24:130
71430rcu_preempt14315-21sendmail-msp00:24:130
71430rcu_preempt14315-21sendmail-msp00:24:130
46050430irq/122-QManpo0-210
46050430irq/122-QManpo0-210
46050430irq/122-QManpo0-210
71420rcu_preempt8914-21swap21:13:100
71420rcu_preempt8914-21swap21:13:100
71420rcu_preempt6945-21sh23:08:260
71420rcu_preempt6945-21sh23:08:260
71420rcu_preempt6945-21sh23:08:260
71420rcu_preempt0-21swapper/300:27:513
71420rcu_preempt0-21swapper/300:27:513
71420rcu_preempt0-21swapper/023:07:290
71420rcu_preempt0-21swapper/023:07:290
71420rcu_preempt0-21swapper/023:07:290
100650420irq/38-i2c-mpc181ksoftirqd/100:28:571
100650420irq/38-i2c-mpc181ksoftirqd/100:28:571
71410rcu_preempt7131-21cyclictest19:23:100
71410rcu_preempt7131-21cyclictest19:23:100
71410rcu_preempt25981-21sh21:43:370
71410rcu_preempt25981-21sh21:43:370
71410rcu_preempt25981-21sh21:43:370
71410rcu_preempt0-21swapper/023:39:080
71410rcu_preempt0-21swapper/023:39:080
71410rcu_preempt0-21swapper/023:39:080
71410rcu_preempt0-21swapper/000:28:510
71410rcu_preempt0-21swapper/000:28:510
71400rcu_preempt0-21swapper/121:21:151
71400rcu_preempt0-21swapper/121:21:151
71400rcu_preempt0-21swapper/121:21:151
71400rcu_preempt0-21swapper/021:48:030
71400rcu_preempt0-21swapper/021:48:030
71400rcu_preempt0-21swapper/021:48:030
46050400irq/122-QManpo22366-2110:48:550
46050400irq/122-QManpo22366-2110:48:550
46050400irq/122-QManpo1132-2110:48:550
46050400irq/122-QManpo1132-2110:48:550
71390rcu_preempt0-21swapper/200:40:322
71390rcu_preempt0-21swapper/200:40:322
71390rcu_preempt0-21swapper/023:46:560
71390rcu_preempt0-21swapper/023:46:560
71390rcu_preempt0-21swapper/023:46:560
71390rcu_preempt0-21swapper/021:58:530
71390rcu_preempt0-21swapper/021:58:530
71390rcu_preempt0-21swapper/021:58:530
71390rcu_preempt0-21swapper/020:43:040
71390rcu_preempt0-21swapper/020:43:040
71390rcu_preempt0-21swapper/020:43:040
71390rcu_preempt0-21swapper/020:24:370
71390rcu_preempt0-21swapper/020:24:370
71390rcu_preempt0-21swapper/019:47:280
71390rcu_preempt0-21swapper/019:47:280
71390rcu_preempt0-21swapper/019:47:280
71390rcu_preempt0-21swapper/000:10:410
71390rcu_preempt0-21swapper/000:10:410
71390rcu_preempt0-21swapper/000:10:410
46050390irq/122-QManpo6716-2110:48:550
46050390irq/122-QManpo6716-2110:48:550
46050390irq/122-QManpo6716-2110:48:550
71380rcu_preempt30906-21/usr/sbin/munin23:53:071
71380rcu_preempt30906-21/usr/sbin/munin23:53:071
71380rcu_preempt28757-21sh21:48:591
71380rcu_preempt28757-21sh21:48:591
71380rcu_preempt28757-21sh21:48:591
71380rcu_preempt22449-1sed23:37:573
71380rcu_preempt22449-1sed23:37:573
71380rcu_preempt22449-1sed23:37:573
71380rcu_preempt16533-21sh23:27:230
71380rcu_preempt16533-21sh23:27:230
71380rcu_preempt16533-21sh23:27:230
71380rcu_preempt13869-21copy21:22:551
71380rcu_preempt13869-21copy21:22:551
71380rcu_preempt13869-21copy21:22:551
71380rcu_preempt0-21swapper/100:07:231
71380rcu_preempt0-21swapper/100:07:231
71380rcu_preempt0-21swapper/100:07:231
71380rcu_preempt0-21swapper/022:05:150
71380rcu_preempt0-21swapper/022:05:150
71380rcu_preempt0-21swapper/022:05:150
71380rcu_preempt0-21swapper/021:55:480
71380rcu_preempt0-21swapper/021:55:480
71380rcu_preempt0-21swapper/021:55:480
71380rcu_preempt0-21swapper/021:32:030
71380rcu_preempt0-21swapper/021:32:030
71380rcu_preempt0-21swapper/021:32:030
71380rcu_preempt0-21swapper/021:23:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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