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2026-04-02 - 00:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Wed Apr 01, 2026 12:44:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71850rcu_preempt0-21swapper/110:17:081
71850rcu_preempt0-21swapper/110:17:081
71820rcu_preempt18058-21ssh11:42:353
71820rcu_preempt18058-21ssh11:42:353
71460rcu_preempt2304-21ssh11:14:432
71460rcu_preempt2304-21ssh11:14:432
71460rcu_preempt2304-21ssh11:14:432
46050440irq/122-QManpo0-210
46050440irq/122-QManpo0-210
71430rcu_preempt0-21swapper/210:43:012
71430rcu_preempt0-21swapper/210:43:012
71430rcu_preempt0-21swapper/210:43:012
46650430irq/116-QManpo29743-2110:48:553
46650430irq/116-QManpo29743-2110:48:553
99750420irq/38-i2c-mpc0-21swapper/011:58:390
99750420irq/38-i2c-mpc0-21swapper/011:58:390
46450420irq/118-QManpo29748-2110:48:552
46450420irq/118-QManpo29748-2110:48:552
46050420irq/122-QManpo0-210
46050420irq/122-QManpo0-210
71410rcu_preempt0-21swapper/308:57:163
71410rcu_preempt0-21swapper/308:57:163
71410rcu_preempt0-21swapper/211:52:412
71410rcu_preempt0-21swapper/211:52:412
71410rcu_preempt0-21swapper/211:52:412
71410rcu_preempt0-21swapper/107:08:471
71410rcu_preempt0-21swapper/107:08:471
71410rcu_preempt0-21swapper/010:24:090
71410rcu_preempt0-21swapper/010:24:090
71410rcu_preempt0-21swapper/010:24:090
71410rcu_preempt0-21swapper/008:57:130
71410rcu_preempt0-21swapper/008:57:130
71400rcu_preempt24663-21seq09:58:102
71400rcu_preempt24663-21seq09:58:102
71400rcu_preempt24663-21seq09:58:102
71400rcu_preempt17323-21copy11:42:142
71400rcu_preempt17323-21copy11:42:142
71400rcu_preempt12854-21ssh12:32:162
71400rcu_preempt12854-21ssh12:32:162
71400rcu_preempt0-21swapper/312:37:383
71400rcu_preempt0-21swapper/312:37:383
71400rcu_preempt0-21swapper/312:37:383
71400rcu_preempt0-21swapper/312:09:093
71400rcu_preempt0-21swapper/312:09:093
71400rcu_preempt0-21swapper/312:09:093
71400rcu_preempt0-21swapper/209:27:232
71400rcu_preempt0-21swapper/209:27:232
71400rcu_preempt0-21swapper/010:13:080
71400rcu_preempt0-21swapper/010:13:080
46250400irq/120-QManpo17323-2110:48:551
46250400irq/120-QManpo17323-2110:48:551
46050400irq/122-QManpo23891-2110:48:550
46050400irq/122-QManpo23891-2110:48:550
46050400irq/122-QManpo0-210
46050400irq/122-QManpo0-210
71390rcu_preempt21469-21ssh11:48:452
71390rcu_preempt21469-21ssh11:48:452
71390rcu_preempt0-21swapper/311:32:323
71390rcu_preempt0-21swapper/311:32:323
71390rcu_preempt0-21swapper/309:12:253
71390rcu_preempt0-21swapper/309:12:253
71390rcu_preempt0-21swapper/308:23:313
71390rcu_preempt0-21swapper/308:23:313
71390rcu_preempt0-21swapper/308:23:313
71390rcu_preempt0-21swapper/308:06:203
71390rcu_preempt0-21swapper/308:06:203
71390rcu_preempt0-21swapper/211:08:172
71390rcu_preempt0-21swapper/211:08:172
71390rcu_preempt0-21swapper/211:05:032
71390rcu_preempt0-21swapper/211:05:032
71390rcu_preempt0-21swapper/211:05:032
71390rcu_preempt0-21swapper/210:08:102
71390rcu_preempt0-21swapper/210:08:102
71390rcu_preempt0-21swapper/208:45:212
71390rcu_preempt0-21swapper/208:45:212
46050390irq/122-QManpo0-210
46050390irq/122-QManpo0-210
46050390irq/122-QManpo0-210
71380rcu_preempt9893-21copy07:57:132
71380rcu_preempt9893-21copy07:57:132
71380rcu_preempt19070-1kworker/2:3H10:04:072
71380rcu_preempt19070-1kworker/2:3H10:04:072
71380rcu_preempt0-21swapper/311:26:383
71380rcu_preempt0-21swapper/311:26:383
71380rcu_preempt0-21swapper/311:26:383
71380rcu_preempt0-21swapper/212:14:482
71380rcu_preempt0-21swapper/212:14:482
71380rcu_preempt0-21swapper/211:24:292
71380rcu_preempt0-21swapper/211:24:292
71380rcu_preempt0-21swapper/211:24:292
71380rcu_preempt0-21swapper/210:58:182
71380rcu_preempt0-21swapper/210:58:182
71380rcu_preempt0-21swapper/209:46:112
71380rcu_preempt0-21swapper/209:46:112
71380rcu_preempt0-21swapper/209:46:112
71380rcu_preempt0-21swapper/011:44:060
71380rcu_preempt0-21swapper/011:44:060
71380rcu_preempt0-21swapper/009:47:050
71380rcu_preempt0-21swapper/009:47:050
71380rcu_preempt0-21swapper/009:47:050
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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