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2026-07-11 - 16:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sat Jul 11, 2026 12:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71460rcu_preempt0-21swapper/007:19:000
71460rcu_preempt0-21swapper/007:19:000
46050460irq/122-QManpo14875-2110:48:550
46050460irq/122-QManpo14875-2110:48:550
46050460irq/122-QManpo14875-2110:48:550
71450rcu_preempt0-21swapper/011:58:590
71430rcu_preempt0-21swapper/110:14:061
71430rcu_preempt0-21swapper/110:14:061
71430rcu_preempt0-21swapper/110:14:061
71410rcu_preempt0-21swapper/110:54:171
71410rcu_preempt0-21swapper/110:54:171
71410rcu_preempt0-21swapper/110:54:171
71410rcu_preempt0-21swapper/110:54:171
71410rcu_preempt0-21swapper/012:11:000
71410rcu_preempt0-21swapper/012:11:000
71410rcu_preempt0-21swapper/012:11:000
71410rcu_preempt0-21swapper/009:33:310
71410rcu_preempt0-21swapper/009:33:310
71410rcu_preempt0-21swapper/009:33:310
71400rcu_preempt0-21swapper/310:24:133
71400rcu_preempt0-21swapper/310:24:133
71400rcu_preempt0-21swapper/310:24:133
71400rcu_preempt0-21swapper/012:02:270
71400rcu_preempt0-21swapper/012:02:270
71400rcu_preempt0-21swapper/012:02:270
71400rcu_preempt0-21swapper/011:56:030
71400rcu_preempt0-21swapper/011:56:030
71390rcu_preempt5186-1kworker/0:0H09:56:030
71390rcu_preempt5186-1kworker/0:0H09:56:030
71390rcu_preempt5186-1kworker/0:0H09:56:030
71390rcu_preempt12568-21sh11:14:161
71390rcu_preempt12568-21sh11:14:161
71390rcu_preempt12568-21sh11:14:161
71390rcu_preempt12568-21sh11:14:161
71390rcu_preempt0-21swapper/309:53:523
71390rcu_preempt0-21swapper/309:53:523
71390rcu_preempt0-21swapper/309:53:523
71390rcu_preempt0-21swapper/309:45:473
71390rcu_preempt0-21swapper/309:45:473
71390rcu_preempt0-21swapper/010:33:330
71390rcu_preempt0-21swapper/010:33:330
71390rcu_preempt0-21swapper/010:33:330
46050390irq/122-QManpo8717-2110:48:550
46050390irq/122-QManpo8717-2110:48:550
46050390irq/122-QManpo28567-2110:48:550
46050390irq/122-QManpo28567-2110:48:550
46050390irq/122-QManpo25781-2110:48:550
46050390irq/122-QManpo25781-2110:48:550
46050390irq/122-QManpo21040-10
46050390irq/122-QManpo21040-10
46050390irq/122-QManpo21040-10
46050390irq/122-QManpo21040-10
46050390irq/122-QManpo20229-2110:48:550
46050390irq/122-QManpo20229-2110:48:550
46050390irq/122-QManpo20229-2110:48:550
46050390irq/122-QManpo11647-2110:48:550
46050390irq/122-QManpo11647-2110:48:550
46050390irq/122-QManpo11647-2110:48:550
71380rcu_preempt0-21swapper/309:41:273
71380rcu_preempt0-21swapper/309:41:273
71380rcu_preempt0-21swapper/309:41:273
71380rcu_preempt0-21swapper/112:29:101
71380rcu_preempt0-21swapper/112:29:101
71380rcu_preempt0-21swapper/011:17:110
71380rcu_preempt0-21swapper/011:17:110
71380rcu_preempt0-21swapper/011:17:110
71380rcu_preempt0-21swapper/011:17:110
71380rcu_preempt0-21swapper/011:06:490
71380rcu_preempt0-21swapper/011:06:490
71380rcu_preempt0-21swapper/011:06:490
46250380irq/120-QManpo14486-2110:48:551
46250380irq/120-QManpo14486-2110:48:551
46250380irq/120-QManpo14486-2110:48:551
71370rcu_preempt28882-21latency_hist09:38:570
71370rcu_preempt28882-21latency_hist09:38:570
71370rcu_preempt18435-21sh11:25:501
71370rcu_preempt18435-21sh11:25:501
71370rcu_preempt18435-21sh11:25:501
71370rcu_preempt0-21swapper/311:53:513
71370rcu_preempt0-21swapper/311:53:513
71370rcu_preempt0-21swapper/311:53:513
71370rcu_preempt0-21swapper/112:07:291
71370rcu_preempt0-21swapper/112:07:291
71370rcu_preempt0-21swapper/112:07:291
71370rcu_preempt0-21swapper/110:10:011
71370rcu_preempt0-21swapper/110:10:011
71370rcu_preempt0-21swapper/110:10:011
71370rcu_preempt0-21swapper/108:14:321
71370rcu_preempt0-21swapper/108:14:321
71370rcu_preempt0-21swapper/011:14:060
71370rcu_preempt0-21swapper/009:25:430
71370rcu_preempt0-21swapper/009:25:430
71370rcu_preempt0-21swapper/008:40:150
71370rcu_preempt0-21swapper/008:40:150
71370rcu_preempt0-21swapper/008:40:150
71370rcu_preempt0-21swapper/007:24:260
71370rcu_preempt0-21swapper/007:24:260
71370rcu_preempt0-21swapper/007:24:260
46050370irq/122-QManpo20350-2110:48:550
46050370irq/122-QManpo20350-2110:48:550
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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