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2026-09-14 - 03:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Mon Sep 14, 2026 00:44:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71680rcu_preempt0-21swapper/100:39:101
71680rcu_preempt0-21swapper/100:39:101
71510rcu_preempt0-21swapper/321:10:253
71510rcu_preempt0-21swapper/321:10:253
71430rcu_preempt0-21swapper/222:30:082
71430rcu_preempt0-21swapper/222:30:082
71420rcu_preempt0-21swapper/223:28:462
71420rcu_preempt0-21swapper/223:28:462
71410rcu_preempt0-21swapper/321:55:013
71410rcu_preempt0-21swapper/321:55:013
71410rcu_preempt0-21swapper/120:25:331
71410rcu_preempt0-21swapper/120:25:331
100650410irq/38-i2c-mpc0-21swapper/021:53:330
100650410irq/38-i2c-mpc0-21swapper/021:53:330
71400rcu_preempt0-21swapper/323:05:493
71400rcu_preempt0-21swapper/323:05:493
71400rcu_preempt0-21swapper/322:03:103
71400rcu_preempt0-21swapper/322:03:103
71400rcu_preempt0-21swapper/222:05:452
71400rcu_preempt0-21swapper/222:05:452
71400rcu_preempt0-21swapper/221:55:062
46050400irq/122-QManpo29832-210
46050400irq/122-QManpo29832-210
46050400irq/122-QManpo26881-2110:48:550
46050400irq/122-QManpo26881-2110:48:550
46050400irq/122-QManpo19362-2110:48:550
46050400irq/122-QManpo19362-2110:48:550
1599400migration/04298-21/usr/sbin/munin23:20:110
1599400migration/04298-21/usr/sbin/munin23:20:110
1599400migration/04298-21/usr/sbin/munin23:20:110
71390rcu_preempt18097-21sh22:46:341
71390rcu_preempt18097-21sh22:46:341
71390rcu_preempt0-21swapper/319:30:103
71390rcu_preempt0-21swapper/319:30:103
71390rcu_preempt0-21swapper/223:46:312
71390rcu_preempt0-21swapper/223:46:312
71390rcu_preempt0-21swapper/221:21:182
71390rcu_preempt0-21swapper/221:21:182
71390rcu_preempt0-21swapper/200:18:362
71390rcu_preempt0-21swapper/200:18:362
71390rcu_preempt0-21swapper/200:18:362
46050390irq/122-QManpo7071-2110:48:550
46050390irq/122-QManpo7071-2110:48:550
46050390irq/122-QManpo26054-2110:48:550
46050390irq/122-QManpo26054-2110:48:550
176492390sleep016835-1kworker/0:1H23:43:290
176492390sleep016835-1kworker/0:1H23:43:290
176492390sleep016835-1kworker/0:1H23:43:290
1599390migration/024887-21taskset22:01:140
1599390migration/024887-21taskset22:01:140
99750380irq/38-i2c-mpc0-21swapper/123:43:581
99750380irq/38-i2c-mpc0-21swapper/123:43:581
99750380irq/38-i2c-mpc0-21swapper/123:43:581
71380rcu_preempt29624-21cyclictest21:26:013
71380rcu_preempt29624-21cyclictest21:26:013
71380rcu_preempt27979-1kworker/1:3H22:15:001
71380rcu_preempt27979-1kworker/1:3H22:15:001
71380rcu_preempt27426-21crond21:04:571
71380rcu_preempt27426-21crond21:04:571
71380rcu_preempt0-21swapper/323:24:283
71380rcu_preempt0-21swapper/323:24:283
71380rcu_preempt0-21swapper/323:24:283
71380rcu_preempt0-21swapper/300:19:323
71380rcu_preempt0-21swapper/300:19:323
71380rcu_preempt0-21swapper/300:19:323
71380rcu_preempt0-21swapper/223:23:022
71380rcu_preempt0-21swapper/223:23:022
71380rcu_preempt0-21swapper/223:23:022
71380rcu_preempt0-21swapper/222:53:432
71380rcu_preempt0-21swapper/222:53:432
71380rcu_preempt0-21swapper/222:15:012
71380rcu_preempt0-21swapper/222:15:012
71380rcu_preempt0-21swapper/200:29:282
71380rcu_preempt0-21swapper/200:29:282
71380rcu_preempt0-21swapper/122:52:531
71380rcu_preempt0-21swapper/122:52:531
71380rcu_preempt0-21swapper/121:42:211
71380rcu_preempt0-21swapper/121:42:211
46050380irq/122-QManpo32604-2110:48:550
46050380irq/122-QManpo32604-2110:48:550
46050380irq/122-QManpo20251-2110:48:550
46050380irq/122-QManpo20251-2110:48:550
46050380irq/122-QManpo17186-2110:48:550
46050380irq/122-QManpo17186-2110:48:550
46050380irq/122-QManpo17186-2110:48:550
308352380sleep246450irq/118-QMan10:48:552
308352380sleep246450irq/118-QMan10:48:552
71370rcu_preempt30255-1kworker/1:1H21:20:161
71370rcu_preempt30255-1kworker/1:1H21:20:161
71370rcu_preempt12000-1kworker/1:1H22:57:201
71370rcu_preempt12000-1kworker/1:1H22:57:201
71370rcu_preempt0-21swapper/320:45:263
71370rcu_preempt0-21swapper/222:20:102
71370rcu_preempt0-21swapper/222:20:102
71370rcu_preempt0-21swapper/222:01:272
71370rcu_preempt0-21swapper/222:01:272
71370rcu_preempt0-21swapper/219:45:192
71370rcu_preempt0-21swapper/219:45:192
71370rcu_preempt0-21swapper/200:35:252
71370rcu_preempt0-21swapper/200:35:252
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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