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2026-09-02 - 05:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Wed Sep 02, 2026 00:44:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71950rcu_preempt0-21swapper/123:59:561
71950rcu_preempt0-21swapper/123:59:561
71950rcu_preempt0-21swapper/123:59:561
71830rcu_preempt0-21swapper/300:07:093
71830rcu_preempt0-21swapper/300:07:093
71700rcu_preempt25211-21copy22:39:511
71700rcu_preempt25211-21copy22:39:511
71630rcu_preempt0-21swapper/123:27:421
71630rcu_preempt0-21swapper/123:27:421
71630rcu_preempt0-21swapper/123:27:421
253432600chrt46650irq/116-QMan10:48:553
253432600chrt46650irq/116-QMan10:48:553
253432600chrt46650irq/116-QMan10:48:553
46050480irq/122-QManpo8746-210
46050480irq/122-QManpo8746-210
71460rcu_preempt14226-1kworker/0:0H00:24:580
71460rcu_preempt14226-1kworker/0:0H00:24:580
71450rcu_preempt20006-21copy00:24:581
71450rcu_preempt20006-21copy00:24:581
46450450irq/118-QManpo8679-2110:48:552
46450450irq/118-QManpo8679-2110:48:552
71440rcu_preempt7016-1kworker/1:1H19:15:151
71440rcu_preempt7016-1kworker/1:1H19:15:151
71420rcu_preempt17914-21sh22:25:330
71420rcu_preempt17914-21sh22:25:330
71410rcu_preempt29350-21seq00:40:140
71410rcu_preempt29350-21seq00:40:140
71410rcu_preempt0-21swapper/123:00:041
71410rcu_preempt0-21swapper/123:00:041
71410rcu_preempt0-21swapper/122:00:121
71410rcu_preempt0-21swapper/122:00:121
71410rcu_preempt0-21swapper/122:00:121
71410rcu_preempt0-21swapper/022:13:190
71410rcu_preempt0-21swapper/022:13:190
71400rcu_preempt0-21swapper/021:48:540
71400rcu_preempt0-21swapper/021:48:540
71400rcu_preempt0-21swapper/000:33:480
71400rcu_preempt0-21swapper/000:33:480
71380rcu_preempt9287-21diskmemload21:36:160
71380rcu_preempt9287-21diskmemload21:36:160
71380rcu_preempt17785-21grep22:25:161
71380rcu_preempt17785-21grep22:25:161
71380rcu_preempt12452-21taskset19:28:480
71380rcu_preempt12452-21taskset19:28:480
71380rcu_preempt0-21swapper/123:10:151
71380rcu_preempt0-21swapper/123:10:151
71380rcu_preempt0-21swapper/023:10:540
71380rcu_preempt0-21swapper/023:10:540
71380rcu_preempt0-21swapper/022:49:270
71380rcu_preempt0-21swapper/022:49:270
71380rcu_preempt0-21swapper/022:33:240
71380rcu_preempt0-21swapper/022:33:240
71380rcu_preempt0-21swapper/021:56:390
71380rcu_preempt0-21swapper/021:56:390
71380rcu_preempt0-21swapper/019:20:560
71380rcu_preempt0-21swapper/019:20:560
71380rcu_preempt0-21swapper/019:20:560
71380rcu_preempt0-21swapper/000:38:590
71380rcu_preempt0-21swapper/000:38:590
71370rcu_preempt0-21swapper/019:45:120
71370rcu_preempt0-21swapper/019:45:120
71370rcu_preempt0-21swapper/019:44:390
71370rcu_preempt0-21swapper/019:44:390
71370rcu_preempt0-21swapper/019:44:390
46050370irq/122-QManpo2428-2110:48:550
46050370irq/122-QManpo2428-2110:48:550
46050370irq/122-QManpo20517-2110:48:550
46050370irq/122-QManpo20517-2110:48:550
46050370irq/122-QManpo20517-2110:48:550
71360rcu_preempt8000-21cat21:09:490
71360rcu_preempt8000-21cat21:09:490
71360rcu_preempt7884-21crond21:09:451
71360rcu_preempt7884-21crond21:09:451
71360rcu_preempt26622-21seq23:39:161
71360rcu_preempt26622-21seq23:39:161
71360rcu_preempt10205-21ssh21:15:111
71360rcu_preempt10205-21ssh21:15:111
71360rcu_preempt0-21swapper/323:49:363
71360rcu_preempt0-21swapper/323:49:363
71360rcu_preempt0-21swapper/323:40:383
71360rcu_preempt0-21swapper/323:40:383
71360rcu_preempt0-21swapper/323:40:383
71360rcu_preempt0-21swapper/123:15:261
71360rcu_preempt0-21swapper/123:15:261
71360rcu_preempt0-21swapper/122:06:421
71360rcu_preempt0-21swapper/122:06:421
71360rcu_preempt0-21swapper/121:48:161
71360rcu_preempt0-21swapper/121:48:161
71360rcu_preempt0-21swapper/120:04:461
71360rcu_preempt0-21swapper/120:04:461
71360rcu_preempt0-21swapper/100:20:441
71360rcu_preempt0-21swapper/100:20:441
71360rcu_preempt0-21swapper/100:20:441
71360rcu_preempt0-21swapper/100:18:461
71360rcu_preempt0-21swapper/100:18:461
71360rcu_preempt0-21swapper/100:13:411
71360rcu_preempt0-21swapper/100:13:411
71360rcu_preempt0-21swapper/100:09:211
71360rcu_preempt0-21swapper/100:09:211
71360rcu_preempt0-21swapper/023:58:340
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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