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2026-03-04 - 09:17
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Wed Mar 04, 2026 00:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71770rcu_preempt0-21swapper/023:03:360
71770rcu_preempt0-21swapper/023:03:360
71770rcu_preempt0-21swapper/023:03:360
71530rcu_preempt0-21swapper/121:55:331
71530rcu_preempt0-21swapper/121:55:331
71520rcu_preempt0-21swapper/022:22:120
71520rcu_preempt0-21swapper/022:22:120
71510rcu_preempt17946-21ssh22:07:370
71510rcu_preempt17946-21ssh22:07:370
71510rcu_preempt0-21swapper/022:30:080
71510rcu_preempt0-21swapper/022:30:080
100650510irq/38-i2c-mpc1958-21snmpd23:50:543
100650510irq/38-i2c-mpc1958-21snmpd23:50:543
100650510irq/38-i2c-mpc1958-21snmpd23:50:543
71450rcu_preempt31693-21kworker/2:322:46:442
71450rcu_preempt31693-21kworker/2:322:46:442
71450rcu_preempt31693-21kworker/2:322:46:442
71450rcu_preempt0-21swapper/021:47:410
71450rcu_preempt0-21swapper/021:47:410
165392440chrt15268-1kworker/0:3H19:07:160
165392440chrt15268-1kworker/0:3H19:07:160
165392440chrt15268-1kworker/0:3H19:07:160
16967994317cyclictest0-21swapper/021:56:430
16967994317cyclictest0-21swapper/021:56:430
16967994317cyclictest0-21swapper/021:56:430
16967994310cyclictest0-21swapper/022:02:170
16967994310cyclictest0-21swapper/022:02:170
71420rcu_preempt0-21swapper/123:53:481
71420rcu_preempt0-21swapper/123:53:481
71420rcu_preempt0-21swapper/123:18:321
71420rcu_preempt0-21swapper/123:18:321
71420rcu_preempt0-21swapper/123:18:321
71420rcu_preempt0-21swapper/023:51:590
71420rcu_preempt0-21swapper/023:51:590
71410rcu_preempt5193-21sed22:42:020
71410rcu_preempt5193-21sed22:42:020
71410rcu_preempt5193-21sed22:42:020
71410rcu_preempt0-21swapper/121:24:131
71410rcu_preempt0-21swapper/121:24:131
71410rcu_preempt0-21swapper/023:24:340
71410rcu_preempt0-21swapper/023:24:340
71410rcu_preempt0-21swapper/000:26:260
71410rcu_preempt0-21swapper/000:26:260
71400rcu_preempt13517-21mailstats22:57:021
71400rcu_preempt13517-21mailstats22:57:021
71400rcu_preempt13517-21mailstats22:57:021
71400rcu_preempt0-21swapper/223:22:362
71400rcu_preempt0-21swapper/223:22:362
71400rcu_preempt0-21swapper/022:56:430
71400rcu_preempt0-21swapper/022:56:430
71400rcu_preempt0-21swapper/022:56:430
71400rcu_preempt0-21swapper/022:32:550
71400rcu_preempt0-21swapper/022:32:550
71400rcu_preempt0-21swapper/021:26:420
71400rcu_preempt0-21swapper/021:26:420
1696799409cyclictest6840-21/usr/sbin/munin20:31:570
1696799409cyclictest6840-21/usr/sbin/munin20:31:570
71390rcu_preempt8011-21runrttasks22:47:050
71390rcu_preempt8011-21runrttasks22:47:050
71390rcu_preempt8011-21runrttasks22:47:050
71390rcu_preempt4188-21kworker/u8:221:35:160
71390rcu_preempt4188-21kworker/u8:221:35:160
71390rcu_preempt0-21swapper/323:21:433
71390rcu_preempt0-21swapper/323:21:433
71390rcu_preempt0-21swapper/321:48:093
71390rcu_preempt0-21swapper/321:48:093
71390rcu_preempt0-21swapper/121:13:071
71390rcu_preempt0-21swapper/121:13:071
71390rcu_preempt0-21swapper/120:56:571
71390rcu_preempt0-21swapper/120:56:571
71390rcu_preempt0-21swapper/120:56:571
71390rcu_preempt0-21swapper/023:43:160
71390rcu_preempt0-21swapper/023:43:160
71390rcu_preempt0-21swapper/023:29:260
71390rcu_preempt0-21swapper/023:29:260
71390rcu_preempt0-21swapper/022:55:350
71390rcu_preempt0-21swapper/022:55:350
71390rcu_preempt0-21swapper/021:01:450
71390rcu_preempt0-21swapper/021:01:450
71390rcu_preempt0-21swapper/000:01:580
71390rcu_preempt0-21swapper/000:01:580
16967993919cyclictest24102-21diskstats21:21:500
16967993919cyclictest24102-21diskstats21:21:500
71380rcu_preempt15278-21sh23:01:113
71380rcu_preempt15278-21sh23:01:113
71380rcu_preempt15278-21sh23:01:113
71380rcu_preempt0-21swapper/321:25:133
71380rcu_preempt0-21swapper/321:25:133
71380rcu_preempt0-21swapper/321:07:133
71380rcu_preempt0-21swapper/321:07:133
71380rcu_preempt0-21swapper/300:32:283
71380rcu_preempt0-21swapper/300:32:283
71380rcu_preempt0-21swapper/300:32:283
71380rcu_preempt0-21swapper/221:21:502
71380rcu_preempt0-21swapper/221:21:502
71380rcu_preempt0-21swapper/123:31:371
71380rcu_preempt0-21swapper/123:31:371
71380rcu_preempt0-21swapper/122:56:371
71380rcu_preempt0-21swapper/122:56:371
71380rcu_preempt0-21swapper/122:45:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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