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2025-11-20 - 13:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Nov 20, 2025 12:53:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28062760chrt46450irq/118-QMan09:24:362
28062760chrt46450irq/118-QMan09:24:362
71620rcu_preempt0-21swapper/310:56:513
71620rcu_preempt0-21swapper/310:56:513
71620rcu_preempt0-21swapper/310:56:513
71560rcu_preempt0-21swapper/112:07:221
71560rcu_preempt0-21swapper/112:07:221
71550rcu_preempt0-21swapper/011:03:440
71550rcu_preempt0-21swapper/011:03:440
71550rcu_preempt0-21swapper/011:03:440
71490rcu_preempt0-21swapper/213:01:182
71490rcu_preempt0-21swapper/213:01:182
71440rcu_preempt0-21swapper/310:17:433
71440rcu_preempt0-21swapper/310:17:433
1506599419cyclictest7077-21ntp_states11:28:001
1506599419cyclictest7077-21ntp_states11:28:001
1506599419cyclictest7077-21ntp_states11:28:001
71400rcu_preempt0-21swapper/108:07:541
71400rcu_preempt0-21swapper/108:07:541
71400rcu_preempt0-21swapper/012:20:050
71400rcu_preempt0-21swapper/012:20:050
71400rcu_preempt0-21swapper/012:20:050
71390rcu_preempt0-21swapper/112:39:591
71390rcu_preempt0-21swapper/112:39:591
71390rcu_preempt0-21swapper/111:27:071
71390rcu_preempt0-21swapper/111:27:071
71390rcu_preempt0-21swapper/111:27:071
71390rcu_preempt0-21swapper/108:47:541
71390rcu_preempt0-21swapper/108:47:541
71380rcu_preempt16012-21ssh11:45:192
71380rcu_preempt16012-21ssh11:45:192
71380rcu_preempt0-21swapper/111:42:371
71380rcu_preempt0-21swapper/111:42:371
71380rcu_preempt0-21swapper/111:17:521
71380rcu_preempt0-21swapper/111:17:521
71380rcu_preempt0-21swapper/109:58:211
71380rcu_preempt0-21swapper/109:58:211
71380rcu_preempt0-21swapper/010:43:050
71380rcu_preempt0-21swapper/010:43:050
71380rcu_preempt0-21swapper/010:43:050
71380rcu_preempt0-21swapper/009:42:090
71380rcu_preempt0-21swapper/009:42:090
46050380irq/122-QManpo9607-2109:24:360
46050380irq/122-QManpo9607-2109:24:360
46050380irq/122-QManpo24753-2109:24:360
71370rcu_preempt28695-1kworker/0:0H11:42:400
71370rcu_preempt15911-21ssh12:47:230
71370rcu_preempt15911-21ssh12:47:230
71370rcu_preempt14943-21diskmemload09:50:011
71370rcu_preempt14943-21diskmemload09:50:011
71370rcu_preempt0-21swapper/211:07:222
71370rcu_preempt0-21swapper/211:07:222
71370rcu_preempt0-21swapper/211:07:222
71370rcu_preempt0-21swapper/113:02:261
71370rcu_preempt0-21swapper/113:02:261
71370rcu_preempt0-21swapper/112:19:571
71370rcu_preempt0-21swapper/112:19:571
71370rcu_preempt0-21swapper/112:19:571
71370rcu_preempt0-21swapper/110:17:341
71370rcu_preempt0-21swapper/110:17:341
71370rcu_preempt0-21swapper/010:47:580
71370rcu_preempt0-21swapper/010:47:580
71370rcu_preempt0-21swapper/010:47:580
71370rcu_preempt0-21swapper/008:57:220
71370rcu_preempt0-21swapper/008:57:220
71370rcu_preempt0-21swapper/008:02:330
71370rcu_preempt0-21swapper/008:02:330
46450370irq/118-QManpo0-2109:24:362
46450370irq/118-QManpo0-2109:24:362
46450370irq/118-QManpo0-2109:24:362
46050370irq/122-QManpo30119-2109:24:360
46050370irq/122-QManpo30119-2109:24:360
46050370irq/122-QManpo29088-2109:24:360
46050370irq/122-QManpo29088-2109:24:360
46050370irq/122-QManpo29088-2109:24:360
46050370irq/122-QManpo19429-2109:24:360
46050370irq/122-QManpo19429-2109:24:360
71360rcu_preempt21146-21runrttasks12:56:382
71360rcu_preempt21146-21runrttasks12:56:382
71360rcu_preempt0-21swapper/311:20:423
71360rcu_preempt0-21swapper/311:20:423
71360rcu_preempt0-21swapper/310:24:223
71360rcu_preempt0-21swapper/310:24:223
71360rcu_preempt0-21swapper/212:38:422
71360rcu_preempt0-21swapper/212:38:422
71360rcu_preempt0-21swapper/112:09:051
71360rcu_preempt0-21swapper/112:09:051
71360rcu_preempt0-21swapper/112:09:051
71360rcu_preempt0-21swapper/111:17:241
71360rcu_preempt0-21swapper/111:17:241
71360rcu_preempt0-21swapper/111:17:241
71360rcu_preempt0-21swapper/110:24:511
71360rcu_preempt0-21swapper/110:24:511
71360rcu_preempt0-21swapper/011:42:500
71360rcu_preempt0-21swapper/011:42:500
71360rcu_preempt0-21swapper/011:33:170
71360rcu_preempt0-21swapper/011:33:170
71360rcu_preempt0-21swapper/011:16:260
71360rcu_preempt0-21swapper/011:16:260
71360rcu_preempt0-21swapper/011:16:260
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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