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2026-01-21 - 16:18
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Wed Jan 21, 2026 12:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71490rcu_preempt0-21swapper/111:01:091
71490rcu_preempt0-21swapper/111:01:091
71490rcu_preempt0-21swapper/111:01:091
71480rcu_preempt27949-21ssh11:01:173
71480rcu_preempt27949-21ssh11:01:173
71480rcu_preempt27949-21ssh11:01:173
71470rcu_preempt0-21swapper/112:35:581
71470rcu_preempt0-21swapper/112:35:581
71470rcu_preempt0-21swapper/112:35:581
71450rcu_preempt0-21swapper/010:23:150
71450rcu_preempt0-21swapper/010:23:150
46050440irq/122-QManpo0-210
46050440irq/122-QManpo0-210
71430rcu_preempt0-21swapper/212:31:152
71430rcu_preempt0-21swapper/212:31:152
99750400irq/38-i2c-mpc17298-21users08:26:150
99750400irq/38-i2c-mpc17298-21users08:26:150
71390rcu_preempt14377-21chrt12:31:050
71390rcu_preempt14377-21chrt12:31:050
71390rcu_preempt0-21swapper/208:35:492
71390rcu_preempt0-21swapper/208:35:492
71390rcu_preempt0-21swapper/208:35:492
46050390irq/122-QManpo23353-210
46050390irq/122-QManpo23353-210
46050390irq/122-QManpo0-210
46050390irq/122-QManpo0-210
100650390irq/38-i2c-mpc0-21swapper/309:41:333
100650390irq/38-i2c-mpc0-21swapper/309:41:333
71380rcu_preempt27268-21grep11:56:130
71380rcu_preempt27268-21grep11:56:130
71380rcu_preempt13565-21ntp_states10:36:102
71380rcu_preempt13565-21ntp_states10:36:102
71380rcu_preempt13565-21ntp_states10:36:102
71380rcu_preempt0-21swapper/210:21:392
71380rcu_preempt0-21swapper/210:21:392
71380rcu_preempt0-21swapper/209:37:472
71380rcu_preempt0-21swapper/209:37:472
71380rcu_preempt0-21swapper/011:31:560
71380rcu_preempt0-21swapper/011:31:560
71380rcu_preempt0-21swapper/011:31:560
71380rcu_preempt0-21swapper/011:24:150
71380rcu_preempt0-21swapper/011:24:150
71380rcu_preempt0-21swapper/010:58:360
71380rcu_preempt0-21swapper/010:58:360
71380rcu_preempt0-21swapper/010:58:360
71380rcu_preempt0-21swapper/009:06:140
71380rcu_preempt0-21swapper/009:06:140
71370rcu_preempt0-21swapper/011:48:240
71370rcu_preempt0-21swapper/011:48:240
71370rcu_preempt0-21swapper/010:49:230
71370rcu_preempt0-21swapper/010:49:230
46050370irq/122-QManpo3943-210
46050370irq/122-QManpo3943-210
46050370irq/122-QManpo17046-2110:48:550
46050370irq/122-QManpo17046-2110:48:550
46050370irq/122-QManpo17046-2110:48:550
46050370irq/122-QManpo0-210
46050370irq/122-QManpo0-210
46050370irq/122-QManpo0-210
46050370irq/122-QManpo0-210
46050370irq/122-QManpo0-210
71360rcu_preempt4438-1kworker/2:0H11:20:042
71360rcu_preempt4438-1kworker/2:0H11:20:042
71360rcu_preempt15863-21latency_hist10:40:540
71360rcu_preempt15863-21latency_hist10:40:540
71360rcu_preempt0-21swapper/310:42:563
71360rcu_preempt0-21swapper/310:42:563
71360rcu_preempt0-21swapper/212:27:222
71360rcu_preempt0-21swapper/212:27:222
71360rcu_preempt0-21swapper/208:21:072
71360rcu_preempt0-21swapper/208:21:072
71360rcu_preempt0-21swapper/207:56:052
71360rcu_preempt0-21swapper/207:56:052
71360rcu_preempt0-21swapper/207:37:242
71360rcu_preempt0-21swapper/207:37:242
71360rcu_preempt0-21swapper/207:37:242
71360rcu_preempt0-21swapper/012:38:290
71360rcu_preempt0-21swapper/012:38:290
71360rcu_preempt0-21swapper/012:38:290
71360rcu_preempt0-21swapper/011:36:540
71360rcu_preempt0-21swapper/011:36:540
71360rcu_preempt0-21swapper/011:36:540
71360rcu_preempt0-21swapper/010:12:540
71360rcu_preempt0-21swapper/010:12:540
71360rcu_preempt0-21swapper/010:02:570
71360rcu_preempt0-21swapper/010:02:570
71360rcu_preempt0-21swapper/009:21:510
71360rcu_preempt0-21swapper/009:21:510
71360rcu_preempt0-21swapper/009:16:060
71360rcu_preempt0-21swapper/009:16:060
71360rcu_preempt0-21swapper/009:16:060
71360rcu_preempt0-21swapper/009:12:490
71360rcu_preempt0-21swapper/009:12:490
71360rcu_preempt0-21swapper/007:21:370
71360rcu_preempt0-21swapper/007:21:370
46450360irq/118-QManpo0-2110:48:552
46450360irq/118-QManpo0-2110:48:552
46050360irq/122-QManpo8385-2110:48:550
46050360irq/122-QManpo8385-2110:48:550
46050360irq/122-QManpo32406-210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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