You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-21 - 14:12
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu May 21, 2026 12:47:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1599580migration/015181-21taskset07:08:230
1599580migration/015181-21taskset07:08:230
46050560irq/122-QManpo28162-2110:48:550
46050560irq/122-QManpo28162-2110:48:550
46050560irq/122-QManpo28162-2110:48:550
46050560irq/122-QManpo28162-2110:48:550
71530rcu_preempt0-21swapper/207:15:352
71530rcu_preempt0-21swapper/207:15:352
71500rcu_preempt28303-21taskset11:43:122
71500rcu_preempt28303-21taskset11:43:122
71480rcu_preempt0-21swapper/212:04:382
71480rcu_preempt0-21swapper/212:04:382
71470rcu_preempt0-21swapper/112:47:391
71470rcu_preempt0-21swapper/112:47:391
71470rcu_preempt0-21swapper/112:47:391
71470rcu_preempt0-21swapper/112:47:391
71450rcu_preempt0-21swapper/211:17:162
71450rcu_preempt0-21swapper/211:17:162
71450rcu_preempt0-21swapper/211:17:162
46050440irq/122-QManpo0-210
46050440irq/122-QManpo0-210
46050440irq/122-QManpo0-210
71430rcu_preempt0-21swapper/207:48:112
71430rcu_preempt0-21swapper/207:48:112
71430rcu_preempt0-21swapper/207:48:112
71420rcu_preempt10021-21kworker/2:209:55:252
71420rcu_preempt10021-21kworker/2:209:55:252
71420rcu_preempt10021-21kworker/2:209:55:252
46450420irq/118-QManpo28669-212
46250420irq/120-QManpo15822-2110:48:551
46250420irq/120-QManpo15822-2110:48:551
71400rcu_preempt23411-21sh09:24:120
71400rcu_preempt23411-21sh09:24:120
71400rcu_preempt23411-21sh09:24:120
71400rcu_preempt0-21swapper/209:04:012
71400rcu_preempt0-21swapper/209:04:012
71400rcu_preempt0-21swapper/209:04:012
71400rcu_preempt0-21swapper/011:54:580
71400rcu_preempt0-21swapper/011:54:580
71400rcu_preempt0-21swapper/011:54:580
71400rcu_preempt0-21swapper/010:27:310
71400rcu_preempt0-21swapper/010:27:310
71400rcu_preempt0-21swapper/010:27:310
71400rcu_preempt0-21swapper/010:27:310
46650400irq/116-QManpo28880-2110:48:553
46650400irq/116-QManpo28880-2110:48:553
46650400irq/116-QManpo28880-2110:48:553
71390rcu_preempt21438-21ssh10:25:272
71390rcu_preempt21438-21ssh10:25:272
71390rcu_preempt21438-21ssh10:25:272
71390rcu_preempt21438-21ssh10:25:272
71390rcu_preempt0-21swapper/211:19:102
71390rcu_preempt0-21swapper/211:19:102
71390rcu_preempt0-21swapper/210:48:072
71390rcu_preempt0-21swapper/210:48:072
71390rcu_preempt0-21swapper/210:48:072
71390rcu_preempt0-21swapper/209:33:092
71390rcu_preempt0-21swapper/209:33:092
71390rcu_preempt0-21swapper/209:33:092
71390rcu_preempt0-21swapper/009:33:180
71390rcu_preempt0-21swapper/009:33:180
71390rcu_preempt0-21swapper/009:33:180
46050390irq/122-QManpo22043-2110:48:550
46050390irq/122-QManpo22043-2110:48:550
2299390migration/228398-21taskset12:47:272
2299390migration/228398-21taskset12:47:272
2299390migration/228398-21taskset12:47:272
71380rcu_preempt3448-21sh09:48:362
71380rcu_preempt3448-21sh09:48:362
71380rcu_preempt3448-21sh09:48:362
71380rcu_preempt19686-21taskset10:22:410
71380rcu_preempt19686-21taskset10:22:410
71380rcu_preempt19686-21taskset10:22:410
71380rcu_preempt19686-21taskset10:22:410
71380rcu_preempt0-21swapper/312:47:593
71380rcu_preempt0-21swapper/212:16:072
71380rcu_preempt0-21swapper/212:16:072
71380rcu_preempt0-21swapper/211:02:082
71380rcu_preempt0-21swapper/211:02:082
71380rcu_preempt0-21swapper/211:02:082
71380rcu_preempt0-21swapper/210:36:082
71380rcu_preempt0-21swapper/210:36:082
71380rcu_preempt0-21swapper/210:36:082
46050380irq/122-QManpo8492-2110:48:550
46050380irq/122-QManpo8492-2110:48:550
46050380irq/122-QManpo8492-2110:48:550
46050380irq/122-QManpo32647-2110:48:550
46050380irq/122-QManpo32647-2110:48:550
46050380irq/122-QManpo32647-2110:48:550
46050380irq/122-QManpo1959-2110:48:550
46050380irq/122-QManpo1959-2110:48:550
46050380irq/122-QManpo14553-2110:48:550
46050380irq/122-QManpo14553-2110:48:550
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
71370rcu_preempt9125-21ssh11:06:540
71370rcu_preempt9125-21ssh11:06:540
71370rcu_preempt9125-21ssh11:06:540
71370rcu_preempt2092-21sh11:54:272
71370rcu_preempt2092-21sh11:54:272
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional