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2025-12-23 - 15:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Tue Dec 23, 2025 12:43:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71660rcu_preempt0-21swapper/311:04:573
71660rcu_preempt0-21swapper/311:04:573
71520rcu_preempt0-21swapper/111:01:331
71520rcu_preempt0-21swapper/111:01:331
71480rcu_preempt27924-21apt-get08:45:251
71480rcu_preempt27924-21apt-get08:45:251
139299472cyclictest9451-1kworker/2:0H09:30:452
139299472cyclictest9451-1kworker/2:0H09:30:452
139299472cyclictest9451-1kworker/2:0H09:30:452
71450rcu_preempt0-21swapper/108:05:331
71450rcu_preempt0-21swapper/108:05:331
140099453cyclictest13463-21df_inode10:25:313
140099453cyclictest13463-21df_inode10:25:313
139299452cyclictest1959-21runrttasks11:15:242
139299452cyclictest1959-21runrttasks11:15:242
71440rcu_preempt6246-21timerandwakeup09:15:443
71440rcu_preempt6246-21timerandwakeup09:15:443
71440rcu_preempt6246-21timerandwakeup09:15:443
46050440irq/122-QManpo0-210
46050440irq/122-QManpo0-210
140099444cyclictest0-21swapper/309:45:393
140099444cyclictest0-21swapper/309:45:393
140099444cyclictest0-21swapper/309:45:393
140099444cyclictest0-21swapper/307:45:313
140099444cyclictest0-21swapper/307:45:313
140099443cyclictest31090-21memory08:55:353
140099443cyclictest31090-21memory08:55:353
140099443cyclictest31090-21memory08:55:353
140099443cyclictest22283-21memory10:40:383
140099443cyclictest22283-21memory10:40:383
140099434cyclictest0-21swapper/311:56:173
140099434cyclictest0-21swapper/311:56:173
140099434cyclictest0-21swapper/311:56:173
140099434cyclictest0-21swapper/310:10:313
140099434cyclictest0-21swapper/310:10:313
140099434cyclictest0-21swapper/310:10:313
140099434cyclictest0-21swapper/309:55:583
140099434cyclictest0-21swapper/309:55:583
140099434cyclictest0-21swapper/309:11:013
140099434cyclictest0-21swapper/309:11:013
140099434cyclictest0-21swapper/309:11:013
140099433cyclictest16723-21munin-run09:35:143
140099433cyclictest16723-21munin-run09:35:143
140099433cyclictest16723-21munin-run09:35:143
140099433cyclictest0-21swapper/311:40:153
140099433cyclictest0-21swapper/311:40:153
140099433cyclictest0-21swapper/311:40:153
140099433cyclictest0-21swapper/311:22:063
140099433cyclictest0-21swapper/311:22:063
140099433cyclictest0-21swapper/311:22:063
140099433cyclictest0-21swapper/307:10:303
140099433cyclictest0-21swapper/307:10:303
139299433cyclictest0-21swapper/209:40:272
139299433cyclictest0-21swapper/209:40:272
139299433cyclictest0-21swapper/209:40:272
139299432cyclictest5526-21users10:10:422
139299432cyclictest5526-21users10:10:422
139299432cyclictest5526-21users10:10:422
139299432cyclictest31693-21memory10:00:372
139299432cyclictest31693-21memory10:00:372
1392994316cyclictest0-21swapper/212:01:002
1392994316cyclictest0-21swapper/212:01:002
1392994315cyclictest25354-21df_inode08:35:302
1392994315cyclictest25354-21df_inode08:35:302
100650430irq/38-i2c-mpc0-21swapper/009:35:460
100650430irq/38-i2c-mpc0-21swapper/009:35:460
100650430irq/38-i2c-mpc0-21swapper/009:35:460
140099424cyclictest0-21swapper/312:29:293
140099424cyclictest0-21swapper/312:29:293
140099424cyclictest0-21swapper/312:29:293
140099424cyclictest0-21swapper/312:01:333
140099424cyclictest0-21swapper/312:01:333
140099424cyclictest0-21swapper/310:05:273
140099424cyclictest0-21swapper/310:05:273
140099424cyclictest0-21swapper/310:05:273
140099423cyclictest0-21swapper/311:11:313
140099423cyclictest0-21swapper/311:11:313
140099422cyclictest15644-21df_inode08:00:273
140099422cyclictest15644-21df_inode08:00:273
140099422cyclictest12633-21/usr/sbin/munin07:50:263
140099422cyclictest12633-21/usr/sbin/munin07:50:263
139299424cyclictest0-21swapper/207:27:572
139299424cyclictest0-21swapper/207:27:572
139299423cyclictest11488-21df_inode07:45:302
139299423cyclictest11488-21df_inode07:45:302
139299423cyclictest0-21swapper/210:07:222
139299423cyclictest0-21swapper/210:07:222
139299423cyclictest0-21swapper/210:07:222
139299423cyclictest0-21swapper/208:30:142
139299423cyclictest0-21swapper/208:30:142
139299423cyclictest0-21swapper/207:50:252
139299423cyclictest0-21swapper/207:50:252
139299422cyclictest5874-21/usr/sbin/munin12:05:432
139299422cyclictest5874-21/usr/sbin/munin12:05:432
1392994216cyclictest1159-21diskstats11:00:312
1392994216cyclictest1159-21diskstats11:00:312
1392994215cyclictest25013-21irqstats10:45:312
1392994215cyclictest25013-21irqstats10:45:312
1392994215cyclictest25013-21irqstats10:45:312
1392994215cyclictest24477-21ntp_states11:40:412
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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