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2026-05-02 - 17:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sat May 02, 2026 12:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
106962690chrt46050irq/122-QMan10:48:550
106962690chrt46050irq/122-QMan10:48:550
106962690chrt46050irq/122-QMan10:48:550
71490rcu_preempt2662-21/usr/sbin/munin12:13:080
71490rcu_preempt2662-21/usr/sbin/munin12:13:080
71490rcu_preempt2662-21/usr/sbin/munin12:13:080
71490rcu_preempt0-21swapper/011:24:470
71490rcu_preempt0-21swapper/011:24:470
46050490irq/122-QManpo783-2110:48:550
46050490irq/122-QManpo783-2110:48:550
112792490chrt46250irq/120-QMan10:48:551
112792490chrt46250irq/120-QMan10:48:551
71460rcu_preempt11375-21sh11:28:471
71460rcu_preempt11375-21sh11:28:471
71440rcu_preempt10328-21taskset07:44:380
71440rcu_preempt10328-21taskset07:44:380
71440rcu_preempt0-21swapper/010:27:470
71440rcu_preempt0-21swapper/010:27:470
71440rcu_preempt0-21swapper/010:08:020
71440rcu_preempt0-21swapper/010:08:020
71440rcu_preempt0-21swapper/010:08:020
917994310cyclictest0-21swapper/009:50:190
917994310cyclictest0-21swapper/009:50:190
917994310cyclictest0-21swapper/009:50:190
917994310cyclictest0-21swapper/009:50:190
71430rcu_preempt0-21swapper/010:33:130
71430rcu_preempt0-21swapper/010:33:130
71420rcu_preempt0-21swapper/011:44:120
71420rcu_preempt0-21swapper/011:44:120
71420rcu_preempt0-21swapper/011:44:120
71420rcu_preempt0-21swapper/011:34:580
71420rcu_preempt0-21swapper/011:34:580
71420rcu_preempt0-21swapper/010:26:350
71420rcu_preempt0-21swapper/010:26:350
71420rcu_preempt0-21swapper/010:26:350
71420rcu_preempt0-21swapper/009:43:460
71420rcu_preempt0-21swapper/009:43:460
71420rcu_preempt0-21swapper/007:29:060
71420rcu_preempt0-21swapper/007:29:060
71420rcu_preempt0-21swapper/007:29:060
46450420irq/118-QManpo31578-2110:48:552
46450420irq/118-QManpo31578-2110:48:552
46250420irq/120-QManpo31958-2110:48:551
46250420irq/120-QManpo31958-2110:48:551
71410rcu_preempt3146-1grep07:18:050
71410rcu_preempt3146-1grep07:18:050
71410rcu_preempt3146-1grep07:18:050
71410rcu_preempt0-21swapper/112:04:211
71410rcu_preempt0-21swapper/112:04:211
71410rcu_preempt0-21swapper/111:58:031
71410rcu_preempt0-21swapper/111:58:031
71410rcu_preempt0-21swapper/012:03:070
71410rcu_preempt0-21swapper/012:03:070
91799409cyclictest0-21swapper/011:55:510
91799409cyclictest0-21swapper/011:55:510
71400rcu_preempt0-21swapper/110:05:571
71400rcu_preempt0-21swapper/110:05:571
71400rcu_preempt0-21swapper/110:05:571
71400rcu_preempt0-21swapper/012:11:000
71400rcu_preempt0-21swapper/012:11:000
71400rcu_preempt0-21swapper/012:11:000
91799399cyclictest0-21swapper/012:21:370
91799399cyclictest0-21swapper/012:21:370
917993918cyclictest1959-21runrttasks10:57:290
917993918cyclictest1959-21runrttasks10:57:290
917993918cyclictest1959-21runrttasks10:57:290
917993918cyclictest16252-21ntp_states09:38:030
917993918cyclictest16252-21ntp_states09:38:030
71390rcu_preempt7614-1kworker/1:0H12:25:591
71390rcu_preempt7614-1kworker/1:0H12:25:591
71390rcu_preempt7614-1kworker/1:0H12:25:591
71390rcu_preempt31124-1kworker/0:2H09:02:400
71390rcu_preempt31124-1kworker/0:2H09:02:400
71390rcu_preempt14316-21ssh12:34:520
71390rcu_preempt14316-21ssh12:34:520
71390rcu_preempt0-21swapper/210:27:482
71390rcu_preempt0-21swapper/210:27:482
71390rcu_preempt0-21swapper/112:28:361
71390rcu_preempt0-21swapper/112:28:361
71390rcu_preempt0-21swapper/112:28:361
71390rcu_preempt0-21swapper/112:12:411
71390rcu_preempt0-21swapper/112:12:411
71390rcu_preempt0-21swapper/112:12:411
71390rcu_preempt0-21swapper/111:19:231
71390rcu_preempt0-21swapper/111:19:231
71390rcu_preempt0-21swapper/110:52:591
71390rcu_preempt0-21swapper/110:52:591
71390rcu_preempt0-21swapper/110:52:591
71390rcu_preempt0-21swapper/110:09:001
71390rcu_preempt0-21swapper/110:09:001
71390rcu_preempt0-21swapper/110:09:001
71390rcu_preempt0-21swapper/109:47:201
71390rcu_preempt0-21swapper/109:47:201
71390rcu_preempt0-21swapper/109:37:121
71390rcu_preempt0-21swapper/109:37:121
71390rcu_preempt0-21swapper/012:37:490
71390rcu_preempt0-21swapper/012:37:490
71390rcu_preempt0-21swapper/012:37:490
71390rcu_preempt0-21swapper/012:25:170
71390rcu_preempt0-21swapper/012:25:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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