You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-05 - 07:46
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Mar 05, 2026 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71500rcu_preempt0-21swapper/023:58:210
71500rcu_preempt0-21swapper/023:58:210
71490rcu_preempt0-21swapper/200:31:572
71490rcu_preempt0-21swapper/200:31:572
71450rcu_preempt11471-21runrttasks22:37:022
71450rcu_preempt11471-21runrttasks22:37:022
46050440irq/122-QManpo0-210
46050440irq/122-QManpo0-210
71430rcu_preempt0-21swapper/123:06:491
71430rcu_preempt0-21swapper/123:06:491
71430rcu_preempt0-21swapper/123:06:491
71430rcu_preempt0-21swapper/022:27:580
71430rcu_preempt0-21swapper/022:27:580
71420rcu_preempt0-21swapper/122:50:181
71420rcu_preempt0-21swapper/122:50:181
71420rcu_preempt0-21swapper/122:50:181
71420rcu_preempt0-21swapper/000:16:580
71420rcu_preempt0-21swapper/000:16:580
71410rcu_preempt0-21swapper/022:10:380
71410rcu_preempt0-21swapper/022:10:380
1599410migration/017042-21runrttasks23:45:160
1599410migration/017042-21runrttasks23:45:160
71400rcu_preempt26373-21df19:11:480
71400rcu_preempt26373-21df19:11:480
71400rcu_preempt19101-21runrttasks23:48:102
71400rcu_preempt19101-21runrttasks23:48:102
71400rcu_preempt19101-21runrttasks23:48:102
71400rcu_preempt0-21swapper/022:39:130
71400rcu_preempt0-21swapper/022:39:130
46050400irq/122-QManpo18957-2110:48:550
46050400irq/122-QManpo18957-2110:48:550
71390rcu_preempt0-21swapper/222:17:342
71390rcu_preempt0-21swapper/222:17:342
71390rcu_preempt0-21swapper/121:14:341
71390rcu_preempt0-21swapper/121:14:341
71390rcu_preempt0-21swapper/121:14:341
71380rcu_preempt0-21swapper/022:02:180
71380rcu_preempt0-21swapper/022:02:180
71380rcu_preempt0-21swapper/019:23:240
71380rcu_preempt0-21swapper/019:23:240
46050380irq/122-QManpo30600-2110:48:550
46050380irq/122-QManpo30600-2110:48:550
46050380irq/122-QManpo30600-2110:48:550
46050380irq/122-QManpo30308-110:48:550
46050380irq/122-QManpo30308-110:48:550
46050380irq/122-QManpo2515-2110:48:550
46050380irq/122-QManpo2515-2110:48:550
46050380irq/122-QManpo18980-2110:48:550
46050380irq/122-QManpo18980-2110:48:550
46050380irq/122-QManpo18980-2110:48:550
96632370sleep030153-1kworker/0:0H00:28:420
96632370sleep030153-1kworker/0:0H00:28:420
96632370sleep030153-1kworker/0:0H00:28:420
71370rcu_preempt0-21swapper/222:31:502
71370rcu_preempt0-21swapper/222:31:502
71370rcu_preempt0-21swapper/122:19:091
71370rcu_preempt0-21swapper/122:19:091
71370rcu_preempt0-21swapper/121:26:371
71370rcu_preempt0-21swapper/121:26:371
71370rcu_preempt0-21swapper/100:19:051
71370rcu_preempt0-21swapper/100:19:051
71370rcu_preempt0-21swapper/100:06:371
71370rcu_preempt0-21swapper/100:06:371
71370rcu_preempt0-21swapper/023:03:260
71370rcu_preempt0-21swapper/023:03:260
5932370sleep031772-1kworker/0:0H19:36:370
5932370sleep031772-1kworker/0:0H19:36:370
46050370irq/122-QManpo9799-2110:48:550
46050370irq/122-QManpo9799-2110:48:550
46050370irq/122-QManpo9326-2110:48:550
46050370irq/122-QManpo9326-2110:48:550
46050370irq/122-QManpo9326-2110:48:550
46050370irq/122-QManpo681-2110:48:550
46050370irq/122-QManpo681-2110:48:550
46050370irq/122-QManpo5590-2110:48:550
46050370irq/122-QManpo5590-2110:48:550
46050370irq/122-QManpo3806-2110:48:550
46050370irq/122-QManpo3806-2110:48:550
46050370irq/122-QManpo28594-2110:48:550
46050370irq/122-QManpo28594-2110:48:550
46050370irq/122-QManpo20270-2110:48:550
46050370irq/122-QManpo20270-2110:48:550
46050370irq/122-QManpo20270-2110:48:550
46050370irq/122-QManpo14803-2110:48:550
46050370irq/122-QManpo14803-2110:48:550
46050370irq/122-QManpo14803-2110:48:550
46050370irq/122-QManpo11384-2110:48:550
46050370irq/122-QManpo11384-2110:48:550
2899370migration/325868-21taskset19:09:563
2899370migration/325868-21taskset19:09:563
1599370migration/031413-21sh22:16:330
1599370migration/031413-21sh22:16:330
129702370sleep012617-1kworker/0:2H20:20:460
129702370sleep012617-1kworker/0:2H20:20:460
129702370sleep012617-1kworker/0:2H20:20:460
71360rcu_preempt5696-21sh23:25:153
71360rcu_preempt5696-21sh23:25:153
71360rcu_preempt5044-21chrt19:51:463
71360rcu_preempt5044-21chrt19:51:463
71360rcu_preempt5044-21chrt19:51:463
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional