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2026-07-29 - 13:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Wed Jul 29, 2026 00:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
711280rcu_preempt0-21swapper/123:19:381
711280rcu_preempt0-21swapper/123:19:381
711280rcu_preempt0-21swapper/123:19:381
71650rcu_preempt0-21swapper/023:34:360
71650rcu_preempt0-21swapper/023:34:360
71600rcu_preempt0-21swapper/022:25:120
71600rcu_preempt0-21swapper/022:25:120
71600rcu_preempt0-21swapper/022:25:120
71580rcu_preempt0-21swapper/222:05:072
71580rcu_preempt0-21swapper/222:05:072
71530rcu_preempt0-21swapper/300:04:423
71530rcu_preempt0-21swapper/300:04:423
24602520chrt46250irq/120-QMan10:48:551
24602520chrt46250irq/120-QMan10:48:551
24602520chrt46250irq/120-QMan10:48:551
71490rcu_preempt1608-21/usr/sbin/munin19:24:272
71490rcu_preempt1608-21/usr/sbin/munin19:24:272
71490rcu_preempt0-21swapper/022:43:180
71490rcu_preempt0-21swapper/022:43:180
71490rcu_preempt0-21swapper/022:06:150
71490rcu_preempt0-21swapper/022:06:150
71480rcu_preempt11663-21/usr/sbin/munin21:34:360
71480rcu_preempt11663-21/usr/sbin/munin21:34:360
71480rcu_preempt0-21swapper/023:21:310
71480rcu_preempt0-21swapper/023:21:310
71480rcu_preempt0-21swapper/023:21:310
71480rcu_preempt0-21swapper/021:18:000
71480rcu_preempt0-21swapper/021:18:000
71480rcu_preempt0-21swapper/019:41:210
71480rcu_preempt0-21swapper/019:41:210
71480rcu_preempt0-21swapper/019:41:210
71480rcu_preempt0-21swapper/019:22:120
71480rcu_preempt0-21swapper/019:22:120
71480rcu_preempt0-21swapper/000:25:110
71480rcu_preempt0-21swapper/000:25:110
71470rcu_preempt10519-21kworker/0:119:24:350
71470rcu_preempt10519-21kworker/0:119:24:350
71470rcu_preempt0-21swapper/223:34:212
71470rcu_preempt0-21swapper/223:34:212
71470rcu_preempt0-21swapper/023:14:270
71470rcu_preempt0-21swapper/023:14:270
71470rcu_preempt0-21swapper/023:10:060
71470rcu_preempt0-21swapper/023:10:060
71470rcu_preempt0-21swapper/023:10:060
71470rcu_preempt0-21swapper/022:54:580
71470rcu_preempt0-21swapper/022:54:580
71470rcu_preempt0-21swapper/022:54:580
71470rcu_preempt0-21swapper/022:49:220
71470rcu_preempt0-21swapper/022:49:220
71470rcu_preempt0-21swapper/022:49:220
71470rcu_preempt0-21swapper/022:17:530
71470rcu_preempt0-21swapper/022:17:530
71470rcu_preempt0-21swapper/022:17:530
71470rcu_preempt0-21swapper/022:10:330
71470rcu_preempt0-21swapper/022:10:330
71470rcu_preempt0-21swapper/021:54:490
71470rcu_preempt0-21swapper/021:54:490
71470rcu_preempt0-21swapper/021:25:180
71470rcu_preempt0-21swapper/021:25:180
71470rcu_preempt0-21swapper/020:21:210
71470rcu_preempt0-21swapper/020:21:210
71470rcu_preempt0-21swapper/020:21:210
71470rcu_preempt0-21swapper/019:49:340
71470rcu_preempt0-21swapper/019:49:340
71470rcu_preempt0-21swapper/019:49:340
71470rcu_preempt0-21swapper/000:05:110
71470rcu_preempt0-21swapper/000:05:110
71460rcu_preempt0-21swapper/322:03:473
71460rcu_preempt0-21swapper/322:03:473
71460rcu_preempt0-21swapper/322:03:473
71460rcu_preempt0-21swapper/319:59:033
71460rcu_preempt0-21swapper/319:59:033
71460rcu_preempt0-21swapper/223:29:362
71460rcu_preempt0-21swapper/223:29:362
71460rcu_preempt0-21swapper/223:29:362
71460rcu_preempt0-21swapper/222:53:112
71460rcu_preempt0-21swapper/222:53:112
71460rcu_preempt0-21swapper/222:53:112
71460rcu_preempt0-21swapper/023:28:050
71460rcu_preempt0-21swapper/023:28:050
71460rcu_preempt0-21swapper/023:00:070
71460rcu_preempt0-21swapper/023:00:070
71460rcu_preempt0-21swapper/021:53:460
71460rcu_preempt0-21swapper/021:53:460
71460rcu_preempt0-21swapper/021:43:550
71460rcu_preempt0-21swapper/021:43:550
71460rcu_preempt0-21swapper/021:43:550
71460rcu_preempt0-21swapper/021:33:460
71460rcu_preempt0-21swapper/021:33:460
71460rcu_preempt0-21swapper/020:15:250
71460rcu_preempt0-21swapper/020:15:250
71460rcu_preempt0-21swapper/020:11:360
71460rcu_preempt0-21swapper/020:11:360
71460rcu_preempt0-21swapper/000:24:040
71460rcu_preempt0-21swapper/000:24:040
71460rcu_preempt0-21swapper/000:24:040
71450rcu_preempt0-21swapper/320:31:423
71450rcu_preempt0-21swapper/320:31:423
71450rcu_preempt0-21swapper/023:55:170
71450rcu_preempt0-21swapper/023:55:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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