You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-27 - 21:36
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Aug 27, 2026 12:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71600rcu_preempt0-21swapper/011:27:590
71600rcu_preempt0-21swapper/011:27:590
1373199551cyclictest31960-21sed08:20:080
1373199551cyclictest31960-21sed08:20:080
46050510irq/122-QManpo13409-2110:48:550
46050510irq/122-QManpo13409-2110:48:550
71490rcu_preempt13480-21apt-get11:10:022
71490rcu_preempt13480-21apt-get11:10:022
71460rcu_preempt0-21swapper/110:01:441
71460rcu_preempt0-21swapper/110:01:441
71460rcu_preempt0-21swapper/110:01:441
46450460irq/118-QManpo13718-2110:48:552
46450460irq/118-QManpo13718-2110:48:552
71440rcu_preempt0-21swapper/112:05:581
71440rcu_preempt0-21swapper/112:05:581
71430rcu_preempt0-21swapper/310:05:563
71430rcu_preempt0-21swapper/310:05:563
71430rcu_preempt0-21swapper/209:40:182
71430rcu_preempt0-21swapper/209:40:182
71430rcu_preempt0-21swapper/209:40:182
46050420irq/122-QManpo13897-210
46050420irq/122-QManpo13897-210
46050420irq/122-QManpo0-210
46050420irq/122-QManpo0-210
71410rcu_preempt0-21swapper/212:22:322
71410rcu_preempt0-21swapper/212:22:322
71410rcu_preempt0-21swapper/109:39:441
71410rcu_preempt0-21swapper/109:39:441
71410rcu_preempt0-21swapper/109:39:441
71410rcu_preempt0-21swapper/008:45:000
71410rcu_preempt0-21swapper/008:45:000
71400rcu_preempt2096-21sh11:45:322
71400rcu_preempt2096-21sh11:45:322
71400rcu_preempt16435-21runrttasks11:14:463
71400rcu_preempt0-21swapper/210:11:582
71400rcu_preempt0-21swapper/210:11:582
71400rcu_preempt0-21swapper/208:44:482
71400rcu_preempt0-21swapper/208:44:482
71400rcu_preempt0-21swapper/109:45:441
71400rcu_preempt0-21swapper/109:45:441
46650400irq/116-QManpo13478-2110:48:553
46650400irq/116-QManpo13478-2110:48:553
46250400irq/120-QManpo0-2110:48:551
46250400irq/120-QManpo0-2110:48:551
46050400irq/122-QManpo19310-2110:48:550
46050400irq/122-QManpo19310-2110:48:550
71390rcu_preempt0-21swapper/311:09:473
71390rcu_preempt0-21swapper/308:48:063
71390rcu_preempt0-21swapper/308:48:063
71390rcu_preempt0-21swapper/212:07:272
71390rcu_preempt0-21swapper/212:07:272
71390rcu_preempt0-21swapper/111:14:491
71390rcu_preempt0-21swapper/111:14:491
71390rcu_preempt0-21swapper/110:05:531
71390rcu_preempt0-21swapper/110:05:531
71380rcu_preempt0-21swapper/311:11:083
71380rcu_preempt0-21swapper/212:15:352
71380rcu_preempt0-21swapper/212:15:352
71380rcu_preempt0-21swapper/212:15:352
71380rcu_preempt0-21swapper/209:29:532
71380rcu_preempt0-21swapper/209:29:532
71380rcu_preempt0-21swapper/209:22:432
71380rcu_preempt0-21swapper/209:22:432
71380rcu_preempt0-21swapper/208:59:512
71380rcu_preempt0-21swapper/208:59:512
71380rcu_preempt0-21swapper/112:15:051
71380rcu_preempt0-21swapper/112:15:051
71380rcu_preempt0-21swapper/112:15:051
46050380irq/122-QManpo27049-2110:48:550
46050380irq/122-QManpo27049-2110:48:550
46050380irq/122-QManpo20760-2110:48:550
1599380migration/06583-21runrttasks10:56:130
1599380migration/06583-21runrttasks10:56:130
1599380migration/06583-21runrttasks10:56:130
71370rcu_preempt8832-21ssh10:03:280
71370rcu_preempt8832-21ssh10:03:280
71370rcu_preempt8832-21ssh10:03:280
71370rcu_preempt28029-21ssh11:34:570
71370rcu_preempt28029-21ssh11:34:570
71370rcu_preempt15535-21meminfo10:15:012
71370rcu_preempt15535-21meminfo10:15:012
71370rcu_preempt15535-21meminfo10:15:012
71370rcu_preempt0-21swapper/212:37:232
71370rcu_preempt0-21swapper/212:37:232
71370rcu_preempt0-21swapper/210:45:492
71370rcu_preempt0-21swapper/210:45:492
71370rcu_preempt0-21swapper/210:45:492
71370rcu_preempt0-21swapper/208:19:412
71370rcu_preempt0-21swapper/110:52:321
71370rcu_preempt0-21swapper/110:52:321
71360rcu_preempt9012-21chrt08:55:023
71360rcu_preempt9012-21chrt08:55:023
71360rcu_preempt26223-21latency_hist12:29:432
71360rcu_preempt26223-21latency_hist12:29:432
71360rcu_preempt23198-1kworker/2:1H11:33:322
71360rcu_preempt23198-1kworker/2:1H11:33:322
71360rcu_preempt22644-21snmpd11:15:023
71360rcu_preempt22644-21snmpd11:15:023
71360rcu_preempt0-21swapper/307:50:473
71360rcu_preempt0-21swapper/307:50:473
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional