You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-11 - 16:29
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Jun 11, 2026 12:44:19)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
46050550irq/122-QManpo4454-2110:48:550
71490rcu_preempt0-21swapper/311:26:443
71490rcu_preempt0-21swapper/311:26:443
71490rcu_preempt0-21swapper/311:26:443
71460rcu_preempt13855-21copy10:28:312
71450rcu_preempt0-21swapper/210:50:242
71450rcu_preempt0-21swapper/210:50:242
71430rcu_preempt0-21swapper/109:58:321
71430rcu_preempt0-21swapper/109:58:321
71430rcu_preempt0-21swapper/011:33:520
71430rcu_preempt0-21swapper/011:33:520
71430rcu_preempt0-21swapper/011:33:520
46050420irq/122-QManpo32093-10
46050420irq/122-QManpo32093-10
46050420irq/122-QManpo32093-10
71410rcu_preempt6631-21/usr/sbin/munin10:13:371
71410rcu_preempt6631-21/usr/sbin/munin10:13:371
71410rcu_preempt6631-21/usr/sbin/munin10:13:371
71410rcu_preempt4617-21kworker/1:012:23:531
71410rcu_preempt4617-21kworker/1:012:23:531
71410rcu_preempt4617-21kworker/1:012:23:531
71410rcu_preempt0-21swapper/107:08:521
71410rcu_preempt0-21swapper/012:39:150
71410rcu_preempt0-21swapper/012:39:150
71410rcu_preempt0-21swapper/012:39:150
71400rcu_preempt0-21swapper/211:43:522
71400rcu_preempt0-21swapper/211:43:522
71400rcu_preempt0-21swapper/211:43:522
71400rcu_preempt0-21swapper/111:58:531
71400rcu_preempt0-21swapper/111:58:531
71400rcu_preempt0-21swapper/111:58:531
71400rcu_preempt0-21swapper/010:34:210
71400rcu_preempt0-21swapper/010:34:210
71400rcu_preempt0-21swapper/010:31:570
71400rcu_preempt0-21swapper/010:31:570
71400rcu_preempt0-21swapper/010:31:570
71400rcu_preempt0-21swapper/010:19:020
71400rcu_preempt0-21swapper/010:19:020
71400rcu_preempt0-21swapper/010:19:020
46050400irq/122-QManpo14103-2110:48:550
46050400irq/122-QManpo14103-2110:48:550
46050400irq/122-QManpo14103-2110:48:550
71390rcu_preempt9686-21/usr/sbin/munin11:23:490
71390rcu_preempt9686-21/usr/sbin/munin11:23:490
71390rcu_preempt9686-21/usr/sbin/munin11:23:490
71390rcu_preempt0-21swapper/310:39:273
71390rcu_preempt0-21swapper/310:39:273
71390rcu_preempt0-21swapper/310:39:273
71390rcu_preempt0-21swapper/111:13:301
71390rcu_preempt0-21swapper/111:13:301
71390rcu_preempt0-21swapper/012:25:310
71390rcu_preempt0-21swapper/012:25:310
71390rcu_preempt0-21swapper/012:25:310
71390rcu_preempt0-21swapper/009:58:250
71390rcu_preempt0-21swapper/009:58:250
71390rcu_preempt0-21swapper/009:53:210
71390rcu_preempt0-21swapper/009:53:210
71390rcu_preempt0-21swapper/009:13:470
71390rcu_preempt0-21swapper/009:13:470
71390rcu_preempt0-21swapper/009:13:470
46050390irq/122-QManpo26055-2110:48:550
46050390irq/122-QManpo26055-2110:48:550
46050390irq/122-QManpo26055-2110:48:550
46050390irq/122-QManpo20998-2110:48:550
46050390irq/122-QManpo20998-2110:48:550
46050390irq/122-QManpo20998-2110:48:550
71380rcu_preempt0-21swapper/307:52:403
71380rcu_preempt0-21swapper/307:52:403
71380rcu_preempt0-21swapper/208:03:262
71380rcu_preempt0-21swapper/208:03:262
71380rcu_preempt0-21swapper/109:41:411
71380rcu_preempt0-21swapper/109:41:411
71380rcu_preempt0-21swapper/010:02:050
71380rcu_preempt0-21swapper/010:02:050
71380rcu_preempt0-21swapper/009:31:520
71380rcu_preempt0-21swapper/009:31:520
71380rcu_preempt0-21swapper/009:31:520
46050380irq/122-QManpo31645-2110:48:550
46050380irq/122-QManpo31645-2110:48:550
46050380irq/122-QManpo23349-2110:48:550
46050380irq/122-QManpo23349-2110:48:550
46050380irq/122-QManpo21979-2110:48:550
46050380irq/122-QManpo21979-2110:48:550
46050380irq/122-QManpo21979-2110:48:550
46050380irq/122-QManpo14758-2110:48:550
46050380irq/122-QManpo14758-2110:48:550
71370rcu_preempt2262-1kworker/1:0H10:19:441
71370rcu_preempt2262-1kworker/1:0H10:19:441
71370rcu_preempt2262-1kworker/1:0H10:19:441
71370rcu_preempt13532-21ssh09:23:480
71370rcu_preempt13532-21ssh09:23:480
71370rcu_preempt13532-21ssh09:23:480
71370rcu_preempt0-21swapper/212:08:302
71370rcu_preempt0-21swapper/212:08:302
71370rcu_preempt0-21swapper/212:08:302
71370rcu_preempt0-21swapper/112:36:131
71370rcu_preempt0-21swapper/112:36:131
71370rcu_preempt0-21swapper/112:36:131
71370rcu_preempt0-21swapper/112:08:511
71370rcu_preempt0-21swapper/112:08:511
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional