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2026-04-12 - 16:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sun Apr 12, 2026 12:44:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71810rcu_preempt29599-21apt-get12:17:280
71810rcu_preempt29599-21apt-get12:17:280
71810rcu_preempt29599-21apt-get12:17:280
71620rcu_preempt0-21swapper/310:12:203
71620rcu_preempt0-21swapper/310:12:203
71580rcu_preempt8357-21sendmail-msp09:51:472
71580rcu_preempt8357-21sendmail-msp09:51:472
71580rcu_preempt8357-21sendmail-msp09:51:472
71580rcu_preempt8357-21sendmail-msp09:51:472
71550rcu_preempt29464-21copy12:17:203
71550rcu_preempt29464-21copy12:17:203
46050510irq/122-QManpo21871-2110:48:550
46050510irq/122-QManpo21871-2110:48:550
172292510sleep246450irq/118-QMan10:48:552
172292510sleep246450irq/118-QMan10:48:552
46050470irq/122-QManpo1333-2110:48:550
46050470irq/122-QManpo1333-2110:48:550
71460rcu_preempt0-21swapper/212:22:272
71460rcu_preempt0-21swapper/212:22:272
71460rcu_preempt0-21swapper/212:22:272
71460rcu_preempt0-21swapper/211:09:182
71460rcu_preempt0-21swapper/211:09:182
46050460irq/122-QManpo0-210
46050460irq/122-QManpo0-210
71450rcu_preempt0-21swapper/309:17:273
71450rcu_preempt0-21swapper/309:17:273
2300099443cyclictest0-21swapper/110:32:421
2300099443cyclictest0-21swapper/110:32:421
2300099443cyclictest0-21swapper/109:42:161
2300099443cyclictest0-21swapper/109:42:161
2300099443cyclictest0-21swapper/109:42:161
23000994416cyclictest0-21swapper/112:03:281
23000994416cyclictest0-21swapper/112:03:281
23000994414cyclictest1959-21runrttasks09:04:151
23000994414cyclictest1959-21runrttasks09:04:151
23000994414cyclictest1959-21runrttasks09:04:151
71430rcu_preempt0-21swapper/112:17:201
71430rcu_preempt0-21swapper/112:17:201
71430rcu_preempt0-21swapper/109:43:031
71430rcu_preempt0-21swapper/109:43:031
71430rcu_preempt0-21swapper/109:43:031
2300099433cyclictest0-21swapper/110:38:411
2300099433cyclictest0-21swapper/110:38:411
2300099433cyclictest0-21swapper/110:38:411
23000994317cyclictest0-21swapper/111:07:271
23000994317cyclictest0-21swapper/111:07:271
23000994316cyclictest9299-21/usr/sbin/munin12:37:471
23000994316cyclictest9299-21/usr/sbin/munin12:37:471
23000994316cyclictest9299-21/usr/sbin/munin12:37:471
71420rcu_preempt0-21swapper/109:52:281
2300099424cyclictest0-21swapper/109:27:321
2300099424cyclictest0-21swapper/109:27:321
2300099424cyclictest0-21swapper/108:37:421
2300099424cyclictest0-21swapper/108:37:421
2300099424cyclictest0-21swapper/108:12:391
2300099424cyclictest0-21swapper/108:12:391
2300099423cyclictest0-21swapper/110:22:491
2300099423cyclictest0-21swapper/110:22:491
2300099423cyclictest0-21swapper/110:22:491
23000994217cyclictest1705-21/usr/sbin/munin11:27:441
23000994217cyclictest1705-21/usr/sbin/munin11:27:441
23000994217cyclictest1705-21/usr/sbin/munin11:27:441
23000994217cyclictest0-21swapper/111:02:311
23000994217cyclictest0-21swapper/111:02:311
23000994217cyclictest0-21swapper/111:02:311
46050410irq/122-QManpo0-210
46050410irq/122-QManpo0-210
46050410irq/122-QManpo0-210
2300099413cyclictest24366-21irqstats12:07:371
2300099413cyclictest24366-21irqstats12:07:371
2300099413cyclictest24366-21irqstats12:07:371
2300099413cyclictest10627-21ntp_states08:22:401
2300099413cyclictest10627-21ntp_states08:22:401
2300099413cyclictest10627-21ntp_states08:22:401
2300099413cyclictest0-21swapper/112:32:391
2300099413cyclictest0-21swapper/112:32:391
2300099413cyclictest0-21swapper/111:42:551
2300099413cyclictest0-21swapper/111:42:551
2300099413cyclictest0-21swapper/111:42:551
2300099413cyclictest0-21swapper/111:32:281
2300099413cyclictest0-21swapper/111:32:281
2300099413cyclictest0-21swapper/111:17:351
2300099413cyclictest0-21swapper/111:17:351
2300099413cyclictest0-21swapper/110:17:161
2300099413cyclictest0-21swapper/110:17:161
2300099413cyclictest0-21swapper/110:10:511
2300099413cyclictest0-21swapper/110:10:511
2300099413cyclictest0-21swapper/109:47:521
2300099413cyclictest0-21swapper/109:47:521
2300099413cyclictest0-21swapper/109:47:521
2300099413cyclictest0-21swapper/109:22:181
2300099413cyclictest0-21swapper/109:22:181
2300099412cyclictest26237-21memory07:22:391
2300099412cyclictest26237-21memory07:22:391
2300099412cyclictest16149-21ntp_states11:52:411
2300099412cyclictest16149-21ntp_states11:52:411
2300099412cyclictest1225-21ntp_states10:27:391
2300099412cyclictest1225-21ntp_states10:27:391
23000994117cyclictest20281-21ssh10:02:531
23000994117cyclictest20281-21ssh10:02:531
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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