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2026-02-28 - 16:44
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sat Feb 28, 2026 12:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71530rcu_preempt0-21swapper/012:01:430
71530rcu_preempt0-21swapper/012:01:430
46050470irq/122-QManpo1761-2110:48:550
46050470irq/122-QManpo1761-2110:48:550
71460rcu_preempt19516-21copy10:36:380
71460rcu_preempt19516-21copy10:36:380
71450rcu_preempt22490-21kworker/1:108:31:371
71450rcu_preempt22490-21kworker/1:108:31:371
71450rcu_preempt0-21swapper/011:18:320
71450rcu_preempt0-21swapper/011:18:320
71430rcu_preempt0-21swapper/209:46:502
71430rcu_preempt0-21swapper/209:46:502
71430rcu_preempt0-21swapper/209:46:502
71410rcu_preempt20352-21kworker/3:012:01:403
71410rcu_preempt20352-21kworker/3:012:01:403
71410rcu_preempt0-21swapper/309:29:373
71410rcu_preempt0-21swapper/309:29:373
71400rcu_preempt0-21swapper/310:06:323
71400rcu_preempt0-21swapper/310:06:323
71400rcu_preempt0-21swapper/209:42:242
71400rcu_preempt0-21swapper/209:42:242
71400rcu_preempt0-21swapper/209:42:242
71400rcu_preempt0-21swapper/208:46:402
71400rcu_preempt0-21swapper/208:46:402
71390rcu_preempt0-21swapper/308:41:383
71390rcu_preempt0-21swapper/308:41:383
71390rcu_preempt0-21swapper/210:06:402
71390rcu_preempt0-21swapper/210:06:402
71390rcu_preempt0-21swapper/210:06:402
71390rcu_preempt0-21swapper/110:08:071
71390rcu_preempt0-21swapper/110:08:071
71390rcu_preempt0-21swapper/110:08:071
46050390irq/122-QManpo25550-2110:48:550
46050390irq/122-QManpo25550-2110:48:550
71380rcu_preempt980-21sh10:02:382
71380rcu_preempt980-21sh10:02:382
71380rcu_preempt25738-21ssh10:46:501
71380rcu_preempt25738-21ssh10:46:501
71380rcu_preempt14895-21sshd10:27:002
71380rcu_preempt14895-21sshd10:27:002
71380rcu_preempt14895-21sshd10:27:002
71380rcu_preempt0-21swapper/212:19:402
71380rcu_preempt0-21swapper/212:19:402
71380rcu_preempt0-21swapper/212:19:402
71380rcu_preempt0-21swapper/211:09:012
71380rcu_preempt0-21swapper/211:09:012
71380rcu_preempt0-21swapper/210:24:572
71380rcu_preempt0-21swapper/210:24:572
71380rcu_preempt0-21swapper/210:12:412
71380rcu_preempt0-21swapper/210:12:412
71380rcu_preempt0-21swapper/209:26:112
71380rcu_preempt0-21swapper/209:26:112
71380rcu_preempt0-21swapper/209:26:112
71380rcu_preempt0-21swapper/010:44:210
71380rcu_preempt0-21swapper/010:44:210
71380rcu_preempt0-21swapper/010:44:210
46050380irq/122-QManpo761-2110:48:550
46050380irq/122-QManpo761-2110:48:550
46050380irq/122-QManpo761-2110:48:550
46050380irq/122-QManpo5711-2110:48:550
46050380irq/122-QManpo5711-2110:48:550
46050380irq/122-QManpo5711-2110:48:550
253632380sleep015855-1kworker/0:1H12:40:370
253632380sleep015855-1kworker/0:1H12:40:370
253632380sleep015855-1kworker/0:1H12:40:370
105282380sleep028438-1kworker/0:3H09:22:000
105282380sleep028438-1kworker/0:3H09:22:000
105282380sleep028438-1kworker/0:3H09:22:000
71370rcu_preempt838-1kworker/3:1H07:11:293
71370rcu_preempt838-1kworker/3:1H07:11:293
71370rcu_preempt28440-21kworker/3:510:56:403
71370rcu_preempt28440-21kworker/3:510:56:403
71370rcu_preempt28440-21kworker/3:510:56:403
71370rcu_preempt27102-21taskset10:49:182
71370rcu_preempt27102-21taskset10:49:182
71370rcu_preempt22276-21chrt10:41:183
71370rcu_preempt22276-21chrt10:41:183
71370rcu_preempt16298-21ssh12:24:241
71370rcu_preempt16298-21ssh12:24:241
71370rcu_preempt0-21swapper/310:55:573
71370rcu_preempt0-21swapper/310:55:573
71370rcu_preempt0-21swapper/212:25:142
71370rcu_preempt0-21swapper/212:25:142
71370rcu_preempt0-21swapper/212:07:112
71370rcu_preempt0-21swapper/212:07:112
71370rcu_preempt0-21swapper/212:07:112
71370rcu_preempt0-21swapper/210:16:422
71370rcu_preempt0-21swapper/210:16:422
71370rcu_preempt0-21swapper/210:16:422
71370rcu_preempt0-21swapper/210:01:292
71370rcu_preempt0-21swapper/210:01:292
71370rcu_preempt0-21swapper/210:01:292
71370rcu_preempt0-21swapper/110:21:571
71370rcu_preempt0-21swapper/110:21:571
71370rcu_preempt0-21swapper/109:05:281
71370rcu_preempt0-21swapper/109:05:281
46450370irq/118-QManpo0-2110:48:552
46450370irq/118-QManpo0-2110:48:552
46250370irq/120-QManpo0-2110:48:551
46250370irq/120-QManpo0-2110:48:551
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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