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2026-03-15 - 22:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sun Mar 15, 2026 12:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
100650560irq/38-i2c-mpc0-21swapper/010:37:230
100650560irq/38-i2c-mpc0-21swapper/010:37:230
71510rcu_preempt0-21swapper/112:19:351
71510rcu_preempt0-21swapper/112:19:351
71510rcu_preempt0-21swapper/112:19:351
71510rcu_preempt0-21swapper/111:43:121
71510rcu_preempt0-21swapper/111:43:121
71510rcu_preempt0-21swapper/111:43:121
71480rcu_preempt0-21swapper/107:47:251
71480rcu_preempt0-21swapper/107:47:251
71470rcu_preempt0-21swapper/210:44:492
71470rcu_preempt0-21swapper/210:44:492
71450rcu_preempt0-21swapper/012:41:400
71450rcu_preempt0-21swapper/012:41:400
71440rcu_preempt0-21swapper/111:26:491
71440rcu_preempt0-21swapper/111:26:491
71440rcu_preempt0-21swapper/111:26:491
413499443cyclictest0-21swapper/208:11:592
413499443cyclictest0-21swapper/208:11:592
413499442cyclictest5793-21ntp_states09:12:102
413499442cyclictest5793-21ntp_states09:12:102
4134994413cyclictest0-21swapper/208:22:022
4134994413cyclictest0-21swapper/208:22:022
46050430irq/122-QManpo3012-2110:48:550
46050430irq/122-QManpo3012-2110:48:550
413499434cyclictest0-21swapper/211:22:282
413499434cyclictest0-21swapper/211:22:282
413499434cyclictest0-21swapper/211:22:282
413499433cyclictest0-21swapper/212:10:412
413499433cyclictest0-21swapper/212:10:412
413499433cyclictest0-21swapper/211:52:152
413499433cyclictest0-21swapper/211:52:152
413499433cyclictest0-21swapper/211:05:222
413499433cyclictest0-21swapper/211:05:222
413499433cyclictest0-21swapper/211:05:222
4134994316cyclictest28205-21memory08:37:062
4134994316cyclictest28205-21memory08:37:062
4134994316cyclictest28205-21memory08:37:062
46050420irq/122-QManpo14748-2110:48:550
46050420irq/122-QManpo14748-2110:48:550
46050420irq/122-QManpo14748-2110:48:550
413499424cyclictest0-21swapper/212:05:522
413499424cyclictest0-21swapper/212:05:522
413499424cyclictest0-21swapper/212:05:522
413499423cyclictest0-21swapper/211:46:352
413499423cyclictest0-21swapper/211:46:352
413499423cyclictest0-21swapper/211:46:352
413499423cyclictest0-21swapper/210:24:252
413499423cyclictest0-21swapper/210:24:252
413499423cyclictest0-21swapper/210:24:252
413499423cyclictest0-21swapper/210:13:112
413499423cyclictest0-21swapper/210:13:112
413499422cyclictest19622-21irqstats11:32:062
413499422cyclictest19622-21irqstats11:32:062
413499421cyclictest23622-21apt-get12:36:572
413499421cyclictest23622-21apt-get12:36:572
71410rcu_preempt30451-1kworker/0:0H11:16:560
71410rcu_preempt30451-1kworker/0:0H11:16:560
71410rcu_preempt30451-1kworker/0:0H11:16:560
71410rcu_preempt0-21swapper/207:06:562
71410rcu_preempt0-21swapper/207:06:562
413499414cyclictest0-21swapper/209:57:102
413499414cyclictest0-21swapper/209:57:102
413499414cyclictest0-21swapper/209:57:102
413499413cyclictest6821-21munin-run07:21:452
413499413cyclictest6821-21munin-run07:21:452
413499413cyclictest0-21swapper/212:24:572
413499413cyclictest0-21swapper/212:24:572
413499413cyclictest0-21swapper/210:35:252
413499413cyclictest0-21swapper/210:35:252
413499413cyclictest0-21swapper/209:43:532
413499413cyclictest0-21swapper/209:43:532
413499413cyclictest0-21swapper/209:32:142
413499413cyclictest0-21swapper/209:32:142
413499412cyclictest9892-21irqstats10:17:062
413499412cyclictest9892-21irqstats10:17:062
413499412cyclictest9892-21irqstats10:17:062
413499412cyclictest13932-21df_inode09:27:012
413499412cyclictest13932-21df_inode09:27:012
413499412cyclictest1392-21diskstats10:02:032
413499412cyclictest1392-21diskstats10:02:032
4134994118cyclictest0-21swapper/212:17:152
4134994118cyclictest0-21swapper/212:17:152
4134994118cyclictest0-21swapper/212:17:152
4134994116cyclictest10767-21copy11:16:552
4134994116cyclictest10767-21copy11:16:552
4134994116cyclictest10767-21copy11:16:552
71400rcu_preempt3648-21copy09:06:480
71400rcu_preempt3648-21copy09:06:480
71400rcu_preempt0-21swapper/312:10:423
71400rcu_preempt0-21swapper/312:10:423
71400rcu_preempt0-21swapper/211:41:152
71400rcu_preempt0-21swapper/211:41:152
71400rcu_preempt0-21swapper/211:41:152
71400rcu_preempt0-21swapper/211:16:502
71400rcu_preempt0-21swapper/211:16:502
46050400irq/122-QManpo0-210
46050400irq/122-QManpo0-210
46050400irq/122-QManpo0-210
46050400irq/122-QManpo0-210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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