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2026-01-18 - 04:42
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sun Jan 18, 2026 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71720rcu_preempt0-21swapper/122:10:481
71720rcu_preempt0-21swapper/122:10:481
71670rcu_preempt0-21swapper/122:56:181
71670rcu_preempt0-21swapper/122:56:181
71620rcu_preempt0-21swapper/200:13:182
71620rcu_preempt0-21swapper/200:13:182
71480rcu_preempt0-21swapper/223:09:152
71480rcu_preempt0-21swapper/223:09:152
71470rcu_preempt0-21swapper/222:00:592
71470rcu_preempt0-21swapper/222:00:592
71460rcu_preempt4341-21ssh00:10:470
71460rcu_preempt4341-21ssh00:10:470
71420rcu_preempt30002-21sed23:01:112
71420rcu_preempt30002-21sed23:01:112
71410rcu_preempt0-21swapper/000:18:280
71410rcu_preempt0-21swapper/000:18:280
71410rcu_preempt0-21swapper/000:18:280
71400rcu_preempt31910-21taskset21:11:300
71400rcu_preempt31910-21taskset21:11:300
71400rcu_preempt24521-1kworker/0:0H23:00:560
71400rcu_preempt24521-1kworker/0:0H23:00:560
71400rcu_preempt0-21swapper/223:57:442
71400rcu_preempt0-21swapper/223:57:442
71400rcu_preempt0-21swapper/223:57:442
71400rcu_preempt0-21swapper/223:57:442
71400rcu_preempt0-21swapper/123:50:011
71400rcu_preempt0-21swapper/123:50:011
71400rcu_preempt0-21swapper/021:51:480
71400rcu_preempt0-21swapper/021:51:480
71400rcu_preempt0-21swapper/021:51:480
71400rcu_preempt0-21swapper/021:31:420
71400rcu_preempt0-21swapper/021:31:420
71400rcu_preempt0-21swapper/019:15:550
71400rcu_preempt0-21swapper/019:15:550
71390rcu_preempt31527-21irqstats00:01:070
71390rcu_preempt31527-21irqstats00:01:070
71390rcu_preempt31527-21irqstats00:01:070
71390rcu_preempt27077-1kworker/3:0H22:00:543
71390rcu_preempt27077-1kworker/3:0H22:00:543
71390rcu_preempt1958-21snmpd22:29:250
71390rcu_preempt1958-21snmpd22:29:250
71390rcu_preempt10822-21kworker/0:222:01:070
71390rcu_preempt10822-21kworker/0:222:01:070
71390rcu_preempt0-21swapper/200:01:142
71390rcu_preempt0-21swapper/200:01:142
71390rcu_preempt0-21swapper/200:01:142
71390rcu_preempt0-21swapper/121:47:111
71390rcu_preempt0-21swapper/121:47:111
71390rcu_preempt0-21swapper/021:56:130
71390rcu_preempt0-21swapper/021:56:130
71390rcu_preempt0-21swapper/021:56:130
71390rcu_preempt0-21swapper/020:09:400
71390rcu_preempt0-21swapper/020:09:400
46050390irq/122-QManpo29309-2110:48:550
46050390irq/122-QManpo29309-2110:48:550
1599390migration/016656-21sh23:35:430
1599390migration/016656-21sh23:35:430
71380rcu_preempt4374-21ssh00:10:483
71380rcu_preempt4374-21ssh00:10:483
71380rcu_preempt0-21swapper/222:50:582
71380rcu_preempt0-21swapper/222:50:582
71380rcu_preempt0-21swapper/122:52:401
71380rcu_preempt0-21swapper/122:52:401
71380rcu_preempt0-21swapper/122:30:471
71380rcu_preempt0-21swapper/122:30:471
71380rcu_preempt0-21swapper/100:04:221
71380rcu_preempt0-21swapper/100:04:221
71380rcu_preempt0-21swapper/100:04:221
71380rcu_preempt0-21swapper/023:30:480
71380rcu_preempt0-21swapper/023:30:480
71380rcu_preempt0-21swapper/021:25:120
71380rcu_preempt0-21swapper/021:25:120
71380rcu_preempt0-21swapper/021:18:340
71380rcu_preempt0-21swapper/021:18:340
71380rcu_preempt0-21swapper/021:18:340
71380rcu_preempt0-21swapper/019:10:530
71380rcu_preempt0-21swapper/019:10:530
71380rcu_preempt0-21swapper/019:10:530
46050380irq/122-QManpo31093-2110:48:550
46050380irq/122-QManpo31093-2110:48:550
46050380irq/122-QManpo31093-2110:48:550
46050380irq/122-QManpo31093-2110:48:550
71370rcu_preempt6066-21sendmail-msp22:21:471
71370rcu_preempt6066-21sendmail-msp22:21:471
71370rcu_preempt5079-21ssh00:11:121
71370rcu_preempt5079-21ssh00:11:121
71370rcu_preempt4277-21/usr/sbin/munin21:21:091
71370rcu_preempt4277-21/usr/sbin/munin21:21:091
71370rcu_preempt3350-1kworker/1:1H22:19:141
71370rcu_preempt3350-1kworker/1:1H22:19:141
71370rcu_preempt3350-1kworker/1:1H22:19:141
71370rcu_preempt16061-21ssh00:31:230
71370rcu_preempt16061-21ssh00:31:230
71370rcu_preempt13114-21aten_r4power_vo00:25:540
71370rcu_preempt13114-21aten_r4power_vo00:25:540
71370rcu_preempt13114-21aten_r4power_vo00:25:540
71370rcu_preempt0-21swapper/123:40:521
71370rcu_preempt0-21swapper/123:40:521
71370rcu_preempt0-21swapper/122:01:071
71370rcu_preempt0-21swapper/122:01:071
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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