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2025-11-24 - 03:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Mon Nov 24, 2025 00:54:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71560rcu_preempt0-21swapper/222:26:562
71560rcu_preempt0-21swapper/222:26:562
71500rcu_preempt0-21swapper/123:04:131
71500rcu_preempt0-21swapper/123:04:131
71500rcu_preempt0-21swapper/121:39:491
71500rcu_preempt0-21swapper/121:39:491
71490rcu_preempt23628-21kworker/u8:223:15:511
71490rcu_preempt23628-21kworker/u8:223:15:511
71480rcu_preempt0-21swapper/123:36:191
71480rcu_preempt0-21swapper/123:36:191
71480rcu_preempt0-21swapper/122:42:491
71480rcu_preempt0-21swapper/122:42:491
71470rcu_preempt0-21swapper/221:57:102
71470rcu_preempt0-21swapper/221:57:102
71470rcu_preempt0-21swapper/100:18:431
71470rcu_preempt0-21swapper/100:18:431
71460rcu_preempt0-21swapper/123:39:541
71460rcu_preempt0-21swapper/123:39:541
71460rcu_preempt0-21swapper/123:39:541
71460rcu_preempt0-21swapper/100:46:181
71460rcu_preempt0-21swapper/100:46:181
71460rcu_preempt0-21swapper/100:42:351
71460rcu_preempt0-21swapper/100:42:351
71460rcu_preempt0-21swapper/100:42:351
197392460sleep046050irq/122-QMan09:24:360
197392460sleep046050irq/122-QMan09:24:360
197392460sleep046050irq/122-QMan09:24:360
71450rcu_preempt6333-21sshd23:08:461
71450rcu_preempt6333-21sshd23:08:461
71450rcu_preempt6333-21sshd23:08:461
71450rcu_preempt31684-21kworker/1:223:02:281
71450rcu_preempt31684-21kworker/1:223:02:281
71450rcu_preempt19980-21diskmemload00:25:381
71450rcu_preempt19980-21diskmemload00:25:381
71450rcu_preempt0-21swapper/300:35:123
71450rcu_preempt0-21swapper/300:35:123
71450rcu_preempt0-21swapper/300:35:123
71450rcu_preempt0-21swapper/222:32:172
71450rcu_preempt0-21swapper/222:32:172
71450rcu_preempt0-21swapper/222:32:172
71440rcu_preempt20227-21ssh00:33:032
71440rcu_preempt20227-21ssh00:33:032
71440rcu_preempt20227-21ssh00:33:032
71440rcu_preempt0-21swapper/323:20:023
71440rcu_preempt0-21swapper/323:20:023
71440rcu_preempt0-21swapper/323:20:023
71440rcu_preempt0-21swapper/221:30:012
71440rcu_preempt0-21swapper/221:30:012
71440rcu_preempt0-21swapper/200:46:122
71440rcu_preempt0-21swapper/200:46:122
71440rcu_preempt0-21swapper/122:25:311
71440rcu_preempt0-21swapper/122:25:311
71440rcu_preempt0-21swapper/120:57:291
71440rcu_preempt0-21swapper/120:57:291
71430rcu_preempt4574-21ssh01:03:051
71430rcu_preempt4574-21ssh01:03:051
71430rcu_preempt32631-21copy23:57:481
71430rcu_preempt32631-21copy23:57:481
71430rcu_preempt0-21swapper/222:11:042
71430rcu_preempt0-21swapper/222:11:042
71430rcu_preempt0-21swapper/122:51:481
71430rcu_preempt0-21swapper/122:51:481
71430rcu_preempt0-21swapper/122:51:481
71430rcu_preempt0-21swapper/122:33:431
71430rcu_preempt0-21swapper/122:33:431
71430rcu_preempt0-21swapper/122:19:181
71430rcu_preempt0-21swapper/122:19:181
71430rcu_preempt0-21swapper/122:01:041
71430rcu_preempt0-21swapper/122:01:041
71430rcu_preempt0-21swapper/121:28:181
71430rcu_preempt0-21swapper/121:28:181
71430rcu_preempt0-21swapper/100:56:561
71430rcu_preempt0-21swapper/100:56:561
71430rcu_preempt0-21swapper/100:56:561
71420rcu_preempt21232-21kworker/1:123:19:401
71420rcu_preempt21232-21kworker/1:123:19:401
71420rcu_preempt21232-21kworker/1:123:19:401
71420rcu_preempt0-21swapper/200:38:362
71420rcu_preempt0-21swapper/200:38:362
71420rcu_preempt0-21swapper/200:38:362
71420rcu_preempt0-21swapper/123:48:141
71420rcu_preempt0-21swapper/123:48:141
71420rcu_preempt0-21swapper/123:24:161
71420rcu_preempt0-21swapper/123:24:161
71420rcu_preempt0-21swapper/121:45:581
71420rcu_preempt0-21swapper/121:45:581
71420rcu_preempt0-21swapper/121:11:361
71420rcu_preempt0-21swapper/121:11:361
71420rcu_preempt0-21swapper/101:09:511
71420rcu_preempt0-21swapper/101:09:511
71420rcu_preempt0-21swapper/101:01:061
71420rcu_preempt0-21swapper/101:01:061
71420rcu_preempt0-21swapper/101:01:061
71420rcu_preempt0-21swapper/100:06:511
71420rcu_preempt0-21swapper/100:06:511
71410rcu_preempt12432-1kworker/0:1H22:28:080
71410rcu_preempt12432-1kworker/0:1H22:28:080
71410rcu_preempt12432-1kworker/0:1H22:28:080
71410rcu_preempt0-21swapper/321:52:473
71410rcu_preempt0-21swapper/321:52:473
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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