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2026-05-15 - 18:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Fri May 15, 2026 12:44:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
46050490irq/122-QManpo13285-2110:48:550
46050490irq/122-QManpo13285-2110:48:550
71480rcu_preempt0-21swapper/011:09:100
71480rcu_preempt0-21swapper/011:09:100
71480rcu_preempt0-21swapper/011:09:100
71470rcu_preempt0-21swapper/111:43:151
71470rcu_preempt0-21swapper/111:43:151
71470rcu_preempt0-21swapper/111:43:151
71460rcu_preempt0-21swapper/111:37:131
71460rcu_preempt0-21swapper/111:37:131
71430rcu_preempt0-21swapper/209:04:362
71430rcu_preempt0-21swapper/209:04:362
71430rcu_preempt0-21swapper/209:04:362
71430rcu_preempt0-21swapper/111:52:411
71430rcu_preempt0-21swapper/111:52:411
71430rcu_preempt0-21swapper/111:52:411
46650430irq/116-QManpo13387-2110:48:553
46650430irq/116-QManpo13387-2110:48:553
71420rcu_preempt10746-21sh10:03:222
71420rcu_preempt10746-21sh10:03:222
71420rcu_preempt10746-21sh10:03:222
71410rcu_preempt0-21swapper/210:57:562
71410rcu_preempt0-21swapper/210:57:562
71410rcu_preempt0-21swapper/009:07:300
71410rcu_preempt0-21swapper/009:07:300
71410rcu_preempt0-21swapper/009:07:300
46050410irq/122-QManpo21567-2110:48:550
46050410irq/122-QManpo21567-2110:48:550
14370994112cyclictest21066-21irqstats10:23:123
14370994112cyclictest21066-21irqstats10:23:123
14370994112cyclictest21066-21irqstats10:23:123
14370994111cyclictest26017-21irqstats11:33:133
14370994111cyclictest26017-21irqstats11:33:133
71400rcu_preempt0-21swapper/010:47:580
71400rcu_preempt0-21swapper/010:47:580
46050400irq/122-QManpo16826-10
46050400irq/122-QManpo16826-10
71390rcu_preempt9730-1kworker/2:0H11:28:052
71390rcu_preempt9730-1kworker/2:0H11:28:052
71390rcu_preempt9730-1kworker/2:0H11:28:052
71390rcu_preempt9276-21sendmail-msp12:08:410
71390rcu_preempt9276-21sendmail-msp12:08:410
71390rcu_preempt9276-21sendmail-msp12:08:410
71390rcu_preempt0-21swapper/012:01:590
71390rcu_preempt0-21swapper/012:01:590
71390rcu_preempt0-21swapper/010:53:040
71390rcu_preempt0-21swapper/010:53:040
71390rcu_preempt0-21swapper/010:07:570
71390rcu_preempt0-21swapper/010:07:570
71390rcu_preempt0-21swapper/010:07:570
46050390irq/122-QManpo21070-2110:48:550
46050390irq/122-QManpo21070-2110:48:550
46050390irq/122-QManpo21070-2110:48:550
14370993919cyclictest24000-21diskstats09:28:083
14370993919cyclictest24000-21diskstats09:28:083
14370993919cyclictest21555-1kworker/3:0H11:27:463
14370993919cyclictest21555-1kworker/3:0H11:27:463
14370993919cyclictest21555-1kworker/3:0H11:27:463
71380rcu_preempt23124-1kworker/0:3H09:28:190
71380rcu_preempt23124-1kworker/0:3H09:28:190
71380rcu_preempt21603-21ssh09:23:161
71380rcu_preempt21603-21ssh09:23:161
71380rcu_preempt0-21swapper/212:16:392
71380rcu_preempt0-21swapper/212:16:392
71380rcu_preempt0-21swapper/212:16:392
71380rcu_preempt0-21swapper/111:07:561
71380rcu_preempt0-21swapper/111:07:561
71380rcu_preempt0-21swapper/107:57:561
71380rcu_preempt0-21swapper/107:57:561
71380rcu_preempt0-21swapper/010:10:530
71380rcu_preempt0-21swapper/010:10:530
71380rcu_preempt0-21swapper/010:10:530
46450380irq/118-QManpo0-2110:48:552
46450380irq/118-QManpo0-2110:48:552
46250380irq/120-QManpo31562-2110:48:551
46250380irq/120-QManpo31562-2110:48:551
46250380irq/120-QManpo31562-2110:48:551
46050380irq/122-QManpo4260-2110:48:550
46050380irq/122-QManpo4260-2110:48:550
46050380irq/122-QManpo24372-2110:48:550
46050380irq/122-QManpo24372-2110:48:550
46050380irq/122-QManpo21013-2110:48:550
46050380irq/122-QManpo21013-2110:48:550
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
14370993814cyclictest9496-21aten_r4power_cu12:03:063
14370993814cyclictest9496-21aten_r4power_cu12:03:063
14370993814cyclictest9496-21aten_r4power_cu12:03:063
14370993814cyclictest0-21swapper/310:33:023
14370993814cyclictest0-21swapper/310:33:023
98132370sleep08461-1kworker/0:3H10:02:480
98132370sleep08461-1kworker/0:3H10:02:480
71370rcu_preempt22585-21apt-get07:43:151
71370rcu_preempt22585-21apt-get07:43:151
71370rcu_preempt22491-21ssh12:28:200
71370rcu_preempt22491-21ssh12:28:200
71370rcu_preempt0-21swapper/208:18:432
71370rcu_preempt0-21swapper/208:18:432
71370rcu_preempt0-21swapper/208:03:112
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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