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2025-12-23 - 04:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Tue Dec 23, 2025 00:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71700rcu_preempt0-21swapper/222:14:312
71700rcu_preempt0-21swapper/222:14:312
71700rcu_preempt0-21swapper/222:14:312
71650rcu_preempt0-21swapper/223:00:192
71650rcu_preempt0-21swapper/223:00:192
71650rcu_preempt0-21swapper/223:00:192
71590rcu_preempt0-21swapper/323:25:173
71590rcu_preempt0-21swapper/323:25:173
71580rcu_preempt0-21swapper/323:02:503
71580rcu_preempt0-21swapper/323:02:503
71550rcu_preempt0-21swapper/000:15:300
71550rcu_preempt0-21swapper/000:15:300
46050470irq/122-QManpo0-210
46050470irq/122-QManpo0-210
46050470irq/122-QManpo0-210
71460rcu_preempt0-21swapper/122:20:211
71460rcu_preempt0-21swapper/122:20:211
71440rcu_preempt0-21swapper/300:14:593
71440rcu_preempt0-21swapper/300:14:593
71440rcu_preempt0-21swapper/300:14:593
71430rcu_preempt0-21swapper/200:15:372
71430rcu_preempt0-21swapper/200:15:372
71400rcu_preempt1959-21runrttasks22:25:282
71400rcu_preempt1959-21runrttasks22:25:282
71400rcu_preempt1959-21runrttasks22:25:282
71400rcu_preempt0-21swapper/100:20:231
71400rcu_preempt0-21swapper/100:20:231
71400rcu_preempt0-21swapper/100:20:231
71390rcu_preempt30495-21seq23:22:031
71390rcu_preempt30495-21seq23:22:031
71390rcu_preempt0-21swapper/219:40:172
71390rcu_preempt0-21swapper/219:40:172
71390rcu_preempt0-21swapper/219:40:172
71390rcu_preempt0-21swapper/200:36:072
71390rcu_preempt0-21swapper/200:36:072
71390rcu_preempt0-21swapper/200:36:072
71380rcu_preempt31831-1kworker/2:2H21:45:232
71380rcu_preempt31831-1kworker/2:2H21:45:232
71380rcu_preempt0-21swapper/222:44:302
71380rcu_preempt0-21swapper/222:44:302
71380rcu_preempt0-21swapper/022:25:260
71380rcu_preempt0-21swapper/022:25:260
71380rcu_preempt0-21swapper/022:25:260
46050380irq/122-QManpo9078-2110:48:550
46050380irq/122-QManpo9078-2110:48:550
46050380irq/122-QManpo9078-2110:48:550
46050380irq/122-QManpo25280-10
46050380irq/122-QManpo25280-10
46050380irq/122-QManpo25280-10
46050380irq/122-QManpo20083-10
46050380irq/122-QManpo20083-10
46050380irq/122-QManpo1981-2110:48:550
46050380irq/122-QManpo1981-2110:48:550
46050380irq/122-QManpo10511-210
46050380irq/122-QManpo10511-210
213732380sleep020083-1kworker/0:1H21:14:070
213732380sleep020083-1kworker/0:1H21:14:070
71370rcu_preempt1959-21runrttasks19:40:171
71370rcu_preempt1959-21runrttasks19:40:171
71370rcu_preempt1959-21runrttasks19:40:171
71370rcu_preempt0-21swapper/219:10:142
71370rcu_preempt0-21swapper/219:10:142
71370rcu_preempt0-21swapper/219:10:142
71370rcu_preempt0-21swapper/100:15:581
71370rcu_preempt0-21swapper/100:15:581
71370rcu_preempt0-21swapper/021:49:450
71370rcu_preempt0-21swapper/021:49:450
46050370irq/122-QManpo843-2110:48:550
46050370irq/122-QManpo843-2110:48:550
46050370irq/122-QManpo27753-2110:48:550
46050370irq/122-QManpo27753-2110:48:550
46050370irq/122-QManpo27753-2110:48:550
46050370irq/122-QManpo20607-2110:48:550
46050370irq/122-QManpo20607-2110:48:550
46050370irq/122-QManpo18778-2110:48:550
46050370irq/122-QManpo18778-2110:48:550
46050370irq/122-QManpo18130-2110:48:550
46050370irq/122-QManpo18130-2110:48:550
46050370irq/122-QManpo16766-2110:48:550
46050370irq/122-QManpo16766-2110:48:550
46050370irq/122-QManpo16766-2110:48:550
71360rcu_preempt9216-21seq22:45:341
71360rcu_preempt9216-21seq22:45:341
71360rcu_preempt14501-21/usr/sbin/munin23:50:400
71360rcu_preempt14501-21/usr/sbin/munin23:50:400
71360rcu_preempt14501-21/usr/sbin/munin23:50:400
71360rcu_preempt0-21swapper/222:48:122
71360rcu_preempt0-21swapper/222:48:122
71360rcu_preempt0-21swapper/222:35:172
71360rcu_preempt0-21swapper/222:35:172
71360rcu_preempt0-21swapper/220:10:442
71360rcu_preempt0-21swapper/220:10:442
71360rcu_preempt0-21swapper/122:31:421
71360rcu_preempt0-21swapper/122:31:421
71360rcu_preempt0-21swapper/121:20:321
71360rcu_preempt0-21swapper/121:20:321
71360rcu_preempt0-21swapper/023:50:030
71360rcu_preempt0-21swapper/023:50:030
71360rcu_preempt0-21swapper/023:19:060
71360rcu_preempt0-21swapper/023:19:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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