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2026-05-17 - 07:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sun May 17, 2026 00:44:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71620rcu_preempt15943-1kworker/2:0H00:37:592
71620rcu_preempt15943-1kworker/2:0H00:37:592
71620rcu_preempt15943-1kworker/2:0H00:37:592
71540rcu_preempt22025-21sendmail-msp22:58:241
71540rcu_preempt22025-21sendmail-msp22:58:241
71530rcu_preempt0-21swapper/100:10:221
71530rcu_preempt0-21swapper/100:10:221
71500rcu_preempt30740-21wc19:29:550
71500rcu_preempt30740-21wc19:29:550
71480rcu_preempt7276-21spawn19:26:501
71480rcu_preempt7276-21spawn19:26:501
71460rcu_preempt28327-21ssh21:53:221
71460rcu_preempt28327-21ssh21:53:221
71460rcu_preempt28327-21ssh21:53:221
71460rcu_preempt0-21swapper/022:54:130
71460rcu_preempt0-21swapper/022:54:130
71460rcu_preempt0-21swapper/022:54:130
71450rcu_preempt18353-1kworker/2:3H22:48:202
71450rcu_preempt18353-1kworker/2:3H22:48:202
71450rcu_preempt18353-1kworker/2:3H22:48:202
71450rcu_preempt0-21swapper/022:46:220
71450rcu_preempt0-21swapper/022:46:220
71450rcu_preempt0-21swapper/022:46:220
71440rcu_preempt0-21swapper/221:15:072
71440rcu_preempt0-21swapper/221:15:072
71440rcu_preempt0-21swapper/219:34:552
71440rcu_preempt0-21swapper/219:34:552
71430rcu_preempt13828-21spawn19:27:023
71430rcu_preempt13828-21spawn19:27:023
71430rcu_preempt0-21swapper/322:15:413
71430rcu_preempt0-21swapper/322:15:413
71430rcu_preempt0-21swapper/322:15:413
71430rcu_preempt0-21swapper/220:38:192
71430rcu_preempt0-21swapper/220:38:192
71430rcu_preempt0-21swapper/220:38:192
71420rcu_preempt3517-21wc19:32:532
71420rcu_preempt3517-21wc19:32:532
71420rcu_preempt27213-21ssh21:52:440
71420rcu_preempt27213-21ssh21:52:440
71420rcu_preempt27213-21ssh21:52:440
71420rcu_preempt25651-21ssh22:48:210
71420rcu_preempt25651-21ssh22:48:210
71420rcu_preempt25651-21ssh22:48:210
71420rcu_preempt14789-21seq00:28:232
71420rcu_preempt14789-21seq00:28:232
71420rcu_preempt14789-21seq00:28:232
71420rcu_preempt0-21swapper/019:34:260
71420rcu_preempt0-21swapper/019:34:260
71420rcu_preempt0-21swapper/019:26:590
71420rcu_preempt0-21swapper/019:26:590
46450420irq/118-QManpo10795-2110:48:552
46450420irq/118-QManpo10795-2110:48:552
114722420sleep011282-1kworker/0:0H19:10:390
114722420sleep011282-1kworker/0:0H19:10:390
71410rcu_preempt4297-21spawn19:26:282
71410rcu_preempt4297-21spawn19:26:282
71410rcu_preempt0-21swapper/222:30:342
71410rcu_preempt0-21swapper/222:30:342
71410rcu_preempt0-21swapper/221:33:172
71410rcu_preempt0-21swapper/221:33:172
71410rcu_preempt0-21swapper/221:33:172
71410rcu_preempt0-21swapper/200:14:172
71410rcu_preempt0-21swapper/200:14:172
71410rcu_preempt0-21swapper/200:14:172
71410rcu_preempt0-21swapper/022:28:350
71410rcu_preempt0-21swapper/022:28:350
71410rcu_preempt0-21swapper/022:13:140
71410rcu_preempt0-21swapper/022:13:140
71410rcu_preempt0-21swapper/022:13:140
71410rcu_preempt0-21swapper/022:11:020
71410rcu_preempt0-21swapper/022:11:020
71410rcu_preempt0-21swapper/022:11:020
71400rcu_preempt16357-21ssh21:32:370
71400rcu_preempt16357-21ssh21:32:370
71400rcu_preempt16357-21ssh21:32:370
71400rcu_preempt0-21swapper/223:05:182
71400rcu_preempt0-21swapper/223:05:182
71400rcu_preempt0-21swapper/223:05:182
71400rcu_preempt0-21swapper/222:55:242
71400rcu_preempt0-21swapper/222:55:242
71400rcu_preempt0-21swapper/222:55:242
71400rcu_preempt0-21swapper/221:25:062
71400rcu_preempt0-21swapper/221:25:062
71400rcu_preempt0-21swapper/221:25:062
71400rcu_preempt0-21swapper/023:58:330
71400rcu_preempt0-21swapper/023:58:330
71400rcu_preempt0-21swapper/023:58:330
71400rcu_preempt0-21swapper/023:32:560
71400rcu_preempt0-21swapper/023:32:560
71400rcu_preempt0-21swapper/023:32:560
71400rcu_preempt0-21swapper/022:24:270
71400rcu_preempt0-21swapper/022:24:270
71390rcu_preempt8686-1wc19:35:333
71390rcu_preempt8686-1wc19:35:333
71390rcu_preempt3264-21sh19:32:453
71390rcu_preempt3264-21sh19:32:453
71390rcu_preempt3102-21latency_hist22:07:562
71390rcu_preempt3102-21latency_hist22:07:562
71390rcu_preempt3102-21latency_hist22:07:562
71390rcu_preempt28772-21sh23:54:040
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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