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2026-07-02 - 06:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Jul 02, 2026 00:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
46050490irq/122-QManpo20522-2110:48:550
46050490irq/122-QManpo20522-2110:48:550
71460rcu_preempt0-21swapper/219:23:162
71460rcu_preempt0-21swapper/219:23:162
71460rcu_preempt0-21swapper/219:23:162
71440rcu_preempt18966-21kworker/0:423:23:440
71440rcu_preempt18966-21kworker/0:423:23:440
71440rcu_preempt18966-21kworker/0:423:23:440
71440rcu_preempt0-21swapper/222:28:512
71430rcu_preempt0-21swapper/219:26:082
71430rcu_preempt0-21swapper/219:26:082
46650430irq/116-QManpo21184-2110:48:553
46650430irq/116-QManpo21184-2110:48:553
71420rcu_preempt0-21swapper/019:24:130
71420rcu_preempt0-21swapper/019:24:130
46050420irq/122-QManpo30758-2110:48:550
46050420irq/122-QManpo30758-2110:48:550
46050420irq/122-QManpo30758-2110:48:550
71410rcu_preempt31208-21sendmail-msp22:03:300
71410rcu_preempt31208-21sendmail-msp22:03:300
71410rcu_preempt31208-21sendmail-msp22:03:300
71410rcu_preempt31208-21sendmail-msp21:44:130
71410rcu_preempt31208-21sendmail-msp21:44:130
71410rcu_preempt31208-21sendmail-msp21:44:130
71410rcu_preempt0-21swapper/219:16:582
71410rcu_preempt0-21swapper/219:16:582
71410rcu_preempt0-21swapper/219:16:582
71410rcu_preempt0-21swapper/021:41:480
71410rcu_preempt0-21swapper/021:41:480
71400rcu_preempt0-21swapper/223:22:302
71400rcu_preempt0-21swapper/223:22:302
71400rcu_preempt0-21swapper/223:22:302
71400rcu_preempt0-21swapper/222:25:382
71400rcu_preempt0-21swapper/222:25:382
71400rcu_preempt0-21swapper/022:14:230
71400rcu_preempt0-21swapper/022:14:230
71400rcu_preempt0-21swapper/000:06:090
71400rcu_preempt0-21swapper/000:06:090
71400rcu_preempt0-21swapper/000:06:090
46250400irq/120-QManpo20868-2110:48:551
46250400irq/120-QManpo20868-2110:48:551
1599400migration/016759-21taskset21:14:260
1599400migration/016759-21taskset21:14:260
1599400migration/016759-21taskset21:14:260
1599400migration/016759-21taskset21:14:260
71390rcu_preempt0-21swapper/022:24:420
71390rcu_preempt0-21swapper/022:24:420
71390rcu_preempt0-21swapper/022:24:420
71390rcu_preempt0-21swapper/000:24:480
71390rcu_preempt0-21swapper/000:24:480
71390rcu_preempt0-21swapper/000:24:480
46450390irq/118-QManpo21251-2110:48:552
46450390irq/118-QManpo21251-2110:48:552
46050390irq/122-QManpo31192-10
46050390irq/122-QManpo31192-10
46050390irq/122-QManpo31192-10
46050390irq/122-QManpo29502-2110:48:550
46050390irq/122-QManpo29502-2110:48:550
46050390irq/122-QManpo0-210
46050390irq/122-QManpo0-210
46050390irq/122-QManpo0-210
71380rcu_preempt19466-1kworker/0:1H21:24:140
71380rcu_preempt19466-1kworker/0:1H21:24:140
71380rcu_preempt19466-1kworker/0:1H21:24:140
71380rcu_preempt15398-21sh23:15:592
71380rcu_preempt15398-21sh23:15:592
71380rcu_preempt15398-21sh23:15:592
71380rcu_preempt0-21swapper/223:07:372
71380rcu_preempt0-21swapper/223:07:372
71380rcu_preempt0-21swapper/223:07:372
71380rcu_preempt0-21swapper/222:16:232
71380rcu_preempt0-21swapper/222:16:232
46050380irq/122-QManpo29502-2110:48:550
46050380irq/122-QManpo29502-2110:48:550
46050380irq/122-QManpo22924-2110:48:550
46050380irq/122-QManpo22924-2110:48:550
46050380irq/122-QManpo22924-2110:48:550
71370rcu_preempt3901-21irqstats22:54:072
71370rcu_preempt3901-21irqstats22:54:072
71370rcu_preempt21933-21spawn19:16:591
71370rcu_preempt21933-21spawn19:16:591
71370rcu_preempt21933-21spawn19:16:591
71370rcu_preempt18015-21sh00:23:142
71370rcu_preempt18015-21sh00:23:142
71370rcu_preempt18015-21sh00:23:142
71370rcu_preempt11833-21ssh00:10:040
71370rcu_preempt11833-21ssh00:10:040
71370rcu_preempt0-21swapper/222:09:062
71370rcu_preempt0-21swapper/222:09:062
71370rcu_preempt0-21swapper/222:09:062
71370rcu_preempt0-21swapper/222:02:272
71370rcu_preempt0-21swapper/222:02:272
71370rcu_preempt0-21swapper/222:02:272
71370rcu_preempt0-21swapper/221:24:432
71370rcu_preempt0-21swapper/221:24:432
71370rcu_preempt0-21swapper/221:24:432
71370rcu_preempt0-21swapper/200:18:492
71370rcu_preempt0-21swapper/023:04:230
71370rcu_preempt0-21swapper/023:04:230
71370rcu_preempt0-21swapper/023:04:230
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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