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2025-12-09 - 02:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Tue Dec 09, 2025 00:53:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71870rcu_preempt0-21swapper/200:52:072
71870rcu_preempt0-21swapper/200:52:072
71770rcu_preempt0-21swapper/122:40:451
71770rcu_preempt0-21swapper/122:40:451
71770rcu_preempt0-21swapper/122:40:451
71720rcu_preempt0-21swapper/100:48:551
71720rcu_preempt0-21swapper/100:48:551
71710rcu_preempt0-21swapper/323:39:173
71710rcu_preempt0-21swapper/323:39:173
71650rcu_preempt0-21swapper/000:25:140
71650rcu_preempt0-21swapper/000:25:140
71650rcu_preempt0-21swapper/000:25:140
71540rcu_preempt9368-21kworker/0:001:03:220
71540rcu_preempt9368-21kworker/0:001:03:220
2564199541cyclictest32330-21ssh23:47:531
2564199541cyclictest32330-21ssh23:47:531
2564199541cyclictest32330-21ssh23:47:531
2564199462cyclictest21595-21aten_r4power_po23:28:081
2564199462cyclictest21595-21aten_r4power_po23:28:081
2564199454cyclictest0-21swapper/120:12:551
2564199454cyclictest0-21swapper/120:12:551
2564199453cyclictest0-21swapper/122:12:541
2564199453cyclictest0-21swapper/122:12:541
2564199453cyclictest0-21swapper/100:58:231
2564199453cyclictest0-21swapper/100:58:231
2564199443cyclictest0-21swapper/123:10:121
2564199443cyclictest0-21swapper/123:10:121
2564199443cyclictest0-21swapper/123:10:121
2564199443cyclictest0-21swapper/121:39:551
2564199443cyclictest0-21swapper/121:39:551
2564199443cyclictest0-21swapper/121:13:131
2564199443cyclictest0-21swapper/121:13:131
2564199443cyclictest0-21swapper/120:53:121
2564199443cyclictest0-21swapper/120:53:121
2564199442cyclictest7334-21df_inode22:03:111
2564199442cyclictest7334-21df_inode22:03:111
2564199442cyclictest3338-21memory23:53:171
2564199442cyclictest3338-21memory23:53:171
2564199442cyclictest3338-21memory23:53:171
2564199442cyclictest24056-21memory22:33:161
2564199442cyclictest24056-21memory22:33:161
2564199434cyclictest0-21swapper/100:35:141
2564199434cyclictest0-21swapper/100:35:141
2564199434cyclictest0-21swapper/100:35:141
2564199433cyclictest18774-21wget23:23:091
2564199433cyclictest18774-21wget23:23:091
2564199433cyclictest0-21swapper/123:58:161
2564199433cyclictest0-21swapper/123:58:161
2564199433cyclictest0-21swapper/123:00:521
2564199433cyclictest0-21swapper/123:00:521
2564199433cyclictest0-21swapper/123:00:521
2564199433cyclictest0-21swapper/122:46:071
2564199433cyclictest0-21swapper/122:46:071
2564199433cyclictest0-21swapper/122:02:551
2564199433cyclictest0-21swapper/122:02:551
2564199433cyclictest0-21swapper/100:45:321
2564199433cyclictest0-21swapper/100:45:321
2564199433cyclictest0-21swapper/100:18:231
2564199433cyclictest0-21swapper/100:18:231
2564199433cyclictest0-21swapper/100:07:371
2564199433cyclictest0-21swapper/100:07:371
2564199432cyclictest3871-21irqstats00:53:141
2564199432cyclictest3871-21irqstats00:53:141
2564199432cyclictest27336-21irqstats23:38:151
2564199432cyclictest27336-21irqstats23:38:151
2564199432cyclictest16442-21meminfo23:18:171
2564199432cyclictest16442-21meminfo23:18:171
2564199431cyclictest28048-21df_inode00:38:111
2564199431cyclictest28048-21df_inode00:38:111
2564199431cyclictest28048-21df_inode00:38:111
2564199431cyclictest13255-21apt-get23:13:051
2564199431cyclictest13255-21apt-get23:13:051
2564199431cyclictest12824-21df_abs22:13:101
2564199431cyclictest12824-21df_abs22:13:101
2564199431cyclictest12824-21df_abs22:13:101
71420rcu_preempt0-21swapper/221:32:572
71420rcu_preempt0-21swapper/221:32:572
71420rcu_preempt0-21swapper/221:32:572
2564199423cyclictest0-21swapper/122:48:141
2564199423cyclictest0-21swapper/122:48:141
2564199423cyclictest0-21swapper/122:48:141
2564199423cyclictest0-21swapper/121:49:251
2564199423cyclictest0-21swapper/121:49:251
2564199423cyclictest0-21swapper/121:47:571
2564199423cyclictest0-21swapper/121:47:571
2564199423cyclictest0-21swapper/121:03:081
2564199423cyclictest0-21swapper/121:03:081
2564199423cyclictest0-21swapper/100:27:431
2564199423cyclictest0-21swapper/100:27:431
2564199423cyclictest0-21swapper/100:27:431
2564199422cyclictest8210-21memory23:03:191
2564199422cyclictest8210-21memory23:03:191
2564199422cyclictest24828-21ntp_states23:33:211
2564199422cyclictest24828-21ntp_states23:33:211
2564199422cyclictest11381-21df00:08:091
2564199422cyclictest11381-21df00:08:091
71410rcu_preempt0-21swapper/021:33:030
71410rcu_preempt0-21swapper/021:33:030
71410rcu_preempt0-21swapper/001:11:400
71410rcu_preempt0-21swapper/001:11:400
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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