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2025-12-18 - 22:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Dec 18, 2025 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71730rcu_preempt0-21swapper/312:34:073
71730rcu_preempt0-21swapper/312:34:073
71570rcu_preempt0-21swapper/310:41:483
71570rcu_preempt0-21swapper/310:41:483
71540rcu_preempt11450-21tr07:05:302
71540rcu_preempt11450-21tr07:05:302
71500rcu_preempt0-21swapper/312:23:163
71500rcu_preempt0-21swapper/312:23:163
71500rcu_preempt0-21swapper/312:23:163
71500rcu_preempt0-21swapper/311:32:213
71500rcu_preempt0-21swapper/311:32:213
71500rcu_preempt0-21swapper/311:32:213
71470rcu_preempt0-21swapper/308:20:193
71470rcu_preempt0-21swapper/308:20:193
71440rcu_preempt0-21swapper/309:22:143
71440rcu_preempt0-21swapper/309:22:143
71440rcu_preempt0-21swapper/209:49:162
71440rcu_preempt0-21swapper/209:49:162
71430rcu_preempt0-21swapper/107:10:401
71430rcu_preempt0-21swapper/107:10:401
71420rcu_preempt0-21swapper/012:21:060
71420rcu_preempt0-21swapper/012:21:060
71420rcu_preempt0-21swapper/012:21:060
71420rcu_preempt0-21swapper/011:15:410
71420rcu_preempt0-21swapper/011:15:410
71420rcu_preempt0-21swapper/011:15:410
71410rcu_preempt0-21swapper/007:10:110
71410rcu_preempt0-21swapper/007:10:110
71400rcu_preempt0-21swapper/112:25:251
71400rcu_preempt0-21swapper/112:25:251
71400rcu_preempt0-21swapper/112:25:251
71400rcu_preempt0-21swapper/108:05:311
71400rcu_preempt0-21swapper/108:05:311
46050400irq/122-QManpo31443-2110:48:550
46050400irq/122-QManpo31443-2110:48:550
46050400irq/122-QManpo1959-2110:48:550
46050400irq/122-QManpo1959-2110:48:550
46050400irq/122-QManpo19464-10
46050400irq/122-QManpo19464-10
71390rcu_preempt0-21swapper/110:47:191
71390rcu_preempt0-21swapper/110:47:191
71390rcu_preempt0-21swapper/110:47:191
46050390irq/122-QManpo19238-2110:48:550
46050390irq/122-QManpo19238-2110:48:550
1599390migration/07319-21/usr/sbin/munin09:55:230
1599390migration/07319-21/usr/sbin/munin09:55:230
71380rcu_preempt28716-21ssh11:27:091
71380rcu_preempt28716-21ssh11:27:091
71380rcu_preempt0-21swapper/209:41:122
71380rcu_preempt0-21swapper/209:41:122
71380rcu_preempt0-21swapper/111:46:161
71380rcu_preempt0-21swapper/111:46:161
71380rcu_preempt0-21swapper/109:30:311
71380rcu_preempt0-21swapper/109:30:311
71380rcu_preempt0-21swapper/011:57:120
71380rcu_preempt0-21swapper/011:57:120
71380rcu_preempt0-21swapper/011:44:120
71380rcu_preempt0-21swapper/011:44:120
71380rcu_preempt0-21swapper/009:34:210
71380rcu_preempt0-21swapper/009:34:210
46050380irq/122-QManpo16050-2110:48:550
46050380irq/122-QManpo16050-2110:48:550
46050380irq/122-QManpo16050-2110:48:550
71370rcu_preempt4227-21sh12:36:451
71370rcu_preempt4227-21sh12:36:451
71370rcu_preempt32215-21kworker/0:609:25:230
71370rcu_preempt32215-21kworker/0:609:25:230
71370rcu_preempt32215-21kworker/0:609:25:230
71370rcu_preempt24516-21unixbench_multi12:15:372
71370rcu_preempt24516-21unixbench_multi12:15:372
71370rcu_preempt24516-21unixbench_multi12:15:372
71370rcu_preempt13998-21ssh09:10:383
71370rcu_preempt13998-21ssh09:10:383
71370rcu_preempt0-21swapper/310:17:043
71370rcu_preempt0-21swapper/310:17:043
71370rcu_preempt0-21swapper/310:17:043
71370rcu_preempt0-21swapper/309:26:113
71370rcu_preempt0-21swapper/309:26:113
71370rcu_preempt0-21swapper/309:26:113
71370rcu_preempt0-21swapper/208:05:172
71370rcu_preempt0-21swapper/208:05:172
71370rcu_preempt0-21swapper/111:58:121
71370rcu_preempt0-21swapper/111:58:121
71370rcu_preempt0-21swapper/111:05:311
71370rcu_preempt0-21swapper/111:05:311
71370rcu_preempt0-21swapper/110:29:041
71370rcu_preempt0-21swapper/110:29:041
71370rcu_preempt0-21swapper/110:15:501
71370rcu_preempt0-21swapper/110:15:501
71370rcu_preempt0-21swapper/110:15:501
71370rcu_preempt0-21swapper/007:43:420
71370rcu_preempt0-21swapper/007:43:420
46050370irq/122-QManpo9211-2110:48:550
46050370irq/122-QManpo9211-2110:48:550
46050370irq/122-QManpo24737-2110:48:550
46050370irq/122-QManpo24737-2110:48:550
46050370irq/122-QManpo24737-2110:48:550
300042370sleep028278-1kworker/0:1H09:38:560
300042370sleep028278-1kworker/0:1H09:38:560
300042370sleep028278-1kworker/0:1H09:38:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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