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2025-12-25 - 16:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Dec 25, 2025 12:43:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71730rcu_preempt0-21swapper/010:53:010
71730rcu_preempt0-21swapper/010:53:010
71520rcu_preempt0-21swapper/012:01:510
71520rcu_preempt0-21swapper/012:01:510
71450rcu_preempt31723-21copy11:20:342
71450rcu_preempt31723-21copy11:20:342
46050440irq/122-QManpo11289-2110:48:550
46050440irq/122-QManpo11289-2110:48:550
71430rcu_preempt1959-21runrttasks10:08:260
71430rcu_preempt1959-21runrttasks10:08:260
71430rcu_preempt0-21swapper/311:33:313
71430rcu_preempt0-21swapper/311:33:313
71430rcu_preempt0-21swapper/311:33:313
71430rcu_preempt0-21swapper/011:38:300
71430rcu_preempt0-21swapper/011:38:300
71430rcu_preempt0-21swapper/011:38:300
46450430irq/118-QManpo19547-212
46450430irq/118-QManpo19547-212
46450430irq/118-QManpo19547-212
46050430irq/122-QManpo0-210
46050430irq/122-QManpo0-210
46050430irq/122-QManpo0-210
71410rcu_preempt0-21swapper/011:13:530
71410rcu_preempt0-21swapper/011:13:530
71400rcu_preempt8514-21meminfo11:35:363
71400rcu_preempt8514-21meminfo11:35:363
71400rcu_preempt8514-21meminfo11:35:363
71400rcu_preempt0-21swapper/012:34:330
71400rcu_preempt0-21swapper/012:34:330
71400rcu_preempt0-21swapper/009:35:390
71400rcu_preempt0-21swapper/009:35:390
71390rcu_preempt0-21swapper/010:47:030
71390rcu_preempt0-21swapper/010:47:030
71390rcu_preempt0-21swapper/010:47:030
71390rcu_preempt0-21swapper/010:35:420
71390rcu_preempt0-21swapper/010:35:420
71390rcu_preempt0-21swapper/010:35:420
71380rcu_preempt14802-21copy08:45:230
71380rcu_preempt14802-21copy08:45:230
71380rcu_preempt0-21swapper/311:42:203
71380rcu_preempt0-21swapper/311:42:203
71380rcu_preempt0-21swapper/210:45:192
71380rcu_preempt0-21swapper/210:45:192
71380rcu_preempt0-21swapper/210:45:192
71380rcu_preempt0-21swapper/210:15:232
71380rcu_preempt0-21swapper/208:45:272
71380rcu_preempt0-21swapper/208:45:272
71380rcu_preempt0-21swapper/110:25:401
71380rcu_preempt0-21swapper/110:25:401
46050380irq/122-QManpo30565-210
46050380irq/122-QManpo30565-210
46050380irq/122-QManpo23902110:48:550
46050380irq/122-QManpo23902110:48:550
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
71370rcu_preempt27690-21runrttasks09:20:243
71370rcu_preempt27690-21runrttasks09:20:243
71370rcu_preempt23766-21ssh10:10:061
71370rcu_preempt23766-21ssh10:10:061
71370rcu_preempt0-21swapper/211:29:572
71370rcu_preempt0-21swapper/211:29:572
71370rcu_preempt0-21swapper/209:41:202
71370rcu_preempt0-21swapper/209:41:202
71370rcu_preempt0-21swapper/111:04:061
71370rcu_preempt0-21swapper/111:04:061
71370rcu_preempt0-21swapper/110:10:401
71370rcu_preempt0-21swapper/110:10:401
71370rcu_preempt0-21swapper/110:10:401
71370rcu_preempt0-21swapper/012:15:390
71370rcu_preempt0-21swapper/012:15:390
71370rcu_preempt0-21swapper/011:29:160
71370rcu_preempt0-21swapper/011:29:160
71370rcu_preempt0-21swapper/009:11:280
71370rcu_preempt0-21swapper/009:11:280
46050370irq/122-QManpo19581-2110:48:550
46050370irq/122-QManpo19581-2110:48:550
46050370irq/122-QManpo19581-2110:48:550
46050370irq/122-QManpo10060-10
46050370irq/122-QManpo10060-10
46050370irq/122-QManpo10060-10
71360rcu_preempt4187-21df_abs09:35:332
71360rcu_preempt4187-21df_abs09:35:332
71360rcu_preempt29490-1ssh09:22:562
71360rcu_preempt29490-1ssh09:22:562
71360rcu_preempt29490-1ssh09:22:562
71360rcu_preempt25091-21cat07:25:210
71360rcu_preempt16256-21taskset11:49:371
71360rcu_preempt16256-21taskset11:49:371
71360rcu_preempt16256-21taskset11:49:371
71360rcu_preempt12565-1timerandwakeup10:45:472
71360rcu_preempt12565-1timerandwakeup10:45:472
71360rcu_preempt12565-1timerandwakeup10:45:472
71360rcu_preempt0-21swapper/211:36:082
71360rcu_preempt0-21swapper/211:36:082
71360rcu_preempt0-21swapper/211:36:082
71360rcu_preempt0-21swapper/209:50:302
71360rcu_preempt0-21swapper/209:50:302
71360rcu_preempt0-21swapper/112:35:451
71360rcu_preempt0-21swapper/112:35:451
71360rcu_preempt0-21swapper/112:35:451
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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