You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-18 - 14:11
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sun Jan 18, 2026 12:43:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71630rcu_preempt0-21swapper/211:40:212
71630rcu_preempt0-21swapper/211:40:212
71630rcu_preempt0-21swapper/211:40:212
71630rcu_preempt0-21swapper/011:34:330
71630rcu_preempt0-21swapper/011:34:330
71630rcu_preempt0-21swapper/011:34:330
6154995318cyclictest23854-21munin-run08:20:440
6154995318cyclictest23854-21munin-run08:20:440
6154995318cyclictest23854-21munin-run08:20:440
6154995317cyclictest10752-21df_inode09:20:590
6154995317cyclictest10752-21df_inode09:20:590
615499523cyclictest0-21swapper/011:56:560
615499523cyclictest0-21swapper/011:56:560
615499522cyclictest18880-21munin-run09:35:440
615499522cyclictest18880-21munin-run09:35:440
71510rcu_preempt0-21swapper/211:02:122
71510rcu_preempt0-21swapper/211:02:122
615499513cyclictest0-21swapper/011:07:040
615499513cyclictest0-21swapper/011:07:040
615499513cyclictest0-21swapper/008:53:240
615499513cyclictest0-21swapper/008:53:240
615499512cyclictest2122-1kworker/0:1H12:00:560
615499512cyclictest2122-1kworker/0:1H12:00:560
615499512cyclictest2122-1kworker/0:1H12:00:560
615499512cyclictest13761-21meminfo09:26:040
615499512cyclictest13761-21meminfo09:26:040
6154995119cyclictest12104-21ntpq11:16:050
6154995119cyclictest12104-21ntpq11:16:050
6154995119cyclictest12104-21ntpq11:16:050
6154995119cyclictest12104-21ntpq11:16:050
6154995118cyclictest5594-21users09:11:100
6154995118cyclictest5594-21users09:11:100
6154995118cyclictest5594-21users09:11:100
615499503cyclictest14988-21meminfo07:41:040
615499503cyclictest14988-21meminfo07:41:040
615499503cyclictest0-21swapper/011:21:370
615499503cyclictest0-21swapper/011:21:370
615499503cyclictest0-21swapper/010:26:110
615499503cyclictest0-21swapper/010:26:110
6154995017cyclictest29393-21munin-run08:40:440
6154995017cyclictest29393-21munin-run08:40:440
6154995017cyclictest29393-21munin-run08:40:440
615499493cyclictest0-21swapper/012:20:560
615499493cyclictest0-21swapper/012:20:560
615499493cyclictest0-21swapper/012:20:560
615499493cyclictest0-21swapper/012:18:120
615499493cyclictest0-21swapper/012:18:120
615499493cyclictest0-21swapper/012:18:120
615499493cyclictest0-21swapper/012:15:440
615499493cyclictest0-21swapper/012:15:440
615499493cyclictest0-21swapper/010:36:050
615499493cyclictest0-21swapper/010:36:050
615499493cyclictest0-21swapper/010:36:050
615499493cyclictest0-21swapper/010:33:280
615499493cyclictest0-21swapper/010:33:280
615499493cyclictest0-21swapper/010:01:270
615499493cyclictest0-21swapper/010:01:270
615499491cyclictest1958-21snmpd10:22:510
615499491cyclictest1958-21snmpd10:22:510
6154994917cyclictest0-21swapper/012:36:310
6154994917cyclictest0-21swapper/012:36:310
6154994917cyclictest0-21swapper/012:36:310
6154994916cyclictest0-21swapper/009:50:350
6154994916cyclictest0-21swapper/009:50:350
6154994916cyclictest0-21swapper/009:50:350
6154994912cyclictest758-21munin-run10:00:440
6154994912cyclictest758-21munin-run10:00:440
615499484cyclictest0-21swapper/012:35:170
615499484cyclictest0-21swapper/012:35:170
615499484cyclictest0-21swapper/012:35:170
615499484cyclictest0-21swapper/010:09:010
615499484cyclictest0-21swapper/010:09:010
615499483cyclictest0-21swapper/011:01:450
615499483cyclictest0-21swapper/011:01:450
615499483cyclictest0-21swapper/009:16:050
615499483cyclictest0-21swapper/009:16:050
615499483cyclictest0-21swapper/009:16:050
615499482cyclictest30917-21/usr/sbin/munin08:46:020
615499482cyclictest30917-21/usr/sbin/munin08:46:020
615499482cyclictest30094-21processes08:41:090
615499482cyclictest30094-21processes08:41:090
615499482cyclictest26841-21/usr/sbin/munin10:45:560
615499482cyclictest26841-21/usr/sbin/munin10:45:560
615499482cyclictest26841-21/usr/sbin/munin10:45:560
615499482cyclictest0-21swapper/011:00:450
615499482cyclictest0-21swapper/011:00:450
615499482cyclictest0-21swapper/011:00:450
6154994816cyclictest0-21swapper/010:41:210
6154994816cyclictest0-21swapper/010:41:210
615499474cyclictest0-21swapper/011:42:500
615499474cyclictest0-21swapper/011:42:500
615499473cyclictest0-21swapper/012:27:450
615499473cyclictest0-21swapper/012:27:450
615499473cyclictest0-21swapper/012:27:450
615499473cyclictest0-21swapper/007:27:000
615499473cyclictest0-21swapper/007:27:000
615499473cyclictest0-21swapper/007:16:070
615499473cyclictest0-21swapper/007:16:070
615499472cyclictest0-21swapper/010:55:430
615499472cyclictest0-21swapper/010:55:430
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional