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2026-01-29 - 21:07
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Thu Jan 29, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71740rcu_preempt0-21swapper/112:04:261
71740rcu_preempt0-21swapper/112:04:261
71480rcu_preempt16743-21seq07:09:402
71480rcu_preempt16743-21seq07:09:402
71480rcu_preempt0-21swapper/311:22:163
71480rcu_preempt0-21swapper/311:22:163
71480rcu_preempt0-21swapper/311:22:163
46050450irq/122-QManpo0-210
46050450irq/122-QManpo0-210
71440rcu_preempt0-21swapper/111:50:491
71440rcu_preempt0-21swapper/111:50:491
71440rcu_preempt0-21swapper/011:42:140
71440rcu_preempt0-21swapper/011:42:140
46050440irq/122-QManpo24364-2110:48:550
46050440irq/122-QManpo24364-2110:48:550
46050440irq/122-QManpo24364-2110:48:550
46250420irq/120-QManpo16116-2110:48:551
46250420irq/120-QManpo16116-2110:48:551
71410rcu_preempt29445-21ssh09:31:061
71410rcu_preempt29445-21ssh09:31:061
71410rcu_preempt25720-21vmstat11:16:270
71410rcu_preempt25720-21vmstat11:16:270
46050410irq/122-QManpo0-210
46050410irq/122-QManpo0-210
71400rcu_preempt17336-21sh11:02:001
71400rcu_preempt17336-21sh11:02:001
71400rcu_preempt0-21swapper/011:29:100
71400rcu_preempt0-21swapper/011:29:100
71400rcu_preempt0-21swapper/011:12:500
71400rcu_preempt0-21swapper/011:12:500
71400rcu_preempt0-21swapper/010:55:580
71400rcu_preempt0-21swapper/010:55:580
71400rcu_preempt0-21swapper/009:47:410
71400rcu_preempt0-21swapper/009:47:410
71400rcu_preempt0-21swapper/009:47:410
46050400irq/122-QManpo0-210
46050400irq/122-QManpo0-210
100650400irq/38-i2c-mpc32644-21cat08:06:160
100650400irq/38-i2c-mpc32644-21cat08:06:160
71390rcu_preempt9578-1kworker/1:3H10:10:411
71390rcu_preempt9578-1kworker/1:3H10:10:411
71390rcu_preempt0-21swapper/012:39:280
71390rcu_preempt0-21swapper/012:39:280
71390rcu_preempt0-21swapper/012:39:280
71390rcu_preempt0-21swapper/011:10:580
71390rcu_preempt0-21swapper/011:10:580
71390rcu_preempt0-21swapper/010:01:080
71390rcu_preempt0-21swapper/010:01:080
46050390irq/122-QManpo2645-2110:48:550
46050390irq/122-QManpo2645-2110:48:550
46050390irq/122-QManpo2645-2110:48:550
71380rcu_preempt4219-21df08:21:101
71380rcu_preempt4219-21df08:21:101
71380rcu_preempt0-21swapper/307:07:393
71380rcu_preempt0-21swapper/307:07:393
71380rcu_preempt0-21swapper/012:21:500
71380rcu_preempt0-21swapper/012:21:500
71380rcu_preempt0-21swapper/010:11:410
71380rcu_preempt0-21swapper/010:11:410
46050380irq/122-QManpo14992-2110:48:550
46050380irq/122-QManpo14992-2110:48:550
71370rcu_preempt12355-21taskset09:56:302
71370rcu_preempt12355-21taskset09:56:302
71370rcu_preempt12355-21taskset09:56:302
71370rcu_preempt12355-21taskset09:56:302
71370rcu_preempt0-21swapper/211:20:202
71370rcu_preempt0-21swapper/211:20:202
71370rcu_preempt0-21swapper/209:14:252
71370rcu_preempt0-21swapper/209:14:252
71370rcu_preempt0-21swapper/110:26:061
71370rcu_preempt0-21swapper/110:26:061
71370rcu_preempt0-21swapper/012:08:560
71370rcu_preempt0-21swapper/012:08:560
71370rcu_preempt0-21swapper/011:53:240
71370rcu_preempt0-21swapper/011:53:240
71370rcu_preempt0-21swapper/010:39:400
71370rcu_preempt0-21swapper/010:39:400
71370rcu_preempt0-21swapper/008:44:190
71370rcu_preempt0-21swapper/008:44:190
71360rcu_preempt27502-21copy11:21:110
71360rcu_preempt27502-21copy11:21:110
71360rcu_preempt27502-21copy11:21:110
71360rcu_preempt2175-1kworker/0:0H08:21:050
71360rcu_preempt2175-1kworker/0:0H08:21:050
71360rcu_preempt16424-21latency_hist09:05:582
71360rcu_preempt16424-21latency_hist09:05:582
71360rcu_preempt14143-21ssh11:53:331
71360rcu_preempt14143-21ssh11:53:331
71360rcu_preempt12637-1kworker/1:0H10:01:071
71360rcu_preempt12637-1kworker/1:0H10:01:071
71360rcu_preempt0-21swapper/210:52:582
71360rcu_preempt0-21swapper/210:52:582
71360rcu_preempt0-21swapper/210:25:592
71360rcu_preempt0-21swapper/210:25:592
71360rcu_preempt0-21swapper/208:11:072
71360rcu_preempt0-21swapper/208:11:072
71360rcu_preempt0-21swapper/208:11:072
71360rcu_preempt0-21swapper/112:13:351
71360rcu_preempt0-21swapper/112:13:351
71360rcu_preempt0-21swapper/112:13:351
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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