You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-01 - 18:19
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Fri May 01, 2026 12:44:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71490rcu_preempt24396-1kworker/3:0H07:58:033
71490rcu_preempt24396-1kworker/3:0H07:58:033
46050490irq/122-QManpo29312-2110:48:550
46050490irq/122-QManpo29312-2110:48:550
46050490irq/122-QManpo29312-2110:48:550
46050430irq/122-QManpo0-210
46050430irq/122-QManpo0-210
71410rcu_preempt2299migration/210:19:512
71410rcu_preempt2299migration/210:19:512
71410rcu_preempt0-21swapper/010:53:590
71410rcu_preempt0-21swapper/010:53:590
71410rcu_preempt0-21swapper/010:10:080
71410rcu_preempt0-21swapper/010:10:080
71410rcu_preempt0-21swapper/010:10:080
71410rcu_preempt0-21swapper/007:58:050
71410rcu_preempt0-21swapper/007:58:050
71400rcu_preempt4381-21taskset11:56:330
71400rcu_preempt4381-21taskset11:56:330
71400rcu_preempt22466-1kworker/1:1H11:29:171
71400rcu_preempt22466-1kworker/1:1H11:29:171
46250400irq/120-QManpo11861-2110:48:551
46250400irq/120-QManpo11861-2110:48:551
46050400irq/122-QManpo17154-2110:48:550
46050400irq/122-QManpo17154-2110:48:550
71390rcu_preempt27855-1kworker/0:1H11:39:410
71390rcu_preempt27855-1kworker/0:1H11:39:410
71390rcu_preempt0-21swapper/208:54:462
71390rcu_preempt0-21swapper/208:54:462
71390rcu_preempt0-21swapper/111:08:051
71390rcu_preempt0-21swapper/111:08:051
71390rcu_preempt0-21swapper/012:04:520
71390rcu_preempt0-21swapper/012:04:520
71390rcu_preempt0-21swapper/012:04:520
71390rcu_preempt0-21swapper/011:06:270
71390rcu_preempt0-21swapper/011:06:270
71390rcu_preempt0-21swapper/011:06:270
71390rcu_preempt0-21swapper/009:53:520
71390rcu_preempt0-21swapper/009:53:520
71390rcu_preempt0-21swapper/009:53:520
46050390irq/122-QManpo21701-2110:48:550
46050390irq/122-QManpo21701-2110:48:550
71380rcu_preempt6837-1sed08:48:090
71380rcu_preempt6837-1sed08:48:090
71380rcu_preempt3368-21ssh10:53:371
71380rcu_preempt3368-21ssh10:53:371
71380rcu_preempt26121-21ssh10:36:510
71380rcu_preempt26121-21ssh10:36:510
71380rcu_preempt22973-1kworker/1:3H09:32:511
71380rcu_preempt22973-1kworker/1:3H09:32:511
71380rcu_preempt11974-21apt-get07:12:490
71380rcu_preempt11974-21apt-get07:12:490
71380rcu_preempt0-21swapper/210:46:472
71380rcu_preempt0-21swapper/210:46:472
71380rcu_preempt0-21swapper/210:46:472
71380rcu_preempt0-21swapper/207:58:032
71380rcu_preempt0-21swapper/207:58:032
71380rcu_preempt0-21swapper/111:23:051
71380rcu_preempt0-21swapper/111:23:051
71380rcu_preempt0-21swapper/111:23:051
71380rcu_preempt0-21swapper/012:25:270
71380rcu_preempt0-21swapper/012:25:270
71380rcu_preempt0-21swapper/012:25:270
71380rcu_preempt0-21swapper/012:18:260
71380rcu_preempt0-21swapper/012:18:260
71380rcu_preempt0-21swapper/011:17:400
71380rcu_preempt0-21swapper/011:17:400
71380rcu_preempt0-21swapper/009:31:000
71380rcu_preempt0-21swapper/009:31:000
71380rcu_preempt0-21swapper/009:31:000
71380rcu_preempt0-21swapper/008:18:400
71380rcu_preempt0-21swapper/008:18:400
71380rcu_preempt0-21swapper/008:18:400
46050380irq/122-QManpo32285-2110:48:550
46050380irq/122-QManpo32285-2110:48:550
46050380irq/122-QManpo21412-2110:48:550
46050380irq/122-QManpo21412-2110:48:550
46050380irq/122-QManpo21412-2110:48:550
46050380irq/122-QManpo19284-10
46050380irq/122-QManpo19284-10
46050380irq/122-QManpo18707-2110:48:550
46050380irq/122-QManpo18707-2110:48:550
71370rcu_preempt19041-21ssh11:23:000
71370rcu_preempt19041-21ssh11:23:000
71370rcu_preempt19041-21ssh11:23:000
71370rcu_preempt0-21swapper/311:13:053
71370rcu_preempt0-21swapper/311:13:053
71370rcu_preempt0-21swapper/211:49:562
71370rcu_preempt0-21swapper/211:49:562
71370rcu_preempt0-21swapper/112:26:121
71370rcu_preempt0-21swapper/112:26:121
71370rcu_preempt0-21swapper/112:26:121
71370rcu_preempt0-21swapper/112:05:241
71370rcu_preempt0-21swapper/112:05:241
71370rcu_preempt0-21swapper/112:05:241
71370rcu_preempt0-21swapper/111:48:141
71370rcu_preempt0-21swapper/111:48:141
71370rcu_preempt0-21swapper/111:45:101
71370rcu_preempt0-21swapper/111:45:101
71370rcu_preempt0-21swapper/111:45:101
71370rcu_preempt0-21swapper/110:31:311
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional