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2026-03-28 - 20:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sat Mar 28, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
934599542cyclictest9122-21irqstats10:07:190
934599542cyclictest9122-21irqstats10:07:190
934599533cyclictest0-21swapper/009:37:110
934599533cyclictest0-21swapper/009:37:110
934599526cyclictest0-21swapper/011:47:330
934599526cyclictest0-21swapper/011:47:330
934599521cyclictest7554-21apt-get09:02:120
934599521cyclictest7554-21apt-get09:02:120
934599512cyclictest23534-21diskstats08:02:170
934599512cyclictest23534-21diskstats08:02:170
934599512cyclictest22696-21irqstats12:27:200
934599512cyclictest22696-21irqstats12:27:200
71510rcu_preempt0-21swapper/307:47:083
71510rcu_preempt0-21swapper/307:47:083
934599506cyclictest0-21swapper/007:12:260
934599506cyclictest0-21swapper/007:12:260
934599503cyclictest0-21swapper/012:05:320
934599503cyclictest0-21swapper/012:05:320
934599503cyclictest0-21swapper/012:05:320
934599503cyclictest0-21swapper/011:08:260
934599503cyclictest0-21swapper/011:08:260
934599503cyclictest0-21swapper/011:08:260
934599503cyclictest0-21swapper/011:06:480
934599503cyclictest0-21swapper/011:06:480
934599503cyclictest0-21swapper/011:06:480
934599503cyclictest0-21swapper/009:57:100
934599503cyclictest0-21swapper/009:57:100
934599503cyclictest0-21swapper/009:35:000
934599503cyclictest0-21swapper/009:35:000
934599503cyclictest0-21swapper/009:22:120
934599503cyclictest0-21swapper/009:22:120
9345995014cyclictest0-21swapper/009:49:390
9345995014cyclictest0-21swapper/009:49:390
9345995014cyclictest0-21swapper/009:49:390
934599493cyclictest23155-21munin-run08:02:000
934599493cyclictest23155-21munin-run08:02:000
934599493cyclictest0-21swapper/012:22:020
934599493cyclictest0-21swapper/012:22:020
934599493cyclictest0-21swapper/012:22:020
934599493cyclictest0-21swapper/011:19:030
934599493cyclictest0-21swapper/011:19:030
934599493cyclictest0-21swapper/011:19:030
934599493cyclictest0-21swapper/010:37:000
934599493cyclictest0-21swapper/010:37:000
934599493cyclictest0-21swapper/010:26:580
934599493cyclictest0-21swapper/010:26:580
934599493cyclictest0-21swapper/008:47:260
934599493cyclictest0-21swapper/008:47:260
934599492cyclictest29356-21ntp_states08:22:250
934599492cyclictest29356-21ntp_states08:22:250
934599491cyclictest26075-21aten_r4power_cu08:12:150
934599491cyclictest26075-21aten_r4power_cu08:12:150
9345994916cyclictest17145-21munin-run10:22:010
9345994916cyclictest17145-21munin-run10:22:010
9345994914cyclictest18974-21meminfo11:22:220
9345994914cyclictest18974-21meminfo11:22:220
9345994914cyclictest18974-21meminfo11:22:220
9345994914cyclictest0-21swapper/010:27:320
9345994914cyclictest0-21swapper/010:27:320
934599483cyclictest0-21swapper/011:37:030
934599483cyclictest0-21swapper/011:37:030
934599483cyclictest0-21swapper/010:47:490
934599483cyclictest0-21swapper/010:47:490
934599483cyclictest0-21swapper/010:42:070
934599483cyclictest0-21swapper/010:42:070
934599483cyclictest0-21swapper/010:12:140
934599483cyclictest0-21swapper/010:12:140
934599483cyclictest0-21swapper/010:12:140
934599482cyclictest30750-21latency_hist12:42:020
934599482cyclictest30750-21latency_hist12:42:020
934599482cyclictest203292sleep007:51:320
934599482cyclictest203292sleep007:51:320
934599481cyclictest26196-21sh12:32:440
934599481cyclictest26196-21sh12:32:440
934599481cyclictest1958-21snmpd09:46:300
934599481cyclictest1958-21snmpd09:46:300
9345994818cyclictest0-21swapper/012:12:090
9345994818cyclictest0-21swapper/012:12:090
9345994817cyclictest11388-21zcat07:17:260
9345994817cyclictest11388-21zcat07:17:260
9345994815cyclictest19886-21ssh09:27:510
9345994815cyclictest19886-21ssh09:27:510
9345994815cyclictest19886-21ssh09:27:510
9345994814cyclictest21363-21df11:27:150
9345994814cyclictest21363-21df11:27:150
71480rcu_preempt0-21swapper/112:07:041
71480rcu_preempt0-21swapper/112:07:041
71480rcu_preempt0-21swapper/112:07:041
71480rcu_preempt0-21swapper/010:57:100
71480rcu_preempt0-21swapper/010:57:100
71480rcu_preempt0-21swapper/010:57:100
46050480irq/122-QManpo0-210
46050480irq/122-QManpo0-210
934599473cyclictest0-21swapper/012:23:050
934599473cyclictest0-21swapper/012:23:050
934599473cyclictest0-21swapper/012:23:050
934599472cyclictest17584-21apt-get07:42:180
934599472cyclictest17584-21apt-get07:42:180
934599472cyclictest17584-21apt-get07:42:180
934599472cyclictest0-21swapper/007:52:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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