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2026-01-26 - 19:19
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Mon Jan 26, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71640rcu_preempt0-21swapper/012:07:460
71640rcu_preempt0-21swapper/012:07:460
71640rcu_preempt0-21swapper/012:07:460
71630rcu_preempt3588-21runrttasks10:46:012
71630rcu_preempt3588-21runrttasks10:46:012
71630rcu_preempt0-21swapper/007:56:010
71630rcu_preempt0-21swapper/007:56:010
71590rcu_preempt0-21swapper/211:17:142
71590rcu_preempt0-21swapper/211:17:142
71520rcu_preempt0-21swapper/211:48:282
71520rcu_preempt0-21swapper/211:48:282
71520rcu_preempt0-21swapper/008:14:370
71520rcu_preempt0-21swapper/008:14:370
71490rcu_preempt17879-21192.168.115.40-09:16:362
71490rcu_preempt17879-21192.168.115.40-09:16:362
71490rcu_preempt0-21swapper/209:21:132
71490rcu_preempt0-21swapper/209:21:132
71490rcu_preempt0-21swapper/209:21:132
71470rcu_preempt0-21swapper/111:56:181
71470rcu_preempt0-21swapper/111:56:181
46050460irq/122-QManpo0-210
46050460irq/122-QManpo0-210
71450rcu_preempt0-21swapper/010:21:500
71450rcu_preempt0-21swapper/010:21:500
71440rcu_preempt21075-21apt-get07:41:120
71440rcu_preempt21075-21apt-get07:41:120
71440rcu_preempt1959-21runrttasks10:36:162
71440rcu_preempt1959-21runrttasks10:36:162
71440rcu_preempt1959-21runrttasks10:36:162
71430rcu_preempt0-21swapper/212:22:282
71430rcu_preempt0-21swapper/212:22:282
71430rcu_preempt0-21swapper/211:01:512
71430rcu_preempt0-21swapper/211:01:512
71430rcu_preempt0-21swapper/112:36:131
71430rcu_preempt0-21swapper/112:36:131
71430rcu_preempt0-21swapper/112:36:131
71430rcu_preempt0-21swapper/007:26:090
71430rcu_preempt0-21swapper/007:26:090
1276899433cyclictest28604-21df12:26:083
1276899433cyclictest28604-21df12:26:083
1276899433cyclictest0-21swapper/310:06:123
1276899433cyclictest0-21swapper/310:06:123
1276899433cyclictest0-21swapper/310:06:123
1276899433cyclictest0-21swapper/310:01:313
1276899433cyclictest0-21swapper/310:01:313
12768994318cyclictest13280-21meminfo07:11:143
12768994318cyclictest13280-21meminfo07:11:143
12768994318cyclictest13280-21meminfo07:11:143
71420rcu_preempt0-21swapper/011:58:080
71420rcu_preempt0-21swapper/011:58:080
46450420irq/118-QManpo12715-2110:48:552
46450420irq/118-QManpo12715-2110:48:552
1276899424cyclictest0-21swapper/310:40:533
1276899424cyclictest0-21swapper/310:40:533
1276899424cyclictest0-21swapper/310:40:533
1276899423cyclictest0-21swapper/312:01:463
1276899423cyclictest0-21swapper/312:01:463
1276899423cyclictest0-21swapper/312:01:463
1276899423cyclictest0-21swapper/309:06:183
1276899423cyclictest0-21swapper/309:06:183
1276899421cyclictest29598-21/usr/sbin/munin08:11:053
1276899421cyclictest29598-21/usr/sbin/munin08:11:053
71410rcu_preempt9557-21copy08:56:022
71410rcu_preempt9557-21copy08:56:022
71410rcu_preempt0-21swapper/010:54:010
71410rcu_preempt0-21swapper/010:54:010
1276899415cyclictest0-21swapper/309:40:473
1276899415cyclictest0-21swapper/309:40:473
1276899415cyclictest0-21swapper/309:40:473
1276899414cyclictest0-21swapper/310:32:193
1276899414cyclictest0-21swapper/310:32:193
1276899414cyclictest0-21swapper/309:05:523
1276899414cyclictest0-21swapper/309:05:523
1276899414cyclictest0-21swapper/308:36:193
1276899414cyclictest0-21swapper/308:36:193
1276899414cyclictest0-21swapper/308:36:193
1276899413cyclictest11087-21munin-run11:55:523
1276899413cyclictest11087-21munin-run11:55:523
1276899413cyclictest0-21swapper/312:16:083
1276899413cyclictest0-21swapper/312:16:083
1276899413cyclictest0-21swapper/312:16:083
1276899413cyclictest0-21swapper/310:45:363
1276899413cyclictest0-21swapper/310:45:363
1276899413cyclictest0-21swapper/307:41:183
1276899413cyclictest0-21swapper/307:41:183
1276899412cyclictest3405-21apt-get10:46:143
1276899412cyclictest3405-21apt-get10:46:143
1276899412cyclictest26664-21munin-run08:00:533
1276899412cyclictest26664-21munin-run08:00:533
12768994118cyclictest0-21swapper/309:25:173
12768994118cyclictest0-21swapper/309:25:173
12768994118cyclictest0-21swapper/309:25:173
12768994114cyclictest15915-21awk07:21:073
12768994114cyclictest15915-21awk07:21:073
71400rcu_preempt0-21swapper/012:02:020
71400rcu_preempt0-21swapper/012:02:020
71400rcu_preempt0-21swapper/012:02:020
46050400irq/122-QManpo32196-2110:48:550
46050400irq/122-QManpo32196-2110:48:550
46050400irq/122-QManpo32196-2110:48:550
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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