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2025-11-29 - 17:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sat Nov 29, 2025 12:53:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71630rcu_preempt0-21swapper/311:03:593
71630rcu_preempt0-21swapper/311:03:593
71490rcu_preempt0-21swapper/311:32:313
71490rcu_preempt0-21swapper/311:32:313
71490rcu_preempt0-21swapper/311:32:313
71460rcu_preempt0-21swapper/012:00:130
71460rcu_preempt0-21swapper/012:00:130
71460rcu_preempt0-21swapper/010:28:110
71460rcu_preempt0-21swapper/010:28:110
71460rcu_preempt0-21swapper/010:28:110
71440rcu_preempt0-21swapper/112:24:171
71440rcu_preempt0-21swapper/112:24:171
71430rcu_preempt8172-21irqstats11:38:070
71430rcu_preempt8172-21irqstats11:38:070
71430rcu_preempt8172-21irqstats11:38:070
71430rcu_preempt0-21swapper/012:38:010
71430rcu_preempt0-21swapper/012:38:010
71400rcu_preempt0-21swapper/011:09:020
71400rcu_preempt0-21swapper/011:09:020
71400rcu_preempt0-21swapper/010:59:120
71400rcu_preempt0-21swapper/010:59:120
71400rcu_preempt0-21swapper/010:59:120
99650390irq/38-i2c-mpc0-21swapper/012:07:460
99650390irq/38-i2c-mpc0-21swapper/012:07:460
99650390irq/38-i2c-mpc0-21swapper/012:07:460
71390rcu_preempt0-21swapper/308:37:523
71390rcu_preempt0-21swapper/308:37:523
71390rcu_preempt0-21swapper/308:37:523
71390rcu_preempt0-21swapper/110:47:381
71390rcu_preempt0-21swapper/110:47:381
46050390irq/122-QManpo26191-2109:24:360
46050390irq/122-QManpo26191-2109:24:360
46050390irq/122-QManpo26191-2109:24:360
46050390irq/122-QManpo22836-2109:24:360
46050390irq/122-QManpo22836-2109:24:360
46050390irq/122-QManpo22836-2109:24:360
71380rcu_preempt3057-21uname09:08:110
71380rcu_preempt3057-21uname09:08:110
71380rcu_preempt3057-21uname09:08:110
71380rcu_preempt0-21swapper/011:22:490
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
71370rcu_preempt6025-21ssh11:33:120
71370rcu_preempt6025-21ssh11:33:120
71370rcu_preempt4121-21ssh10:27:493
71370rcu_preempt10699-21diskmemload11:53:240
71370rcu_preempt10699-21diskmemload11:53:240
71370rcu_preempt10699-21diskmemload11:53:240
71370rcu_preempt0-21swapper/111:07:481
71370rcu_preempt0-21swapper/111:07:481
71370rcu_preempt0-21swapper/110:25:311
71370rcu_preempt0-21swapper/110:25:311
71370rcu_preempt0-21swapper/110:25:311
71370rcu_preempt0-21swapper/012:18:090
71370rcu_preempt0-21swapper/012:18:090
71370rcu_preempt0-21swapper/012:18:090
71370rcu_preempt0-21swapper/011:46:030
71370rcu_preempt0-21swapper/011:46:030
71370rcu_preempt0-21swapper/010:43:050
71370rcu_preempt0-21swapper/010:43:050
71370rcu_preempt0-21swapper/010:40:120
71370rcu_preempt0-21swapper/010:40:120
46050370irq/122-QManpo28092-2109:24:360
46050370irq/122-QManpo28092-2109:24:360
46050370irq/122-QManpo15757-10
46050370irq/122-QManpo15757-10
46050370irq/122-QManpo14980-2109:24:360
46050370irq/122-QManpo14980-2109:24:360
46050370irq/122-QManpo14980-2109:24:360
46050370irq/122-QManpo10870-2109:24:360
46050370irq/122-QManpo10870-2109:24:360
46050370irq/122-QManpo10870-2109:24:360
71360rcu_preempt8829-21ssh11:38:241
71360rcu_preempt8829-21ssh11:38:241
71360rcu_preempt8829-21ssh11:38:241
71360rcu_preempt0-21swapper/210:52:492
71360rcu_preempt0-21swapper/210:52:492
71360rcu_preempt0-21swapper/210:52:492
71360rcu_preempt0-21swapper/112:47:051
71360rcu_preempt0-21swapper/112:47:051
71360rcu_preempt0-21swapper/110:57:451
71360rcu_preempt0-21swapper/110:57:451
71360rcu_preempt0-21swapper/110:50:401
71360rcu_preempt0-21swapper/110:50:401
71360rcu_preempt0-21swapper/110:50:401
71360rcu_preempt0-21swapper/110:29:301
71360rcu_preempt0-21swapper/110:29:301
71360rcu_preempt0-21swapper/110:29:301
71360rcu_preempt0-21swapper/109:38:021
71360rcu_preempt0-21swapper/109:38:021
71360rcu_preempt0-21swapper/109:38:021
71360rcu_preempt0-21swapper/108:15:391
71360rcu_preempt0-21swapper/108:15:391
71360rcu_preempt0-21swapper/108:15:391
71360rcu_preempt0-21swapper/013:12:470
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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