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2026-02-25 - 23:30
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Wed Feb 25, 2026 12:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71870rcu_preempt0-21swapper/011:52:530
71870rcu_preempt0-21swapper/011:52:530
71750rcu_preempt0-21swapper/210:48:512
71750rcu_preempt0-21swapper/210:48:512
71710rcu_preempt0-21swapper/211:19:022
71710rcu_preempt0-21swapper/211:19:022
71640rcu_preempt0-21swapper/011:22:270
71640rcu_preempt0-21swapper/011:22:270
71510rcu_preempt0-21swapper/011:02:400
71510rcu_preempt0-21swapper/011:02:400
71470rcu_preempt0-21swapper/212:31:492
71470rcu_preempt0-21swapper/212:31:492
1760299472cyclictest26263-21diskstats07:41:421
1760299472cyclictest26263-21diskstats07:41:421
1760299467cyclictest29019-21diskstats10:26:431
1760299467cyclictest29019-21diskstats10:26:431
1760299467cyclictest29019-21diskstats10:26:431
71450rcu_preempt0-21swapper/307:56:373
71450rcu_preempt0-21swapper/307:56:373
1760299454cyclictest0-21swapper/108:11:271
1760299454cyclictest0-21swapper/108:11:271
1760299452cyclictest1959-21runrttasks11:41:551
1760299452cyclictest1959-21runrttasks11:41:551
1760299442cyclictest11902-21/usr/sbin/munin09:56:471
1760299442cyclictest11902-21/usr/sbin/munin09:56:471
1760299442cyclictest11902-21/usr/sbin/munin09:56:471
17602994415cyclictest511-21apt-get09:36:381
17602994415cyclictest511-21apt-get09:36:381
17602994415cyclictest511-21apt-get09:36:381
71430rcu_preempt0-21swapper/112:37:021
71430rcu_preempt0-21swapper/112:37:021
1760299434cyclictest0-21swapper/111:04:011
1760299434cyclictest0-21swapper/111:04:011
1760299433cyclictest0-21swapper/110:11:421
1760299433cyclictest0-21swapper/110:11:421
71420rcu_preempt23145-1kworker/3:2H10:41:513
71420rcu_preempt23145-1kworker/3:2H10:41:513
71420rcu_preempt0-21swapper/210:03:432
71420rcu_preempt0-21swapper/210:03:432
1760299423cyclictest0-21swapper/111:56:271
1760299423cyclictest0-21swapper/111:56:271
1760299423cyclictest0-21swapper/110:42:401
1760299423cyclictest0-21swapper/110:42:401
1760299423cyclictest0-21swapper/108:51:511
1760299423cyclictest0-21swapper/108:51:511
1760299422cyclictest4989-21df_inode08:21:411
1760299422cyclictest4989-21df_inode08:21:411
17602994219cyclictest0-21swapper/111:16:351
17602994219cyclictest0-21swapper/111:16:351
17602994216cyclictest23139-21apt-get10:16:371
17602994216cyclictest23139-21apt-get10:16:371
71410rcu_preempt30647-1kworker/3:1H12:34:073
71410rcu_preempt30647-1kworker/3:1H12:34:073
71410rcu_preempt19217-1kworker/1:0H12:21:401
71410rcu_preempt19217-1kworker/1:0H12:21:401
71410rcu_preempt0-21swapper/207:31:522
71410rcu_preempt0-21swapper/207:31:522
46050410irq/122-QManpo0-210
46050410irq/122-QManpo0-210
1760299414cyclictest0-21swapper/111:31:531
1760299414cyclictest0-21swapper/111:31:531
1760299414cyclictest0-21swapper/108:31:271
1760299414cyclictest0-21swapper/108:31:271
1760299413cyclictest15043-21df_inode10:01:421
1760299413cyclictest15043-21df_inode10:01:421
1760299413cyclictest0-21swapper/112:11:461
1760299413cyclictest0-21swapper/112:11:461
1760299413cyclictest0-21swapper/111:24:331
1760299413cyclictest0-21swapper/111:24:331
1760299413cyclictest0-21swapper/110:22:481
1760299413cyclictest0-21swapper/110:22:481
1760299413cyclictest0-21swapper/109:21:391
1760299413cyclictest0-21swapper/109:21:391
1760299413cyclictest0-21swapper/109:21:271
1760299413cyclictest0-21swapper/109:21:271
1760299413cyclictest0-21swapper/109:21:271
1760299412cyclictest13452-21/usr/sbin/munin10:56:571
1760299412cyclictest13452-21/usr/sbin/munin10:56:571
1599410migration/010778-21runrttasks11:47:570
1599410migration/010778-21runrttasks11:47:570
71400rcu_preempt0-21swapper/211:03:132
71400rcu_preempt0-21swapper/211:03:132
1760299404cyclictest0-21swapper/112:16:451
1760299404cyclictest0-21swapper/112:16:451
1760299404cyclictest0-21swapper/112:16:451
1760299403cyclictest0-21swapper/112:27:331
1760299403cyclictest0-21swapper/112:27:331
1760299403cyclictest0-21swapper/111:36:441
1760299403cyclictest0-21swapper/111:36:441
1760299403cyclictest0-21swapper/109:51:531
1760299403cyclictest0-21swapper/109:51:531
1760299403cyclictest0-21swapper/109:44:461
1760299403cyclictest0-21swapper/109:44:461
1760299402cyclictest31917-21ssh11:28:151
1760299402cyclictest31917-21ssh11:28:151
1760299402cyclictest20629-21df07:21:401
1760299402cyclictest20629-21df07:21:401
17602994017cyclictest0-21swapper/109:50:511
17602994017cyclictest0-21swapper/109:50:511
17602994017cyclictest0-21swapper/109:50:511
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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