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2026-04-05 - 20:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Sun Apr 05, 2026 12:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71490rcu_preempt0-21swapper/209:12:202
71490rcu_preempt0-21swapper/209:12:202
71490rcu_preempt0-21swapper/209:12:202
179092450chrt46450irq/118-QMan10:48:552
179092450chrt46450irq/118-QMan10:48:552
71440rcu_preempt0-21swapper/309:07:203
71440rcu_preempt0-21swapper/309:07:203
71440rcu_preempt0-21swapper/309:07:203
71420rcu_preempt16721-21ssh09:17:270
71420rcu_preempt16721-21ssh09:17:270
71420rcu_preempt0-21swapper/010:49:530
71420rcu_preempt0-21swapper/010:49:530
71420rcu_preempt0-21swapper/010:36:270
71420rcu_preempt0-21swapper/010:36:270
46050420irq/122-QManpo0-210
46050420irq/122-QManpo0-210
71410rcu_preempt31625-1kworker/2:1H09:52:382
71410rcu_preempt31625-1kworker/2:1H09:52:382
71410rcu_preempt23938-21sh09:30:532
71410rcu_preempt23938-21sh09:30:532
46650410irq/116-QManpo12177-2110:48:553
46650410irq/116-QManpo12177-2110:48:553
46450410irq/118-QManpo22102-2110:48:552
46450410irq/118-QManpo22102-2110:48:552
46450410irq/118-QManpo22102-2110:48:552
71400rcu_preempt0-21swapper/107:32:591
71400rcu_preempt0-21swapper/107:32:591
71390rcu_preempt22950-21sh11:24:521
71390rcu_preempt22950-21sh11:24:521
71390rcu_preempt20610-21taskset12:18:181
71390rcu_preempt20610-21taskset12:18:181
71390rcu_preempt20610-21taskset12:18:181
71390rcu_preempt0-21swapper/212:32:132
71390rcu_preempt0-21swapper/212:32:132
71390rcu_preempt0-21swapper/211:51:122
71390rcu_preempt0-21swapper/211:51:122
71390rcu_preempt0-21swapper/209:52:122
71390rcu_preempt0-21swapper/209:52:122
71390rcu_preempt0-21swapper/209:45:072
71390rcu_preempt0-21swapper/209:45:072
71390rcu_preempt0-21swapper/209:45:072
71390rcu_preempt0-21swapper/209:07:252
71390rcu_preempt0-21swapper/209:07:252
71390rcu_preempt0-21swapper/209:07:252
71390rcu_preempt0-21swapper/108:40:141
71390rcu_preempt0-21swapper/108:40:141
71380rcu_preempt19579-1kworker/1:0H11:32:321
71380rcu_preempt19579-1kworker/1:0H11:32:321
71380rcu_preempt11194-21sh11:03:022
71380rcu_preempt11194-21sh11:03:022
71380rcu_preempt11194-21sh11:03:022
71380rcu_preempt0-21swapper/307:32:113
71380rcu_preempt0-21swapper/307:32:113
71380rcu_preempt0-21swapper/211:53:232
71380rcu_preempt0-21swapper/211:53:232
71380rcu_preempt0-21swapper/211:27:322
71380rcu_preempt0-21swapper/211:27:322
71380rcu_preempt0-21swapper/207:43:112
71380rcu_preempt0-21swapper/207:43:112
71380rcu_preempt0-21swapper/110:57:141
71380rcu_preempt0-21swapper/110:57:141
71380rcu_preempt0-21swapper/110:57:141
71380rcu_preempt0-21swapper/012:03:230
71380rcu_preempt0-21swapper/012:03:230
71380rcu_preempt0-21swapper/012:03:230
1226599388cyclictest26113-21munin-run08:02:100
1226599388cyclictest26113-21munin-run08:02:100
1226599388cyclictest26113-21munin-run08:02:100
99750370irq/38-i2c-mpc241ksoftirqd/207:22:112
99750370irq/38-i2c-mpc241ksoftirqd/207:22:112
71370rcu_preempt9042-21grep10:02:141
71370rcu_preempt9042-21grep10:02:141
71370rcu_preempt9042-21grep10:02:141
71370rcu_preempt4127-21runrttasks11:49:140
71370rcu_preempt4127-21runrttasks11:49:140
71370rcu_preempt20067-21sendmail-msp10:25:143
71370rcu_preempt20067-21sendmail-msp10:25:143
71370rcu_preempt20067-21sendmail-msp10:25:143
71370rcu_preempt11583-21apt-get10:07:351
71370rcu_preempt11583-21apt-get10:07:351
71370rcu_preempt0-21swapper/312:17:303
71370rcu_preempt0-21swapper/312:17:303
71370rcu_preempt0-21swapper/312:17:303
71370rcu_preempt0-21swapper/310:48:383
71370rcu_preempt0-21swapper/310:48:383
71370rcu_preempt0-21swapper/212:09:392
71370rcu_preempt0-21swapper/212:09:392
71370rcu_preempt0-21swapper/212:09:392
71370rcu_preempt0-21swapper/210:37:282
71370rcu_preempt0-21swapper/210:37:282
71370rcu_preempt0-21swapper/210:37:282
71370rcu_preempt0-21swapper/210:24:042
71370rcu_preempt0-21swapper/210:24:042
71370rcu_preempt0-21swapper/210:24:042
71370rcu_preempt0-21swapper/112:10:301
71370rcu_preempt0-21swapper/112:10:301
71370rcu_preempt0-21swapper/112:10:301
71370rcu_preempt0-21swapper/111:31:591
71370rcu_preempt0-21swapper/111:31:591
71370rcu_preempt0-21swapper/110:57:301
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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