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2026-02-02 - 08:38
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 376 highest latencies:
System rack4slot4.osadl.org (updated Mon Feb 02, 2026 00:43:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71680rcu_preempt0-21swapper/122:01:451
71680rcu_preempt0-21swapper/122:01:451
71680rcu_preempt0-21swapper/122:01:451
71610rcu_preempt0-21swapper/200:22:242
71610rcu_preempt0-21swapper/200:22:242
71560rcu_preempt0-21swapper/219:41:032
71560rcu_preempt0-21swapper/219:41:032
71560rcu_preempt0-21swapper/219:41:032
71530rcu_preempt0-21swapper/121:41:071
71530rcu_preempt0-21swapper/121:41:071
71500rcu_preempt0-21swapper/221:41:302
71500rcu_preempt0-21swapper/221:41:302
71490rcu_preempt0-21swapper/123:46:091
71490rcu_preempt0-21swapper/123:46:091
71480rcu_preempt0-21swapper/120:13:191
71480rcu_preempt0-21swapper/120:13:191
71460rcu_preempt0-21swapper/221:40:292
71460rcu_preempt0-21swapper/221:40:292
71460rcu_preempt0-21swapper/221:40:292
71460rcu_preempt0-21swapper/122:41:591
71460rcu_preempt0-21swapper/122:41:591
71460rcu_preempt0-21swapper/100:21:151
71460rcu_preempt0-21swapper/100:21:151
71450rcu_preempt0-21swapper/223:48:442
71450rcu_preempt0-21swapper/223:48:442
71450rcu_preempt0-21swapper/019:07:010
71450rcu_preempt0-21swapper/019:07:010
46050450irq/122-QManpo29257-210
46050450irq/122-QManpo29257-210
46050450irq/122-QManpo29257-210
71440rcu_preempt32147-21apt-get23:01:112
71440rcu_preempt32147-21apt-get23:01:112
71440rcu_preempt10103-1kworker/1:1H19:41:141
71440rcu_preempt10103-1kworker/1:1H19:41:141
71440rcu_preempt0-21swapper/322:23:353
71440rcu_preempt0-21swapper/322:23:353
71440rcu_preempt0-21swapper/021:36:360
71440rcu_preempt0-21swapper/021:36:360
71440rcu_preempt0-21swapper/021:36:360
46050440irq/122-QManpo0-210
46050440irq/122-QManpo0-210
46050440irq/122-QManpo0-210
213399442cyclictest819-21diskstats22:06:173
213399442cyclictest819-21diskstats22:06:173
213399442cyclictest819-21diskstats22:06:173
213399442cyclictest12186-21irqstats21:26:213
213399442cyclictest12186-21irqstats21:26:213
213399442cyclictest12186-21irqstats21:26:213
213399441cyclictest8093-21ssh22:18:293
213399441cyclictest8093-21ssh22:18:293
71430rcu_preempt10454-21copy19:41:193
71430rcu_preempt10454-21copy19:41:193
71430rcu_preempt0-21swapper/322:00:293
71430rcu_preempt0-21swapper/322:00:293
71430rcu_preempt0-21swapper/223:41:202
71430rcu_preempt0-21swapper/223:41:202
71430rcu_preempt0-21swapper/223:41:202
71430rcu_preempt0-21swapper/022:51:100
71430rcu_preempt0-21swapper/022:51:100
213399432cyclictest5180-21df19:21:143
213399432cyclictest5180-21df19:21:143
71420rcu_preempt29975-21kworker/3:023:58:443
71420rcu_preempt29975-21kworker/3:023:58:443
71420rcu_preempt29975-21kworker/3:023:58:443
71420rcu_preempt0-21swapper/323:22:293
71420rcu_preempt0-21swapper/323:22:293
71420rcu_preempt0-21swapper/322:56:043
71420rcu_preempt0-21swapper/322:56:043
71420rcu_preempt0-21swapper/200:15:472
71420rcu_preempt0-21swapper/200:15:472
71420rcu_preempt0-21swapper/100:01:121
71420rcu_preempt0-21swapper/100:01:121
71420rcu_preempt0-21swapper/100:01:121
213399423cyclictest0-21swapper/319:26:263
213399423cyclictest0-21swapper/319:26:263
213399422cyclictest3535-21irqstats21:11:193
213399422cyclictest3535-21irqstats21:11:193
213399422cyclictest3535-21irqstats21:11:193
2133994222cyclictest0-21swapper/322:30:593
2133994222cyclictest0-21swapper/322:30:593
213399421cyclictest1959-21runrttasks19:12:563
213399421cyclictest1959-21runrttasks19:12:563
71410rcu_preempt1659-21latency_hist21:06:031
71410rcu_preempt1659-21latency_hist21:06:031
71410rcu_preempt0-21swapper/322:41:533
71410rcu_preempt0-21swapper/322:41:533
71410rcu_preempt0-21swapper/321:44:053
71410rcu_preempt0-21swapper/321:44:053
71410rcu_preempt0-21swapper/223:21:332
71410rcu_preempt0-21swapper/223:21:332
71410rcu_preempt0-21swapper/223:15:132
71410rcu_preempt0-21swapper/223:15:132
71410rcu_preempt0-21swapper/221:32:092
71410rcu_preempt0-21swapper/221:32:092
71410rcu_preempt0-21swapper/221:32:092
71410rcu_preempt0-21swapper/200:04:032
71410rcu_preempt0-21swapper/200:04:032
71410rcu_preempt0-21swapper/200:04:032
71410rcu_preempt0-21swapper/123:21:401
71410rcu_preempt0-21swapper/123:21:401
71410rcu_preempt0-21swapper/122:32:081
71410rcu_preempt0-21swapper/122:32:081
71410rcu_preempt0-21swapper/121:41:571
71410rcu_preempt0-21swapper/121:41:571
71410rcu_preempt0-21swapper/100:36:361
71410rcu_preempt0-21swapper/100:36:361
71410rcu_preempt0-21swapper/100:36:361
46050410irq/122-QManpo4878-2110:48:550
46050410irq/122-QManpo4878-2110:48:550
46050410irq/122-QManpo0-210
46050410irq/122-QManpo0-210
213399413cyclictest0-21swapper/323:48:393
213399413cyclictest0-21swapper/323:48:393
213399413cyclictest0-21swapper/323:06:193
213399413cyclictest0-21swapper/323:06:193
213399413cyclictest0-21swapper/323:06:193
213399413cyclictest0-21swapper/319:35:593
213399413cyclictest0-21swapper/319:35:593
213399413cyclictest0-21swapper/300:11:033
213399413cyclictest0-21swapper/300:11:033
213399412cyclictest30730-21ntp_states22:01:213
213399412cyclictest30730-21ntp_states22:01:213
213399412cyclictest30730-21ntp_states22:01:213
213399412cyclictest26037-21diskstats20:36:153
213399412cyclictest26037-21diskstats20:36:153
213399412cyclictest26037-21diskstats20:36:153
213399412cyclictest22954-21irqstats23:41:183
213399412cyclictest22954-21irqstats23:41:183
213399412cyclictest22954-21irqstats23:41:183
213399412cyclictest15976-21munin-run20:00:593
213399412cyclictest15976-21munin-run20:00:593
213399412cyclictest15976-21munin-run20:00:593
213399411cyclictest1578-21sshd21:46:183
213399411cyclictest1578-21sshd21:46:183
2133994119cyclictest0-21swapper/323:12:513
2133994119cyclictest0-21swapper/323:12:513
71400rcu_preempt0-21swapper/323:40:433
71400rcu_preempt0-21swapper/323:40:433
71400rcu_preempt0-21swapper/323:40:433
71400rcu_preempt0-21swapper/222:42:052
71400rcu_preempt0-21swapper/222:42:052
71400rcu_preempt0-21swapper/221:27:382
71400rcu_preempt0-21swapper/221:27:382
71400rcu_preempt0-21swapper/221:27:382
71400rcu_preempt0-21swapper/219:41:222
71400rcu_preempt0-21swapper/219:41:222
71400rcu_preempt0-21swapper/123:31:311
71400rcu_preempt0-21swapper/123:31:311
71400rcu_preempt0-21swapper/123:16:071
71400rcu_preempt0-21swapper/123:16:071
71400rcu_preempt0-21swapper/123:16:071
71400rcu_preempt0-21swapper/123:02:501
71400rcu_preempt0-21swapper/123:02:501
71400rcu_preempt0-21swapper/122:56:421
71400rcu_preempt0-21swapper/122:56:421
71400rcu_preempt0-21swapper/122:56:421
71400rcu_preempt0-21swapper/022:28:340
71400rcu_preempt0-21swapper/022:28:340
46050400irq/122-QManpo7334-2110:48:550
46050400irq/122-QManpo7334-2110:48:550
213399404cyclictest0-21swapper/322:56:293
213399404cyclictest0-21swapper/322:56:293
213399404cyclictest0-21swapper/322:56:293
213399404cyclictest0-21swapper/321:18:473
213399404cyclictest0-21swapper/321:18:473
213399404cyclictest0-21swapper/321:18:473
213399403cyclictest31205-21munin-run20:56:003
213399403cyclictest31205-21munin-run20:56:003
213399403cyclictest0-21swapper/322:46:203
213399403cyclictest0-21swapper/322:46:203
213399403cyclictest0-21swapper/322:46:203
213399403cyclictest0-21swapper/321:21:243
213399403cyclictest0-21swapper/321:21:243
213399403cyclictest0-21swapper/320:16:113
213399403cyclictest0-21swapper/320:16:113
213399403cyclictest0-21swapper/300:31:333
213399403cyclictest0-21swapper/300:31:333
213399403cyclictest0-21swapper/300:21:533
213399403cyclictest0-21swapper/300:21:533
213399402cyclictest709-21memory21:01:233
213399402cyclictest709-21memory21:01:233
213399402cyclictest4054-21ntp_states22:11:233
213399402cyclictest4054-21ntp_states22:11:233
213399402cyclictest2634-21users00:01:343
213399402cyclictest2634-21users00:01:343
213399402cyclictest2634-21users00:01:343
213399402cyclictest22170-21ntp_states20:21:273
213399402cyclictest22170-21ntp_states20:21:273
213399401cyclictest32600-21meminfo23:01:243
213399401cyclictest32600-21meminfo23:01:243
2133994018cyclictest0-21swapper/323:51:133
2133994018cyclictest0-21swapper/323:51:133
2133994018cyclictest0-21swapper/323:51:133
71390rcu_preempt6359-21ssh22:16:101
71390rcu_preempt6359-21ssh22:16:101
71390rcu_preempt0-21swapper/323:27:033
71390rcu_preempt0-21swapper/323:27:033
71390rcu_preempt0-21swapper/223:51:242
71390rcu_preempt0-21swapper/223:51:242
71390rcu_preempt0-21swapper/223:51:242
71390rcu_preempt0-21swapper/221:18:552
71390rcu_preempt0-21swapper/221:18:552
71390rcu_preempt0-21swapper/221:18:552
71390rcu_preempt0-21swapper/221:12:542
71390rcu_preempt0-21swapper/221:12:542
71390rcu_preempt0-21swapper/221:12:542
71390rcu_preempt0-21swapper/121:32:111
71390rcu_preempt0-21swapper/121:32:111
71390rcu_preempt0-21swapper/121:32:111
71390rcu_preempt0-21swapper/100:09:041
71390rcu_preempt0-21swapper/100:09:041
71390rcu_preempt0-21swapper/023:51:050
71390rcu_preempt0-21swapper/023:51:050
71390rcu_preempt0-21swapper/022:09:490
71390rcu_preempt0-21swapper/022:09:490
71390rcu_preempt0-21swapper/022:09:490
46050390irq/122-QManpo0-210
46050390irq/122-QManpo0-210
46050390irq/122-QManpo0-210
213399393cyclictest0-21swapper/320:45:593
213399393cyclictest0-21swapper/320:45:593
213399393cyclictest0-21swapper/320:31:193
213399393cyclictest0-21swapper/320:31:193
213399393cyclictest0-21swapper/319:46:283
213399393cyclictest0-21swapper/319:46:283
213399392cyclictest8759-21meminfo23:16:213
213399392cyclictest8759-21meminfo23:16:213
213399392cyclictest8759-21meminfo23:16:213
213399392cyclictest22226-21ntp_states00:36:233
213399392cyclictest22226-21ntp_states00:36:233
213399392cyclictest22226-21ntp_states00:36:233
213399392cyclictest19163-21ssh23:35:003
213399392cyclictest19163-21ssh23:35:003
213399392cyclictest16620-21ntp_states20:01:243
213399392cyclictest16620-21ntp_states20:01:243
213399391cyclictest19571-21apt-get21:41:073
213399391cyclictest19571-21apt-get21:41:073
213399391cyclictest0-21swapper/321:31:283
213399391cyclictest0-21swapper/321:31:283
213399391cyclictest0-21swapper/321:31:283
71380rcu_preempt26423-21diskmemload21:51:561
71380rcu_preempt26423-21diskmemload21:51:561
71380rcu_preempt0-21swapper/223:20:252
71380rcu_preempt0-21swapper/223:20:252
71380rcu_preempt0-21swapper/223:20:252
71380rcu_preempt0-21swapper/223:09:262
71380rcu_preempt0-21swapper/223:09:262
71380rcu_preempt0-21swapper/223:09:262
71380rcu_preempt0-21swapper/222:53:052
71380rcu_preempt0-21swapper/222:53:052
71380rcu_preempt0-21swapper/222:47:172
71380rcu_preempt0-21swapper/222:47:172
71380rcu_preempt0-21swapper/222:47:172
71380rcu_preempt0-21swapper/123:15:061
71380rcu_preempt0-21swapper/123:15:061
71380rcu_preempt0-21swapper/122:23:391
71380rcu_preempt0-21swapper/122:23:391
71380rcu_preempt0-21swapper/121:49:501
71380rcu_preempt0-21swapper/121:49:501
71380rcu_preempt0-21swapper/121:39:011
71380rcu_preempt0-21swapper/121:14:491
71380rcu_preempt0-21swapper/121:14:491
71380rcu_preempt0-21swapper/121:14:491
71380rcu_preempt0-21swapper/119:13:031
71380rcu_preempt0-21swapper/119:13:031
71380rcu_preempt0-21swapper/100:30:251
71380rcu_preempt0-21swapper/100:30:251
71380rcu_preempt0-21swapper/100:30:251
71380rcu_preempt0-21swapper/023:24:470
71380rcu_preempt0-21swapper/023:24:470
71380rcu_preempt0-21swapper/022:16:120
71380rcu_preempt0-21swapper/022:16:120
71380rcu_preempt0-21swapper/022:12:070
71380rcu_preempt0-21swapper/022:12:070
71380rcu_preempt0-21swapper/021:26:490
71380rcu_preempt0-21swapper/021:26:490
71380rcu_preempt0-21swapper/021:26:490
46050380irq/122-QManpo16625-210
46050380irq/122-QManpo16625-210
46050380irq/122-QManpo16625-210
213399383cyclictest0-21swapper/300:16:173
213399383cyclictest0-21swapper/300:16:173
213399383cyclictest0-21swapper/300:11:403
213399383cyclictest0-21swapper/300:11:403
213399382cyclictest4015-21memory19:16:193
213399382cyclictest4015-21memory19:16:193
213399382cyclictest25626-21irqstats21:51:193
213399382cyclictest25626-21irqstats21:51:193
213399382cyclictest14931-21/usr/sbin/munin22:31:203
213399382cyclictest14931-21/usr/sbin/munin22:31:203
213399381cyclictest9974-21unixbench_singl19:36:293
213399381cyclictest9974-21unixbench_singl19:36:293
213399381cyclictest9974-21unixbench_singl19:36:293
213399381cyclictest18729-21munin-run20:10:583
213399381cyclictest18729-21munin-run20:10:583
213399381cyclictest15929-21aten_r4power_cu00:26:123
213399381cyclictest15929-21aten_r4power_cu00:26:123
213399381cyclictest15929-21aten_r4power_cu00:26:123
2133993819cyclictest0-21swapper/322:36:303
2133993819cyclictest0-21swapper/322:36:303
2133993819cyclictest0-21swapper/322:36:303
71370rcu_preempt30892-21ssh22:58:152
71370rcu_preempt30892-21ssh22:58:152
71370rcu_preempt30892-21ssh22:58:152
71370rcu_preempt0-21swapper/319:55:593
71370rcu_preempt0-21swapper/319:55:593
71370rcu_preempt0-21swapper/223:59:412
71370rcu_preempt0-21swapper/223:59:412
71370rcu_preempt0-21swapper/223:59:412
71370rcu_preempt0-21swapper/222:40:522
71370rcu_preempt0-21swapper/222:40:522
71370rcu_preempt0-21swapper/222:40:522
71370rcu_preempt0-21swapper/222:21:302
71370rcu_preempt0-21swapper/222:21:302
71370rcu_preempt0-21swapper/222:05:392
71370rcu_preempt0-21swapper/222:05:392
71370rcu_preempt0-21swapper/222:05:392
71370rcu_preempt0-21swapper/221:56:532
71370rcu_preempt0-21swapper/221:56:532
71370rcu_preempt0-21swapper/221:54:232
71370rcu_preempt0-21swapper/221:54:232
71370rcu_preempt0-21swapper/219:57:282
71370rcu_preempt0-21swapper/219:57:282
71370rcu_preempt0-21swapper/219:57:282
71370rcu_preempt0-21swapper/219:49:232
71370rcu_preempt0-21swapper/219:49:232
71370rcu_preempt0-21swapper/200:34:362
71370rcu_preempt0-21swapper/200:34:362
71370rcu_preempt0-21swapper/123:42:101
71370rcu_preempt0-21swapper/123:42:101
71370rcu_preempt0-21swapper/123:42:101
71370rcu_preempt0-21swapper/121:20:551
71370rcu_preempt0-21swapper/121:20:551
71370rcu_preempt0-21swapper/121:20:551
71370rcu_preempt0-21swapper/120:26:591
71370rcu_preempt0-21swapper/120:26:591
71370rcu_preempt0-21swapper/119:21:051
46050370irq/122-QManpo32329-2110:48:550
46050370irq/122-QManpo32329-2110:48:550
46050370irq/122-QManpo30025-2110:48:550
46050370irq/122-QManpo30025-2110:48:550
46050370irq/122-QManpo30025-2110:48:550
46050370irq/122-QManpo15196-2110:48:550
46050370irq/122-QManpo15196-2110:48:550
46050370irq/122-QManpo0-210
46050370irq/122-QManpo0-210
46050370irq/122-QManpo0-210
46050370irq/122-QManpo0-210
213399374cyclictest0-21swapper/321:40:333
71360rcu_preempt2928-21ssh23:06:231
71360rcu_preempt2928-21ssh23:06:231
71360rcu_preempt2928-21ssh23:06:231
71360rcu_preempt25250-21runrttasks21:51:052
71360rcu_preempt0-21swapper/223:33:372
71360rcu_preempt0-21swapper/223:33:372
71360rcu_preempt0-21swapper/222:35:272
71360rcu_preempt0-21swapper/222:35:272
71360rcu_preempt0-21swapper/222:28:292
71360rcu_preempt0-21swapper/222:28:292
71360rcu_preempt0-21swapper/222:16:242
71360rcu_preempt0-21swapper/222:16:242
71360rcu_preempt0-21swapper/221:06:102
71360rcu_preempt0-21swapper/221:06:102
71360rcu_preempt0-21swapper/220:24:462
71360rcu_preempt0-21swapper/220:24:462
71360rcu_preempt0-21swapper/219:28:092
71360rcu_preempt0-21swapper/219:28:092
71360rcu_preempt0-21swapper/200:37:032
71360rcu_preempt0-21swapper/200:37:032
71360rcu_preempt0-21swapper/200:37:032
71360rcu_preempt0-21swapper/200:17:202
71360rcu_preempt0-21swapper/200:17:202
71360rcu_preempt0-21swapper/123:53:031
71360rcu_preempt0-21swapper/123:53:031
71360rcu_preempt0-21swapper/123:53:031
71360rcu_preempt0-21swapper/123:28:551
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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