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2026-04-28 - 13:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot4.osadl.org (updated Tue Apr 28, 2026 00:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71680rcu_preempt0-21swapper/021:35:180
71680rcu_preempt0-21swapper/021:35:180
71670rcu_preempt0-21swapper/000:30:190
71670rcu_preempt0-21swapper/000:30:190
71670rcu_preempt0-21swapper/000:30:190
71630rcu_preempt0-21swapper/019:21:200
71630rcu_preempt0-21swapper/019:21:200
71590rcu_preempt0-21swapper/000:09:190
71590rcu_preempt0-21swapper/000:09:190
71590rcu_preempt0-21swapper/000:09:190
71550rcu_preempt0-21swapper/200:00:172
71550rcu_preempt0-21swapper/200:00:172
71470rcu_preempt0-21swapper/322:23:463
71470rcu_preempt0-21swapper/322:23:463
71460rcu_preempt0-21swapper/021:29:280
71460rcu_preempt0-21swapper/021:29:280
71460rcu_preempt0-21swapper/021:29:280
46250450irq/120-QManpo7789-2110:48:551
46250450irq/120-QManpo7789-2110:48:551
46050450irq/122-QManpo8438-2110:48:550
46050450irq/122-QManpo8438-2110:48:550
71420rcu_preempt9141-21kworker/1:022:12:541
71420rcu_preempt9141-21kworker/1:022:12:541
71420rcu_preempt8102-21ssh00:06:030
71420rcu_preempt8102-21ssh00:06:030
71420rcu_preempt8102-21ssh00:06:030
71420rcu_preempt0-21swapper/322:47:443
71420rcu_preempt0-21swapper/322:47:443
71420rcu_preempt0-21swapper/123:23:091
71420rcu_preempt0-21swapper/123:23:091
71420rcu_preempt0-21swapper/023:51:030
71420rcu_preempt0-21swapper/023:51:030
71420rcu_preempt0-21swapper/023:51:030
71420rcu_preempt0-21swapper/022:51:230
71420rcu_preempt0-21swapper/022:51:230
71410rcu_preempt32016-1kworker/0:0H23:08:040
71410rcu_preempt32016-1kworker/0:0H23:08:040
71410rcu_preempt32016-1kworker/0:0H23:08:040
71410rcu_preempt29235-21sh21:47:363
71410rcu_preempt29235-21sh21:47:363
71410rcu_preempt22308-21sh00:32:382
71410rcu_preempt22308-21sh00:32:382
71410rcu_preempt22308-21sh00:32:382
71400rcu_preempt28593-21sh23:43:160
71400rcu_preempt28593-21sh23:43:160
71400rcu_preempt21342-1kworker/1:0H23:34:271
71400rcu_preempt21342-1kworker/1:0H23:34:271
71400rcu_preempt12716-21kworker/3:019:24:053
71400rcu_preempt12716-21kworker/3:019:24:053
71400rcu_preempt12716-21kworker/3:019:24:053
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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