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2025-11-16 - 11:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot4.osadl.org (updated Sun Nov 16, 2025 00:53:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71660rcu_preempt0-21swapper/020:02:540
71660rcu_preempt0-21swapper/020:02:540
71660rcu_preempt0-21swapper/020:02:540
71600rcu_preempt0-21swapper/223:14:222
71600rcu_preempt0-21swapper/223:14:222
71590rcu_preempt0-21swapper/221:39:572
71590rcu_preempt0-21swapper/221:39:572
71520rcu_preempt0-21swapper/223:18:172
71520rcu_preempt0-21swapper/223:18:172
71500rcu_preempt0-21swapper/221:47:502
71500rcu_preempt0-21swapper/221:47:502
71430rcu_preempt0-21swapper/023:28:460
71430rcu_preempt0-21swapper/023:28:460
71400rcu_preempt0-21swapper/023:24:470
71400rcu_preempt0-21swapper/023:24:470
71400rcu_preempt0-21swapper/000:12:500
71400rcu_preempt0-21swapper/000:12:500
71400rcu_preempt0-21swapper/000:12:500
71390rcu_preempt0-21swapper/120:43:001
71390rcu_preempt0-21swapper/120:43:001
71390rcu_preempt0-21swapper/120:43:001
71390rcu_preempt0-21swapper/021:41:180
71390rcu_preempt0-21swapper/021:41:180
71380rcu_preempt0-21swapper/323:16:243
71380rcu_preempt0-21swapper/323:16:243
71380rcu_preempt0-21swapper/023:07:340
71380rcu_preempt0-21swapper/020:56:090
71380rcu_preempt0-21swapper/020:56:090
71380rcu_preempt0-21swapper/000:20:520
71380rcu_preempt0-21swapper/000:20:520
46050380irq/122-QManpo18051-2109:24:360
46050380irq/122-QManpo18051-2109:24:360
71370rcu_preempt26030-21latency_hist00:37:310
71370rcu_preempt26030-21latency_hist00:37:310
71370rcu_preempt0-21swapper/222:45:132
71370rcu_preempt0-21swapper/222:45:132
71370rcu_preempt0-21swapper/222:40:342
71370rcu_preempt0-21swapper/222:40:342
71370rcu_preempt0-21swapper/222:40:342
71370rcu_preempt0-21swapper/219:52:552
71370rcu_preempt0-21swapper/219:52:552
71370rcu_preempt0-21swapper/123:07:481
71370rcu_preempt0-21swapper/123:07:481
71370rcu_preempt0-21swapper/123:03:591
71370rcu_preempt0-21swapper/123:03:591
71370rcu_preempt0-21swapper/122:37:011
71370rcu_preempt0-21swapper/122:37:011
71370rcu_preempt0-21swapper/100:38:161
71370rcu_preempt0-21swapper/100:38:161
71370rcu_preempt0-21swapper/020:27:450
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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