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2026-04-18 - 08:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot4.osadl.org (updated Sat Apr 18, 2026 00:44:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71660rcu_preempt0-21swapper/323:32:363
71660rcu_preempt0-21swapper/323:32:363
71590rcu_preempt0-21swapper/000:24:170
71590rcu_preempt0-21swapper/000:24:170
71590rcu_preempt0-21swapper/000:24:170
71580rcu_preempt0-21swapper/121:28:361
71580rcu_preempt0-21swapper/121:28:361
71580rcu_preempt0-21swapper/121:28:361
46050510irq/122-QManpo31559-2110:48:550
46050510irq/122-QManpo31559-2110:48:550
71470rcu_preempt0-21swapper/323:02:423
71470rcu_preempt0-21swapper/323:02:423
71470rcu_preempt0-21swapper/323:02:423
71470rcu_preempt0-21swapper/100:05:011
71470rcu_preempt0-21swapper/100:05:011
71470rcu_preempt0-21swapper/100:05:011
71440rcu_preempt11228-21ssh00:27:041
71440rcu_preempt11228-21ssh00:27:041
71440rcu_preempt11228-21ssh00:27:041
71440rcu_preempt0-21swapper/221:52:482
71440rcu_preempt0-21swapper/221:52:482
71440rcu_preempt0-21swapper/221:52:482
71430rcu_preempt0-21swapper/321:52:343
71430rcu_preempt0-21swapper/321:52:343
71430rcu_preempt0-21swapper/321:52:343
46250430irq/120-QManpo32423-2110:48:551
46250430irq/120-QManpo32423-2110:48:551
71420rcu_preempt27499-21ssh21:59:481
71420rcu_preempt27499-21ssh21:59:481
71420rcu_preempt27499-21ssh21:59:481
71420rcu_preempt0-21swapper/322:57:493
71420rcu_preempt0-21swapper/322:57:493
71420rcu_preempt0-21swapper/322:57:493
71420rcu_preempt0-21swapper/222:43:072
71420rcu_preempt0-21swapper/222:43:072
71410rcu_preempt13464-21ssh23:32:361
71410rcu_preempt13464-21ssh23:32:361
71410rcu_preempt0-21swapper/221:52:012
71410rcu_preempt0-21swapper/221:52:012
71410rcu_preempt0-21swapper/221:52:012
71410rcu_preempt0-21swapper/121:36:071
71410rcu_preempt0-21swapper/121:36:071
71410rcu_preempt0-21swapper/121:36:071
46650410irq/116-QManpo13927-2110:48:553
46650410irq/116-QManpo13927-2110:48:553
46050410irq/122-QManpo30717-2110:48:550
46050410irq/122-QManpo30717-2110:48:550
99750400irq/38-i2c-mpc13887-21ssh21:35:340
99750400irq/38-i2c-mpc13887-21ssh21:35:340
99750400irq/38-i2c-mpc13887-21ssh21:35:340
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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