You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-09 - 11:58
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot4.osadl.org (updated Sun Nov 09, 2025 00:53:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71620rcu_preempt0-21swapper/022:55:590
71620rcu_preempt0-21swapper/022:55:590
71600rcu_preempt0-21swapper/022:03:220
71600rcu_preempt0-21swapper/022:03:220
71510rcu_preempt4663-21ssh00:52:260
71510rcu_preempt4663-21ssh00:52:260
71460rcu_preempt19488-21kworker/2:020:52:472
71460rcu_preempt19488-21kworker/2:020:52:472
71460rcu_preempt19488-21kworker/2:020:52:472
30372994610cyclictest8626-21runrttasks22:45:181
30372994610cyclictest8626-21runrttasks22:45:181
71450rcu_preempt0-21swapper/121:48:511
71450rcu_preempt0-21swapper/121:48:511
71440rcu_preempt0-21swapper/023:40:110
71440rcu_preempt0-21swapper/023:40:110
71430rcu_preempt0-21swapper/222:42:362
71430rcu_preempt0-21swapper/222:42:362
71430rcu_preempt0-21swapper/221:33:502
71430rcu_preempt0-21swapper/221:33:502
71430rcu_preempt0-21swapper/000:52:410
71430rcu_preempt0-21swapper/000:52:410
71430rcu_preempt0-21swapper/000:42:170
71430rcu_preempt0-21swapper/000:42:170
46050420irq/122-QManpo26016-10
46050420irq/122-QManpo26016-10
3037299422cyclictest8509-21df_inode22:57:361
3037299422cyclictest8509-21df_inode22:57:361
3037299422cyclictest30784-21irqstats21:37:411
3037299422cyclictest30784-21irqstats21:37:411
3037299422cyclictest30784-21irqstats21:37:411
3037299422cyclictest16558-21munin-run22:12:201
3037299422cyclictest16558-21munin-run22:12:201
30372994210cyclictest0-21swapper/123:27:331
30372994210cyclictest0-21swapper/123:27:331
71410rcu_preempt22330-21/usr/sbin/munin22:22:401
71410rcu_preempt22330-21/usr/sbin/munin22:22:401
71410rcu_preempt22330-21/usr/sbin/munin22:22:401
71410rcu_preempt0-21swapper/022:27:590
71410rcu_preempt0-21swapper/022:27:590
3037299414cyclictest0-21swapper/122:32:501
3037299414cyclictest0-21swapper/122:32:501
3037299413cyclictest0-21swapper/121:27:451
3037299413cyclictest0-21swapper/121:27:451
3037299413cyclictest0-21swapper/121:02:431
3037299413cyclictest0-21swapper/121:02:431
3037299413cyclictest0-21swapper/121:02:431
3037299413cyclictest0-21swapper/120:37:361
3037299413cyclictest0-21swapper/120:37:361
3037299413cyclictest0-21swapper/120:17:401
3037299413cyclictest0-21swapper/120:17:401
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional