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2026-04-19 - 22:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot4.osadl.org (updated Sun Apr 19, 2026 12:44:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71670rcu_preempt0-21swapper/211:15:272
71670rcu_preempt0-21swapper/211:15:272
71450rcu_preempt0-21swapper/210:10:502
71450rcu_preempt0-21swapper/210:10:502
71450rcu_preempt0-21swapper/011:46:100
71450rcu_preempt0-21swapper/011:46:100
71450rcu_preempt0-21swapper/011:46:100
46050450irq/122-QManpo0-210
46050450irq/122-QManpo0-210
46050450irq/122-QManpo0-210
71440rcu_preempt0-21swapper/209:44:142
71440rcu_preempt0-21swapper/209:44:142
71440rcu_preempt0-21swapper/010:45:110
71440rcu_preempt0-21swapper/010:45:110
71430rcu_preempt0-21swapper/112:29:581
71430rcu_preempt0-21swapper/112:29:581
46050430irq/122-QManpo31372-2110:48:550
46050430irq/122-QManpo31372-2110:48:550
71420rcu_preempt0-21swapper/110:48:331
71420rcu_preempt0-21swapper/110:48:331
71420rcu_preempt0-21swapper/110:22:551
71420rcu_preempt0-21swapper/110:22:551
71420rcu_preempt0-21swapper/110:22:551
46650420irq/116-QManpo7225-2110:48:553
46650420irq/116-QManpo7225-2110:48:553
46650420irq/116-QManpo7225-2110:48:553
71410rcu_preempt0-21swapper/112:06:311
71410rcu_preempt0-21swapper/112:06:311
71410rcu_preempt0-21swapper/009:23:210
71410rcu_preempt0-21swapper/009:23:210
71410rcu_preempt0-21swapper/009:23:210
71400rcu_preempt14027-21sshd10:18:181
71400rcu_preempt14027-21sshd10:18:181
71400rcu_preempt0-21swapper/311:25:193
71400rcu_preempt0-21swapper/311:25:193
71400rcu_preempt0-21swapper/111:24:301
71400rcu_preempt0-21swapper/111:24:301
71400rcu_preempt0-21swapper/109:22:471
71400rcu_preempt0-21swapper/109:22:471
71400rcu_preempt0-21swapper/109:22:471
71400rcu_preempt0-21swapper/011:33:450
71400rcu_preempt0-21swapper/011:33:450
46050400irq/122-QManpo12116-2110:48:550
46050400irq/122-QManpo12116-2110:48:550
71390rcu_preempt0-21swapper/211:38:172
71390rcu_preempt0-21swapper/211:38:172
71390rcu_preempt0-21swapper/111:15:101
71390rcu_preempt0-21swapper/111:15:101
71390rcu_preempt0-21swapper/012:33:140
71390rcu_preempt0-21swapper/012:33:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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