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2026-07-07 - 03:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Mon Jul 06, 2026 12:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1550252980,94pltrace0-21swapper/507:05:155
1550252970,92pltrace0-21swapper/607:07:246
1550252930,84pltrace0-21swapper/207:07:402
1550252870,83pltrace0-21swapper/107:05:161
1810127359,10sleep30-21swapper/307:06:203
1821226942,8sleep40-21swapper/407:07:574
1596826046,10sleep70-21swapper/707:05:057
1804125945,10sleep00-21swapper/007:05:290
2815852510,8pltrace78-21ksoftirqd/710:31:047
2349452450,0pltrace0-21swapper/711:37:527
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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