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2025-10-26 - 01:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Sat Oct 25, 2025 12:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31880521400,136pltrace0-21swapper/707:05:077
31880521300,118pltrace0-21swapper/107:08:221
31880521280,112pltrace0-21swapper/507:05:215
31880521000,89pltrace0-21swapper/307:05:143
217427561,10sleep60-21swapper/607:07:286
221627242,10sleep20-21swapper/207:08:042
204727142,10sleep00-21swapper/007:05:380
204225844,10sleep40-21swapper/407:05:344
1544452270,3pltrace17447-21ps08:30:257
1434052240,0pltrace0-21swapper/207:28:352
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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