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2025-05-09 - 05:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Fri May 09, 2025 00:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31445521120,95pltrace0-21swapper/119:05:251
31445521120,105pltrace0-21swapper/619:05:146
31445521080,104pltrace0-21swapper/219:10:002
4208521040,0pltrace0-21swapper/123:05:041
31445521040,40pltrace0-21swapper/719:05:137
3144552980,89pltrace0-21swapper/519:05:065
315552910,0pltrace0-21swapper/022:05:030
3144552910,82pltrace0-21swapper/319:05:123
116725944,11sleep00-21swapper/019:06:180
112425944,11sleep40-21swapper/419:05:494
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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