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2025-11-09 - 01:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Sat Nov 08, 2025 12:44:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19234521190,2pltrace0-21swapper/309:27:333
2142521140,105pltrace0-21swapper/707:05:167
4934521090,100pltrace0-21swapper/307:10:003
2142521010,92pltrace0-21swapper/507:05:065
214252940,79pltrace0-21swapper/207:06:452
214252910,82pltrace0-21swapper/607:05:216
214252760,69pltrace0-21swapper/107:05:131
482927142,10sleep00-21swapper/007:06:180
488025945,10sleep40-21swapper/407:07:014
2534552340,0pltrace0-21swapper/712:35:237
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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