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2026-08-21 - 06:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Fri Aug 21, 2026 00:44:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
11359521560,142pltrace0-21swapper/619:05:556
24949521450,0pltrace0-21swapper/422:17:214
11359521290,126pltrace0-21swapper/119:05:061
11359521230,119pltrace0-21swapper/519:05:185
11359521200,57pltrace0-21swapper/719:05:157
11359521030,99pltrace0-21swapper/219:05:402
284202820,0sleep70-21swapper/723:53:397
1400127359,10sleep30-21swapper/319:05:323
1410725945,10sleep40-21swapper/419:07:014
1430325844,10sleep00-21swapper/019:09:310
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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