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2026-05-08 - 02:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Fri May 08, 2026 00:44:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
17834521220,114pltrace0-21swapper/519:07:065
17834521120,108pltrace0-21swapper/119:08:051
14215521040,0pltrace0-21swapper/019:56:440
1504852810,49pltrace0-21swapper/619:06:256
1504852750,67pltrace0-21swapper/219:06:212
1774026349,10sleep30-21swapper/319:05:413
1794826248,10sleep70-21swapper/719:08:177
1528426042,13sleep40-21swapper/419:05:024
1773725944,11sleep00-21swapper/019:05:380
2989152310,5pltrace0-21swapper/719:30:147
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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