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2026-03-24 - 13:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Tue Mar 24, 2026 00:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7900521010,88pltrace0-21swapper/519:05:225
1068652970,88pltrace0-21swapper/219:09:052
34832960,0sleep30-21swapper/322:45:173
790052940,90pltrace0-21swapper/319:05:133
790052940,90pltrace0-21swapper/119:05:171
1052727341,19sleep70-21swapper/719:05:537
1079426841,9sleep60-21swapper/619:09:226
957226541,18sleep40-21swapper/419:05:184
875125945,10sleep00-21swapper/019:05:140
1546152340,3pltrace0-21swapper/720:15:227
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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