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2026-05-31 - 09:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sun May 31, 2026 00:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3271121270,2sleep21154599cyclictest22:13:412
2974421180,0sleep129743-21sshd21:41:301
11024210233,41sleep10-21swapper/119:06:531
166962900,1sleep00-21swapper/000:31:280
276632890,2sleep10-21swapper/123:05:571
260682870,2sleep30-21swapper/323:19:503
229682870,1sleep00-21swapper/023:40:510
269652860,1sleep326961-21cp22:39:063
120202860,2sleep30-21swapper/323:00:113
149192850,2sleep214915-21sshd00:38:362
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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