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2025-08-21 - 21:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Thu Aug 21, 2025 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1299221780,2sleep12043899cyclictest10:59:241
1338321540,4sleep22043999cyclictest10:45:182
148421300,4sleep32044099cyclictest12:17:023
2201121280,0sleep10-21swapper/110:39:281
1909321260,1sleep019090-21sshd12:33:060
2010921250,3sleep21848-21nfsd11:00:092
2010921250,3sleep21848-21nfsd11:00:092
435321220,1sleep20-21swapper/211:38:282
264421210,1sleep10-21swapper/110:06:361
475821150,4sleep22043999cyclictest11:48:072
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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