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2026-07-15 - 12:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Wed Jul 15, 2026 00:44:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1342721380,5sleep32136199cyclictest00:23:073
2037821360,1sleep20-21swapper/222:00:362
1984921270,4sleep22136099cyclictest21:49:592
21099211034,47sleep10-21swapper/119:09:591
53452990,3sleep10-21swapper/122:10:121
2106129131,48sleep30-21swapper/319:09:343
187772890,1sleep10-21swapper/121:31:471
28132880,2sleep10-21swapper/121:55:191
27342880,2sleep20-21swapper/223:48:242
79412860,5sleep17932-21sshd23:41:381
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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