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2026-05-02 - 18:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot0.osadl.org (updated Sat May 02, 2026 12:44:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1410021450,3sleep3552599cyclictest09:15:173
1090621310,0sleep110905-21sshd09:43:241
2709721250,6sleep0550899cyclictest07:55:180
5097211733,43sleep30-21swapper/307:07:533
2635721030,0sleep226358-21bash10:06:352
496129732,43sleep10-21swapper/107:06:081
236812920,1sleep00-21swapper/012:07:500
108902870,2sleep02024-21nfsd12:10:190
104762870,2sleep10-21swapper/112:17:251
209932820,3sleep10-21swapper/110:43:121
295152780,2sleep30-21swapper/309:24:513
275262780,2sleep10-21swapper/112:12:081
250432780,2sleep12512-21runrttasks12:22:581
244872780,1sleep20-21swapper/209:31:072
40932760,2sleep30-21swapper/311:07:263
141722760,1sleep0550899cyclictest10:05:150
121702750,0sleep00-21swapper/009:29:570
314372740,1sleep131438-21id11:14:181
89772730,1sleep08974-21bash10:45:190
256062730,1sleep20-21swapper/210:17:442
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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