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2025-12-17 - 10:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot0.osadl.org (updated Wed Dec 17, 2025 00:44:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2218721130,4sleep3552199cyclictest00:33:223
518728634,48sleep10-21swapper/119:09:041
495228536,44sleep30-21swapper/319:06:053
210432840,2sleep20-21swapper/200:32:562
292322830,2sleep129235-21fschecks_time21:40:151
503027534,12sleep20-21swapper/219:07:042
222842750,1sleep30-21swapper/321:18:093
242892740,1sleep10-21swapper/123:30:561
158042740,3sleep30-21swapper/300:00:003
130772730,2sleep213079-21fschecks_time21:35:142
130772730,2sleep213079-21fschecks_time21:35:142
234242710,2sleep10-21swapper/100:23:141
499826135,4sleep00-21swapper/019:06:380
205762330,31sleep1137550irq/27-eth023:19:521
83772313,26sleep1137550irq/27-eth020:25:201
204572300,2sleep10-21swapper/121:27:281
203472260,2sleep30-21swapper/322:17:513
294642250,1sleep30-21swapper/323:11:553
551899243,7cyclictest12768-21awk20:35:160
58532230,2sleep10-21swapper/123:56:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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