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2026-04-01 - 05:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Mar 31, 2026 12:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3029621270,0sleep030298-21id11:57:280
1936021210,4sleep32024-21nfsd12:00:393
1883021190,1sleep20-21swapper/209:42:542
2151821140,3sleep00-21swapper/010:02:440
682210032,47sleep10-21swapper/107:06:561
84729633,46sleep30-21swapper/307:08:543
159412950,0sleep00-21swapper/011:50:150
327112920,2sleep20-21swapper/211:07:482
116202900,4sleep1120599cyclictest10:10:491
210122880,1sleep10-21swapper/110:56:101
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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