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2026-08-22 - 02:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sat Aug 22, 2026 00:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
328221330,0sleep13255-21sshd23:25:201
1514321270,3sleep11116299cyclictest00:12:571
1184921240,3sleep21116399cyclictest21:30:432
2163421230,2sleep20-21swapper/221:54:312
10819210132,41sleep30-21swapper/319:08:583
295142970,3sleep30-21swapper/321:55:133
323872940,2sleep20-21swapper/222:49:392
272892930,5sleep127286-21sshd23:06:331
213012920,2sleep30-21swapper/323:56:163
1078829232,48sleep10-21swapper/119:08:361
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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