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2026-09-02 - 10:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Wed Sep 02, 2026 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1590321470,3sleep03157399cyclictest22:49:340
2022421460,3sleep03157399cyclictest21:38:080
1101021410,1sleep311008-21sshd00:04:313
1327021300,2sleep20-21swapper/223:41:382
101321290,1sleep0991-21sshd00:23:480
1106121260,2sleep111062-21sshd22:25:501
460921210,2sleep34598-21sshd21:50:453
2745421210,1sleep30-21swapper/323:42:553
57021150,1sleep10-21swapper/123:40:291
1033721150,3sleep110333-21sshd23:50:031
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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