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2026-05-03 - 21:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sun May 03, 2026 12:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3199021530,0sleep231972-21sshd10:12:532
1967921310,4sleep2436299cyclictest07:40:232
1393821270,1sleep213937-21sshd10:42:072
1236821160,4sleep1435499cyclictest11:17:201
2055210432,44sleep30-21swapper/307:05:083
53392910,0sleep00-21swapper/011:27:290
172512880,6sleep10-21swapper/111:36:201
149232880,3sleep00-21swapper/012:09:490
283082860,3sleep20-21swapper/211:26:272
74672850,2sleep27466-21sshd09:11:182
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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