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2026-05-05 - 12:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue May 05, 2026 00:44:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1462521160,1sleep30-21swapper/300:09:083
22915210532,45sleep30-21swapper/319:08:063
157682950,2sleep30-21swapper/323:25:123
3652940,2sleep20-21swapper/222:51:212
306542910,2sleep30-21swapper/323:08:383
275982910,2sleep327593-21sshd22:54:233
106312890,2sleep20-21swapper/200:31:082
2301228719,40sleep10-21swapper/119:09:201
147482850,2sleep10-21swapper/121:30:301
65852840,0sleep00-21swapper/022:41:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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