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2026-03-17 - 02:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Mar 17, 2026 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
497421270,3sleep02685199cyclictest23:34:040
1633121190,2sleep30-21swapper/323:30:443
2705121120,1sleep10-21swapper/121:40:181
81962900,5sleep32686599cyclictest21:37:313
278192880,3sleep30-21swapper/322:58:173
2645928638,44sleep30-21swapper/319:08:043
159272850,1sleep30-21swapper/300:30:063
131532840,3sleep02685199cyclictest23:50:080
2635728134,43sleep10-21swapper/119:06:531
168712810,2sleep10-21swapper/123:50:291
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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