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2026-06-02 - 01:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Mon Jun 01, 2026 12:44:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
504021290,1sleep10-21swapper/111:06:381
71612900,1sleep30-21swapper/310:07:323
2783428932,53sleep30-21swapper/307:05:473
177672890,3sleep20-21swapper/211:47:182
216972870,1sleep30-21swapper/312:13:193
145732840,1sleep00-21swapper/011:29:170
2790228134,43sleep10-21swapper/107:06:411
176262800,2sleep10-21swapper/110:08:431
91512790,2sleep041ktimersoftd/012:22:470
15522790,1sleep12024-21nfsd09:35:251
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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