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2026-06-08 - 10:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Mon Jun 08, 2026 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
276821280,4sleep33066599cyclictest21:45:443
2930921210,2sleep30-21swapper/322:28:243
1963421160,2sleep03066299cyclictest23:38:340
2000121060,2sleep325-21rcuop/122:38:293
59302950,2sleep10-21swapper/121:35:481
3026029532,59sleep10-21swapper/119:08:141
16192900,4sleep20-21swapper/221:14:492
38232880,0sleep041ktimersoftd/023:01:320
38232880,0sleep041ktimersoftd/023:01:310
219182880,0sleep00-21swapper/022:31:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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