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2026-07-01 - 05:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Jun 30, 2026 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
622621270,0sleep06227-21sshd10:00:280
3248621170,2sleep11591199cyclictest09:29:551
15570210432,43sleep30-21swapper/307:08:583
1003721030,4sleep10-21swapper/112:31:171
1563229332,49sleep10-21swapper/107:09:451
49482880,2sleep20-21swapper/210:25:072
320002880,0sleep041ktimersoftd/010:58:550
179022880,4sleep20-21swapper/211:46:132
315342870,2sleep10-21swapper/110:14:071
290792850,2sleep30-21swapper/310:34:453
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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