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2024-04-23 - 10:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Apr 23, 2024 00:44:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2492021330,2sleep124921-21sshd21:52:231
2694421270,4sleep3109399cyclictest23:09:243
3064921250,0sleep00-21swapper/023:44:190
954221220,3sleep10-21swapper/121:58:201
94921200,2sleep30-21swapper/321:26:283
1874321180,2sleep118725-21sshd22:56:511
644210034,45sleep10-21swapper/119:07:001
186912940,1sleep018686-21sshd00:10:240
187052900,2sleep318702-21sshd23:46:383
181942900,1sleep01877-21nfsd22:10:500
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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