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2026-05-06 - 01:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue May 05, 2026 12:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2278121220,3sleep0400299cyclictest10:40:130
1055321210,0sleep210554-21sshd12:03:382
3539210733,44sleep10-21swapper/107:07:191
309222990,1sleep30-21swapper/312:28:083
309222990,1sleep30-21swapper/312:28:083
37492880,3sleep20-21swapper/211:14:172
276362880,2sleep20-21swapper/209:44:132
237552840,0sleep00-21swapper/010:33:280
372728231,42sleep30-21swapper/307:09:293
307722820,2sleep230775-21id12:16:252
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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