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2026-07-24 - 21:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Fri Jul 24, 2026 12:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3234621270,1sleep232337-21sshd09:36:182
3076221240,2sleep0773299cyclictest11:08:220
2965021190,2sleep1773399cyclictest09:47:471
2848221190,2sleep20-21swapper/211:31:472
2616021190,3sleep0773299cyclictest09:12:350
7462210932,72sleep30-21swapper/307:09:513
1396321060,2sleep30-21swapper/310:42:513
170622930,5sleep3773599cyclictest10:16:023
3712920,1sleep20-21swapper/209:27:562
253162910,0sleep00-21swapper/012:13:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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