You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-19 - 19:14
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sun Apr 19, 2026 12:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1979421340,1sleep00-21swapper/012:32:210
1716921330,3sleep21807299cyclictest09:50:082
2808421260,3sleep21807299cyclictest11:35:002
2890021160,1sleep00-21swapper/011:14:020
253892900,2sleep125390-21sshd12:18:391
1754628727,48sleep10-21swapper/107:06:531
163342870,0sleep20-21swapper/211:41:132
21852860,1sleep041ktimersoftd/011:32:010
1767128533,48sleep30-21swapper/307:08:283
92662830,1sleep09268-21latency08:00:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional