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2026-09-14 - 04:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Mon Sep 14, 2026 00:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
560421360,2sleep22140099cyclictest21:23:572
2427921280,2sleep20-21swapper/222:58:392
2289621260,2sleep10-21swapper/121:25:281
43921220,2sleep10-21swapper/122:18:551
43921220,2sleep10-21swapper/122:18:551
735921210,0sleep17356-21rm00:10:051
2129921170,3sleep22140099cyclictest00:08:252
1617421160,0sleep316166-21sshd21:30:313
20863211032,47sleep10-21swapper/119:06:431
121921100,4sleep12139999cyclictest00:15:231
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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