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2026-07-21 - 22:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Jul 21, 2026 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1005121430,2sleep210048-21sshd12:14:432
2269821300,2sleep10-21swapper/112:33:291
3219921260,2sleep22024-21nfsd12:01:272
1283321160,2sleep03004699cyclictest07:40:220
1395021140,2sleep313939-21sshd09:15:053
1457021130,1sleep30-21swapper/309:52:243
3073421000,2sleep20-21swapper/209:19:292
167742960,1sleep016771-21sshd11:13:130
248292930,2sleep224827-21sshd11:19:562
2949529232,48sleep30-21swapper/307:06:293
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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