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2026-03-24 - 04:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Mar 24, 2026 00:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
539121240,2sleep20-21swapper/200:01:202
1513621230,4sleep11304599cyclictest00:17:391
124721200,3sleep21304699cyclictest00:26:542
1189321180,1sleep00-21swapper/019:05:190
1273329826,44sleep10-21swapper/119:09:211
280302890,1sleep20-21swapper/223:56:522
252122890,2sleep20-21swapper/223:52:522
205672870,1sleep00-21swapper/022:57:390
142562860,2sleep10-21swapper/122:52:561
300142850,1sleep30-21swapper/323:57:043
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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