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2026-03-07 - 04:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Fri Mar 06, 2026 12:44:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2365721240,3sleep2410899cyclictest09:27:032
2583221220,0sleep025833-21sshd09:34:100
3780210334,40sleep30-21swapper/307:08:593
297262890,2sleep30-21swapper/309:56:173
98222880,3sleep20-21swapper/210:53:552
355028834,50sleep10-21swapper/107:06:151
185132880,1sleep018507-21sshd10:33:000
86012850,1sleep30-21swapper/312:02:243
150702850,4sleep1410299cyclictest12:25:031
82912840,3sleep20-21swapper/211:18:192
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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