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2026-08-18 - 23:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Aug 18, 2026 12:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3155821380,0sleep031535-21sshd12:17:250
945921260,3sleep01742499cyclictest10:42:110
2680421230,4sleep11742599cyclictest11:56:431
2680421230,4sleep11742599cyclictest11:56:421
2164821220,4sleep11742599cyclictest09:22:371
1884621160,4sleep21742699cyclictest10:40:132
2533821150,2sleep10-21swapper/110:14:471
16899211033,47sleep30-21swapper/307:06:493
146672910,1sleep00-21swapper/009:59:100
184192900,1sleep018416-21sshd11:32:090
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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