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2026-05-23 - 02:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sat May 23, 2026 00:44:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
316021320,2sleep01697999cyclictest23:11:290
978021200,2sleep21698199cyclictest22:05:112
1022021130,1sleep10-21swapper/123:59:591
209721120,1sleep22089-21sshd22:19:102
3197721050,1sleep20-21swapper/200:21:122
1636229433,57sleep10-21swapper/119:05:361
1658928834,9sleep20-21swapper/219:08:182
80512870,1sleep38050-21sshd23:33:453
229302870,3sleep30-21swapper/322:21:153
1640828732,51sleep30-21swapper/319:06:033
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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