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2026-03-29 - 16:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sun Mar 29, 2026 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
953421210,1sleep20-21swapper/212:29:372
1998321210,5sleep3885599cyclictest09:12:103
627821020,2sleep10-21swapper/111:27:451
127462960,1sleep00-21swapper/012:07:550
78812950,3sleep00-21swapper/010:27:480
215272950,4sleep1885399cyclictest12:05:211
17722950,2sleep12024-21nfsd12:21:161
193722940,5sleep30-21swapper/311:14:493
134012920,3sleep30-21swapper/310:20:593
104582870,2sleep32023-21nfsd11:03:193
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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