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2026-07-22 - 21:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Wed Jul 22, 2026 12:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
573321490,1sleep00-21swapper/009:47:250
3188221360,1sleep131881-21sshd10:59:451
933621310,0sleep39335-21id12:31:243
1575621310,1sleep30-21swapper/310:02:353
303621240,3sleep12024-21nfsd12:01:411
10154210632,54sleep30-21swapper/307:08:423
223021040,2sleep22221-21sshd11:41:132
1048321010,2sleep20-21swapper/211:33:122
8221210033,55sleep10-21swapper/107:05:081
288212980,1sleep028808-21sshd12:24:320
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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