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2025-12-24 - 19:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Wed Dec 24, 2025 12:44:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3102621230,0sleep00-21swapper/010:20:180
1605321080,3sleep2813799cyclictest11:27:272
5846210234,39sleep30-21swapper/307:05:103
763129333,56sleep10-21swapper/107:07:041
285752890,3sleep3813899cyclictest12:02:413
104532890,0sleep00-21swapper/009:43:390
271662820,1sleep10-21swapper/112:02:121
253602820,3sleep20-21swapper/210:18:392
253602820,3sleep20-21swapper/210:18:392
307472750,0sleep041ktimersoftd/009:30:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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