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2026-07-29 - 01:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Jul 28, 2026 12:44:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
884821210,2sleep19265-21cyclictest11:29:191
2682121160,0sleep00-21swapper/009:42:270
2250021060,2sleep20-21swapper/211:15:452
77772970,3sleep20-21swapper/212:10:242
893729232,48sleep10-21swapper/107:09:061
879029234,54sleep30-21swapper/307:07:283
206072910,1sleep20-21swapper/212:23:382
23602900,3sleep20-21swapper/211:13:372
65712860,1sleep30-21swapper/311:03:203
61312850,83sleep2144650irq/27-eth012:33:092
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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