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2026-06-19 - 19:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Fri Jun 19, 2026 12:44:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
851321460,3sleep02149199cyclictest11:45:170
309742900,2sleep20-21swapper/210:20:082
2123728929,56sleep10-21swapper/107:10:001
129282880,6sleep32149499cyclictest11:53:233
2096828733,50sleep30-21swapper/307:06:523
125742860,2sleep10-21swapper/109:41:401
309492840,2sleep30-21swapper/311:10:383
137772840,0sleep00-21swapper/012:19:520
87492830,2sleep32132-21sshd09:34:253
192022830,1sleep22024-21nfsd09:10:422
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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