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2026-09-03 - 11:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Thu Sep 03, 2026 00:44:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1270721260,3sleep01943499cyclictest21:15:540
1857521250,3sleep11943599cyclictest23:29:121
2830021220,4sleep31943799cyclictest21:26:103
127292990,6sleep00-21swapper/022:37:560
1893929330,50sleep30-21swapper/319:07:033
1914429232,48sleep10-21swapper/119:09:381
313432910,2sleep30-21swapper/323:03:243
288532900,1sleep028850-21sshd22:45:270
294232890,0sleep00-21swapper/021:14:370
214642890,2sleep121465-21sshd21:28:281
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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