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2026-07-08 - 10:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Wed Jul 08, 2026 00:44:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1094421210,3sleep2414099cyclictest23:55:262
2256421190,0sleep022566-21id00:34:300
367521160,2sleep10-21swapper/122:33:581
2272721120,1sleep20-21swapper/222:10:292
1325821110,1sleep10-21swapper/121:36:231
2137321090,2sleep10-21swapper/122:39:391
3578210332,40sleep10-21swapper/119:06:111
191721010,7sleep30-21swapper/319:05:123
171042890,2sleep30-21swapper/321:12:293
34832840,2sleep10-21swapper/123:13:491
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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