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2026-03-13 - 08:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Fri Mar 13, 2026 00:44:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2503521210,2sleep22512-21runrttasks21:46:542
2701621100,2sleep0678299cyclictest22:34:090
3160621070,3sleep3678599cyclictest22:08:473
6466210234,40sleep10-21swapper/119:09:181
118572970,2sleep10-21swapper/122:32:291
123222920,6sleep1678399cyclictest21:38:441
284302900,2sleep30-21swapper/321:47:193
114902900,2sleep10-21swapper/121:45:211
27602870,5sleep1678399cyclictest23:47:191
116212870,2sleep111619-21sshd23:32:491
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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