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2026-07-23 - 21:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Thu Jul 23, 2026 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1146921210,2sleep31868199cyclictest11:30:113
3261221190,1sleep10-21swapper/112:10:471
2520321190,2sleep10-21swapper/111:52:081
18330210833,46sleep30-21swapper/307:09:053
8752910,3sleep10-21swapper/109:38:111
271672900,3sleep227163-21sshd10:03:442
1817029032,54sleep10-21swapper/107:07:021
54422880,2sleep22024-21nfsd10:13:142
215632880,0sleep00-21swapper/011:19:220
175302880,1sleep30-21swapper/311:39:243
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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