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2026-09-01 - 09:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Mon Aug 31, 2026 12:44:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
836921310,5sleep32707199cyclictest09:47:103
490821300,1sleep32707199cyclictest11:54:583
26664210232,40sleep10-21swapper/107:08:211
47432970,2sleep20-21swapper/211:54:582
5002940,3sleep30-21swapper/310:47:333
55412930,0sleep15542-21sshd09:17:451
31982930,2sleep20-21swapper/211:22:392
2671129333,48sleep30-21swapper/307:08:593
167922920,1sleep22707099cyclictest11:46:592
213142900,2sleep221315-21sshd12:16:252
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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