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2026-09-07 - 15:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Mon Sep 07, 2026 12:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
236021250,1sleep32927799cyclictest10:42:293
1840221100,0sleep118401-21id12:23:131
212472980,2sleep221242-21sshd11:37:222
88052960,2sleep10-21swapper/110:58:341
63402940,2sleep10-21swapper/109:55:231
34122860,2sleep30-21swapper/310:35:083
2899328532,49sleep30-21swapper/307:09:453
2876228532,49sleep10-21swapper/107:06:511
45072840,2sleep14505-21sshd11:27:321
255492820,2sleep30-21swapper/311:49:343
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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