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2026-06-01 - 00:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sun May 31, 2026 12:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3215821240,3sleep01217099cyclictest11:01:110
1062021240,4sleep11217199cyclictest11:54:151
1630721230,3sleep31217399cyclictest12:27:553
2371021200,2sleep223706-21sshd09:26:072
987229937,49sleep30-21swapper/307:05:073
127442970,0sleep00-21swapper/009:31:510
1189129733,43sleep10-21swapper/107:09:471
8252860,2sleep2826-21sshd09:34:062
262162860,2sleep326214-21sshd11:00:263
153902850,1sleep10-21swapper/112:38:511
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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