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2026-08-14 - 20:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Fri Aug 14, 2026 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2942321380,4sleep32651799cyclictest09:27:573
2855021290,2sleep32651799cyclictest09:10:573
443421270,1sleep04418-21sshd12:11:540
3273821150,2sleep20-21swapper/211:36:492
612221100,1sleep10-21swapper/112:00:291
612221100,1sleep10-21swapper/112:00:281
81292950,0sleep00-21swapper/010:44:420
306302940,1sleep02024-21nfsd12:20:160
154642930,5sleep20-21swapper/211:15:132
159822920,3sleep215939-21sshd10:48:282
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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