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2025-11-22 - 01:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Fri Nov 21, 2025 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2359921610,1sleep00-21swapper/010:47:570
2359921610,1sleep00-21swapper/010:47:560
1128521590,5sleep21301699cyclictest12:33:152
3074221370,4sleep31301799cyclictest09:12:563
3134921290,1sleep20-21swapper/209:49:262
2347221290,2sleep20-21swapper/211:21:212
1055221280,2sleep210539-21cp10:10:102
1699121270,1sleep00-21swapper/011:56:460
2690221230,1sleep20-21swapper/209:15:392
1651321210,2sleep31301799cyclictest09:51:033
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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