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2026-08-26 - 04:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Wed Aug 26, 2026 00:44:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3046421250,2sleep30-21swapper/321:22:293
2508321190,2sleep10-21swapper/123:38:301
2062121150,1sleep20-21swapper/200:29:522
191432950,2sleep219140-21sshd23:20:422
222072940,1sleep02024-21nfsd23:52:310
34502920,1sleep02023-21nfsd22:46:540
317362920,0sleep031728-21sshd22:11:070
191702920,5sleep30-21swapper/321:41:173
166732910,5sleep1111299cyclictest23:40:291
47328933,52sleep30-21swapper/319:05:283
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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