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2026-07-19 - 18:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sun Jul 19, 2026 12:44:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3025321340,1sleep30-21swapper/308:00:193
989721320,1sleep39896-21sshd11:30:443
2002721270,4sleep1639099cyclictest12:07:451
2899421240,2sleep20-21swapper/210:17:172
2983221180,4sleep3639299cyclictest12:23:293
3203621160,3sleep1639099cyclictest11:54:541
1988021160,2sleep30-21swapper/310:33:493
1988021160,2sleep30-21swapper/310:33:493
5965211034,47sleep30-21swapper/307:08:063
5879210832,47sleep10-21swapper/107:07:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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