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2026-06-25 - 00:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Wed Jun 24, 2026 12:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
311821590,0sleep03102-21sshd09:59:310
1570121180,3sleep31061199cyclictest10:18:343
761521120,3sleep21061099cyclictest10:25:062
10190210032,40sleep10-21swapper/107:08:011
307132940,1sleep00-21swapper/012:12:120
13872880,1sleep02024-21nfsd10:31:340
1010728833,51sleep30-21swapper/307:07:103
285202870,2sleep228522-21df_abs09:00:102
89982850,2sleep32023-21nfsd09:42:073
52192850,0sleep00-21swapper/010:35:540
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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