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2025-07-12 - 13:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sat Jul 12, 2025 00:44:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
137821640,3sleep12757499cyclictest23:24:261
137821640,3sleep12757499cyclictest23:24:251
2586221430,1sleep10-21swapper/123:33:001
440921420,3sleep30-21swapper/300:33:153
1577121420,2sleep22757899cyclictest00:06:522
130221420,2sleep30-21swapper/322:50:083
1272921410,4sleep12757499cyclictest22:29:271
2318821380,1sleep22757899cyclictest21:13:402
1178821340,2sleep30-21swapper/323:03:443
1480021330,1sleep30-21swapper/321:55:423
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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