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2026-04-10 - 11:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Fri Apr 10, 2026 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1014221370,2sleep12512-21runrttasks23:55:111
1838921290,3sleep02403499cyclictest22:02:290
2539621220,4sleep12403899cyclictest00:26:161
74121190,3sleep22404399cyclictest22:14:212
2505021150,1sleep00-21swapper/021:45:420
23485210532,45sleep30-21swapper/319:06:233
2943821020,1sleep10-21swapper/121:46:111
209552980,0sleep00-21swapper/021:52:110
114832930,1sleep30-21swapper/322:22:153
194612910,3sleep10-21swapper/100:14:341
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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