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2026-04-07 - 11:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Apr 07, 2026 00:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1041321230,0sleep110406-21sshd23:05:281
1041321230,0sleep110406-21sshd23:05:281
3122321220,3sleep11653599cyclictest23:57:101
864221200,2sleep12024-21nfsd21:45:061
3109721180,2sleep30-21swapper/322:44:393
1605129232,48sleep30-21swapper/319:07:023
114032910,2sleep111401-21sshd23:47:321
15122900,1sleep30-21swapper/323:18:413
27742890,2sleep30-21swapper/321:33:183
19522890,2sleep20-21swapper/200:20:322
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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