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2026-05-31 - 00:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sat May 30, 2026 12:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2289521200,2sleep20-21swapper/212:04:042
258421140,2sleep32583-21sshd10:22:383
204552950,2sleep12512-21runrttasks11:36:261
1411829333,48sleep10-21swapper/107:07:111
263892920,2sleep226390-21sshd09:16:012
323682880,1sleep20-21swapper/212:12:572
95622870,3sleep31460699cyclictest10:30:163
254692860,2sleep20-21swapper/212:26:362
244392860,2sleep324436-21sshd10:39:173
149752860,0sleep00-21swapper/011:24:390
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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