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2026-07-12 - 13:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sun Jul 12, 2026 00:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2850421220,4sleep33252599cyclictest23:11:413
1123521100,1sleep20-21swapper/223:09:562
1934421000,18sleep3144650irq/27-eth023:40:223
38642940,3sleep03250999cyclictest23:34:500
72672910,2sleep20-21swapper/222:36:582
3089729132,46sleep30-21swapper/319:05:153
99932900,2sleep10-21swapper/122:51:401
37392900,1sleep10-21swapper/122:33:071
272342900,4sleep13251599cyclictest23:55:591
88672890,0sleep08865-21sshd21:32:510
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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