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2026-03-14 - 18:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Sat Mar 14, 2026 12:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
70221320,0sleep3693-21sshd11:14:163
2958621320,4sleep32755899cyclictest10:10:003
1962121320,3sleep12754999cyclictest12:16:171
2459321270,4sleep22755499cyclictest09:40:012
1702921150,3sleep12754999cyclictest10:08:021
27177211333,43sleep10-21swapper/107:08:331
26985210433,42sleep30-21swapper/307:06:103
40162960,1sleep04012-21bash11:29:310
65192910,2sleep16506-21sshd10:55:181
60442890,3sleep10-21swapper/111:10:091
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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