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2026-06-23 - 22:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Tue Jun 23, 2026 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
580221260,3sleep2888499cyclictest11:29:422
3007321180,3sleep2888499cyclictest12:35:262
8443210232,41sleep30-21swapper/307:07:553
194532910,2sleep10-21swapper/109:12:081
84402900,3sleep20-21swapper/212:22:292
146062870,1sleep041ktimersoftd/011:57:330
17282860,1sleep10-21swapper/112:29:001
17282860,1sleep10-21swapper/112:29:001
862428533,48sleep10-21swapper/107:09:581
205952850,1sleep020594-21sshd10:32:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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