You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-20 - 23:56
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Thu Nov 20, 2025 12:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1140421610,2sleep10-21swapper/110:56:211
1385921550,4sleep21260099cyclictest09:24:362
824421530,1sleep30-21swapper/312:20:003
337421470,2sleep00-21swapper/010:25:300
33221270,3sleep11259999cyclictest11:11:241
739621260,1sleep21260099cyclictest09:53:222
2265221260,3sleep01259899cyclictest09:18:410
2186321150,1sleep21260099cyclictest09:28:532
11996211235,47sleep30-21swapper/307:05:433
163692970,1sleep01259899cyclictest12:20:380
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional