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2026-05-25 - 05:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Mon May 25, 2026 00:44:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1726721270,4sleep31512799cyclictest21:43:493
122742960,2sleep10-21swapper/122:08:181
202942940,1sleep21512699cyclictest23:24:102
279112920,2sleep20-21swapper/222:10:002
1478729232,48sleep10-21swapper/119:09:011
134032910,3sleep11512599cyclictest00:38:431
295202880,2sleep30-21swapper/322:20:193
305522870,3sleep10-21swapper/122:35:081
1471528732,46sleep30-21swapper/319:08:063
138262860,2sleep22512-21runrttasks00:28:102
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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