You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-06 - 22:52
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Fri Mar 06, 2026 12:44:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
14526391030,0EcMasterDemoSyn0-21swapper/310:17:193
864521000,0sleep50-21swapper/510:14:345
1547539920,0EcMasterDemoSyn1548529tAtEmLog_007:50:185
163232910,1sleep20-21swapper/212:24:122
453439840,0EcMasterDemoSyn454329tAtEmLog_007:30:015
960639830,0EcMasterDemoSyn961629tAtEmLog_010:32:325
821039830,0EcMasterDemoSyn822029tAtEmLog_011:43:335
908739820,0EcMasterDemoSyn909729tAtEmLog_011:08:025
1731139820,0EcMasterDemoSyn1732129tAtEmLog_011:48:375
1452639820,0EcMasterDemoSyn1453629tAtEmLog_010:17:205
1064039820,0EcMasterDemoSyn1065029tAtEmLog_008:46:045
87539810,0EcMasterDemoSyn88629tAtEmLog_008:25:465
588939810,0EcMasterDemoSyn589929tAtEmLog_009:36:465
2914739810,0EcMasterDemoSyn2915729tAtEmLog_009:31:425
2715039810,0EcMasterDemoSyn2716029tAtEmLog_007:09:445
2530539810,0EcMasterDemoSyn2531529tAtEmLog_012:29:115
1989639810,0EcMasterDemoSyn1990629tAtEmLog_009:26:375
1386239810,0EcMasterDemoSyn1387229tAtEmLog_010:52:505
3218439800,0EcMasterDemoSyn3219429tAtEmLog_007:19:525
3218439800,0EcMasterDemoSyn3219429tAtEmLog_007:19:515
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional