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2026-08-29 - 04:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Sat Aug 29, 2026 00:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
674939191340,0EcMasterDemoSyn0-21swapper/519:21:115
674939191340,0EcMasterDemoSyn0-21swapper/519:21:105
2894039165920,0EcMasterDemoSyn0-21swapper/500:00:305
652339162630,0EcMasterDemoSyn0-21swapper/520:31:305
253053983290,0EcMasterDemoSyn0-21swapper/523:59:235
198103983280,0EcMasterDemoSyn0-21swapper/520:45:445
197803983270,0EcMasterDemoSyn0-21swapper/522:43:005
156023983270,0EcMasterDemoSyn0-21swapper/520:06:445
97953983250,0EcMasterDemoSyn0-21swapper/500:21:165
78483983210,0EcMasterDemoSyn0-21swapper/521:53:505
163003983180,0EcMasterDemoSyn0-21swapper/522:12:025
91323983140,0EcMasterDemoSyn0-21swapper/519:25:115
91323983140,0EcMasterDemoSyn0-21swapper/519:25:105
14013983140,0EcMasterDemoSyn0-21swapper/521:01:245
89773983130,0EcMasterDemoSyn0-21swapper/521:25:045
301483983120,0EcMasterDemoSyn0-21swapper/520:58:085
107383983120,0EcMasterDemoSyn0-21swapper/520:35:535
308553983080,0EcMasterDemoSyn0-21swapper/522:18:585
169173983060,0EcMasterDemoSyn0-21swapper/522:56:055
46563983020,0EcMasterDemoSyn0-21swapper/522:21:095
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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