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2026-07-04 - 18:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Sat Jul 04, 2026 12:44:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1668339940,1EcMasterDemoSyn16692-21runintdemo5min11:07:544
2039939910,0EcMasterDemoSyn2040929tAtEmLog_011:28:115
49839820,0EcMasterDemoSyn51129tAtEmLog_011:53:335
49839820,0EcMasterDemoSyn51129tAtEmLog_011:53:325
1963839820,0EcMasterDemoSyn1964829tAtEmLog_008:45:555
1746339820,0EcMasterDemoSyn1747329tAtEmLog_010:32:245
782039810,0EcMasterDemoSyn783029tAtEmLog_008:20:335
2265539810,0EcMasterDemoSyn2266529tAtEmLog_010:17:115
1411739810,0EcMasterDemoSyn1412729tAtEmLog_007:29:515
145512610,0sleep20-21swapper/209:36:392
477199210,10cyclictest10921-21sh10:29:050
477199210,10cyclictest10921-21sh10:29:050
463539190,4EcMasterDemoSyn0-21swapper/507:09:345
477699181,12cyclictest16-1pr/legacy07:50:081
477199184,11cyclictest5760-21sh11:38:080
477199180,14cyclictest26569-21sh11:13:340
477199180,10cyclictest18248-21sh10:15:130
477199180,10cyclictest174-1kworker/0:1H+kblockd09:35:020
478899170,10cyclictest17843-21sh12:02:574
478499178,8cyclictest21622-21sh09:59:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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