You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-12-03 - 17:32
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Wed Dec 03, 2025 12:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2217039890,0EcMasterDemoSyn2218029tAtEmLog_009:37:395
2294239840,0EcMasterDemoSyn2295229tAtEmLog_010:33:255
2964239830,0EcMasterDemoSyn2965229tAtEmLog_007:10:355
1048039830,0EcMasterDemoSyn1049129tAtEmLog_010:23:175
448039820,0EcMasterDemoSyn449029tAtEmLog_010:18:135
3112839820,0EcMasterDemoSyn3113829tAtEmLog_010:13:085
2909239820,0EcMasterDemoSyn2910229tAtEmLog_008:16:305
1962739820,0EcMasterDemoSyn1963729tAtEmLog_007:56:145
1801739820,0EcMasterDemoSyn1802729tAtEmLog_009:02:095
1328239820,0EcMasterDemoSyn1329229tAtEmLog_008:52:005
1092639820,0EcMasterDemoSyn1093629tAtEmLog_008:46:565
444339810,0EcMasterDemoSyn445329tAtEmLog_009:22:255
2513939810,0EcMasterDemoSyn2514929tAtEmLog_010:08:045
227439810,0EcMasterDemoSyn228429tAtEmLog_007:20:435
2037339810,0EcMasterDemoSyn2038329tAtEmLog_009:07:125
2921239800,0EcMasterDemoSyn2922229tAtEmLog_010:38:305
104039800,0EcMasterDemoSyn105129tAtEmLog_009:47:465
2781139540,0EcMasterDemoSyn27819-21grep09:42:434
1962739480,0EcMasterDemoSyn0-21swapper/307:56:143
111339330,4EcMasterDemoSyn1118-21runintdemo5min11:34:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional