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2026-05-19 - 03:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Tue May 19, 2026 00:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
124582980,0sleep00-21swapper/000:26:230
879439920,0EcMasterDemoSyn880429tAtEmLog_021:01:285
2904839910,0EcMasterDemoSyn2905829tAtEmLog_022:12:285
175682870,0sleep20-21swapper/223:17:362
1953739840,0EcMasterDemoSyn1954729tAtEmLog_022:42:545
155039830,0EcMasterDemoSyn156029tAtEmLog_021:57:155
155039830,0EcMasterDemoSyn156029tAtEmLog_021:57:155
2875139820,0EcMasterDemoSyn2876129tAtEmLog_019:30:125
2639239820,0EcMasterDemoSyn2640229tAtEmLog_019:25:075
2252139820,0EcMasterDemoSyn2253129tAtEmLog_023:38:415
2229239820,0EcMasterDemoSyn2230229tAtEmLog_020:20:545
2016839820,0EcMasterDemoSyn2017829tAtEmLog_021:31:545
1267739820,0EcMasterDemoSyn1268729tAtEmLog_000:09:065
757939810,0EcMasterDemoSyn758929tAtEmLog_000:24:195
538939810,0EcMasterDemoSyn539929tAtEmLog_022:53:025
2936939810,0EcMasterDemoSyn2937929tAtEmLog_020:36:075
2479939810,0EcMasterDemoSyn2480929tAtEmLog_021:52:105
1247739810,0EcMasterDemoSyn1248729tAtEmLog_020:00:375
1114939810,0EcMasterDemoSyn1115929tAtEmLog_021:06:325
2447339570,0EcMasterDemoSyn24482-21runintdemo5min22:27:413
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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