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2026-03-11 - 22:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Wed Mar 11, 2026 12:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
702939830,1EcMasterDemoSyn7035-21ps09:42:204
1011539830,0EcMasterDemoSyn1012529tAtEmLog_007:55:525
902239820,0EcMasterDemoSyn903429tAtEmLog_012:24:385
702939820,0EcMasterDemoSyn703929tAtEmLog_009:42:205
539939820,0EcMasterDemoSyn540929tAtEmLog_007:45:435
2943839810,1EcMasterDemoSyn41-21ksoftirqd/210:48:172
2667539810,0EcMasterDemoSyn2668529tAtEmLog_008:31:215
1620139340,0EcMasterDemoSyn0-21swapper/409:47:264
260932250,3sleep00-21swapper/011:04:360
1957839250,1EcMasterDemoSyn19587-21wc08:16:090
1881399239,7cyclictest5017-21sed08:55:153
18810992219,2cyclictest23050irq/32-nvkm07:10:130
18812992117,3cyclictest10883-21turbostat11:50:012
1881399202,9cyclictest3614-21sh10:15:393
1881399201,9cyclictest23393-21sh09:51:063
1881399191,8cyclictest20972-21awk12:30:233
1881399191,10cyclictest780-21runrttasks11:31:553
1881399190,9cyclictest31783-21sh11:43:153
1881399190,9cyclictest21753-21runrttasks10:25:473
1881399190,9cyclictest16878-21diskmemload11:16:383
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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