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2026-05-22 - 07:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Fri May 22, 2026 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12881391200,1EcMasterDemoSyn12887-21ps21:37:183
16182391150,0EcMasterDemoSyn0-21swapper/423:08:344
151612940,0sleep40-21swapper/422:31:514
1765439920,0EcMasterDemoSyn1766429tAtEmLog_021:22:055
2656039860,0EcMasterDemoSyn2657029tAtEmLog_021:06:525
2114239840,0EcMasterDemoSyn2115229tAtEmLog_022:53:225
3121039830,1EcMasterDemoSyn3122029tAtEmLog_021:47:265
2637039830,0EcMasterDemoSyn2638029tAtEmLog_022:02:395
688339820,0EcMasterDemoSyn689329tAtEmLog_023:39:005
499639820,0EcMasterDemoSyn500629tAtEmLog_020:21:145
315539820,0EcMasterDemoSyn316529tAtEmLog_022:07:435
1493739820,0EcMasterDemoSyn1494929tAtEmLog_000:19:345
786939810,0EcMasterDemoSyn787929tAtEmLog_019:20:235
3024339810,0EcMasterDemoSyn3025329tAtEmLog_020:06:015
1925039810,0EcMasterDemoSyn1926029tAtEmLog_000:39:525
1916539810,0EcMasterDemoSyn1917529tAtEmLog_020:51:405
1719139810,0EcMasterDemoSyn1720129tAtEmLog_021:57:355
2079139800,0EcMasterDemoSyn2080129tAtEmLog_019:45:445
1154339800,0EcMasterDemoSyn1155329tAtEmLog_023:23:475
174652790,1sleep217464-21ssh23:26:352
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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