You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-28 - 16:29
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Sat Feb 28, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3509391600,0EcMasterDemoSyn491ktimers/307:54:333
2754139870,0EcMasterDemoSyn2754729tAtEmLog_011:07:165
2754139870,0EcMasterDemoSyn2754729tAtEmLog_011:07:155
3171639860,0EcMasterDemoSyn31721-21runintdemo5min08:50:210
825039840,0EcMasterDemoSyn826029tAtEmLog_008:04:435
3120339830,0EcMasterDemoSyn3121329tAtEmLog_007:44:255
2362539830,0EcMasterDemoSyn2363529tAtEmLog_007:29:135
586839820,0EcMasterDemoSyn587829tAtEmLog_007:59:385
506839820,0EcMasterDemoSyn507829tAtEmLog_010:36:505
2378539820,0EcMasterDemoSyn2379529tAtEmLog_010:11:295
822639810,0EcMasterDemoSyn823629tAtEmLog_011:32:375
1142439700,1EcMasterDemoSyn11431-21grep12:28:241
1483139580,0EcMasterDemoSyn1484129tAtEmLog_009:35:575
139062410,0sleep20-21swapper/211:54:032
1428499201,6cyclictest20350-21runrttasks08:29:162
14285991911,6cyclictest29130-21strings08:45:173
1428699181,12cyclictest16-1pr/legacy11:27:314
1428599180,10cyclictest10697-21diskmemload11:15:373
1428499185,6cyclictest30039-21wc07:40:192
1428499184,7cyclictest21906-21wc10:10:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional