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2026-04-10 - 08:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Fri Apr 10, 2026 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3164239930,0EcMasterDemoSyn3165229tAtEmLog_000:13:175
2488439910,0EcMasterDemoSyn2489429tAtEmLog_021:46:135
2367839850,0EcMasterDemoSyn2368829tAtEmLog_023:32:435
329639830,0EcMasterDemoSyn330629tAtEmLog_020:30:095
2085339830,0EcMasterDemoSyn2086329tAtEmLog_019:59:445
203139830,0EcMasterDemoSyn204129tAtEmLog_021:15:485
904739820,0EcMasterDemoSyn905729tAtEmLog_019:34:235
39739820,0EcMasterDemoSyn40729tAtEmLog_023:37:475
2794739820,0EcMasterDemoSyn2795729tAtEmLog_020:14:575
2794739820,0EcMasterDemoSyn2795729tAtEmLog_020:14:575
1735339820,0EcMasterDemoSyn1736329tAtEmLog_000:23:255
1528739820,0EcMasterDemoSyn1529729tAtEmLog_022:52:095
825939800,0EcMasterDemoSyn826929tAtEmLog_000:18:225
2558939800,0EcMasterDemoSyn2559929tAtEmLog_020:09:525
2323139620,0EcMasterDemoSyn0-21swapper/020:04:480
427539600,0EcMasterDemoSyn0-21swapper/223:58:052
29748992211,6cyclictest10140-21cut23:25:154
2644699190,16tDemoTimingTask27264-21chrt00:29:045
29747991814,3cyclictest646-21systemd-logind22:40:013
2974799180,11cyclictest6591-21runrttasks19:28:093
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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