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2026-07-05 - 23:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Sun Jul 05, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3060839940,0EcMasterDemoSyn3061829tAtEmLog_009:41:525
1052039920,0EcMasterDemoSyn1053029tAtEmLog_010:42:445
2195439870,0EcMasterDemoSyn0-21swapper/108:35:571
1954839830,0EcMasterDemoSyn1955829tAtEmLog_010:47:485
973839820,0EcMasterDemoSyn974829tAtEmLog_011:18:135
377439820,0EcMasterDemoSyn378429tAtEmLog_009:06:225
1167339820,0EcMasterDemoSyn1168329tAtEmLog_007:09:445
540839810,0EcMasterDemoSyn541829tAtEmLog_008:00:275
2642439810,0EcMasterDemoSyn2643429tAtEmLog_012:03:525
2642439780,1EcMasterDemoSyn26433-21runintdemo5min12:03:521
3060839750,0EcMasterDemoSyn0-21swapper/309:41:523
1487239210,0EcMasterDemoSyn14881-21runintdemo5min08:20:452
1178499200,8cyclictest8549-21ps11:35:210
90242190,1sleep19021-21df09:30:151
1178999191,13cyclictest16-1pr/legacy09:52:001
732729180,7tAtEmLog_011170-21chrt09:49:395
307199180,8tDemoTimingTask8185-21chrt12:11:145
2627129180,8tAtEmLog_029514-21chrt09:23:545
1910099180,10tDemoTimingTask19357-21taskset07:25:005
11789991810,6cyclictest7386-21ssh10:05:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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