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2026-03-21 - 01:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Fri Mar 20, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
11614391600,0EcMasterDemoSyn0-21swapper/308:21:523
38722880,0sleep50-21swapper/509:10:385
2985539840,1EcMasterDemoSyn29861-21ps09:43:000
2010339830,0EcMasterDemoSyn2011329tAtEmLog_010:13:265
1382539830,0EcMasterDemoSyn1383529tAtEmLog_012:15:095
1161439830,0EcMasterDemoSyn1162429tAtEmLog_008:21:535
450939820,0EcMasterDemoSyn451929tAtEmLog_008:06:415
2985539820,0EcMasterDemoSyn2986529tAtEmLog_009:43:015
2583539820,0EcMasterDemoSyn2584529tAtEmLog_008:52:185
2347739820,0EcMasterDemoSyn2348729tAtEmLog_008:47:155
129139820,0EcMasterDemoSyn130129tAtEmLog_011:14:175
1041739820,0EcMasterDemoSyn1042729tAtEmLog_011:19:225
624139810,0EcMasterDemoSyn625129tAtEmLog_010:59:055
2746639690,4EcMasterDemoSyn27472-21ps07:46:240
2112139210,0EcMasterDemoSyn21130-21runintdemo5min08:42:103
870299195,10cyclictest9029-21sh11:18:230
870299184,10cyclictest6035-21sh11:52:240
870299180,9cyclictest780-21runrttasks12:24:350
870299180,10cyclictest780-21runrttasks12:05:480
870299180,10cyclictest7659-21sh12:29:460
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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