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2025-12-23 - 12:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Tue Dec 23, 2025 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
16466391090,0EcMasterDemoSyn0-21swapper/122:57:291
3114039910,0EcMasterDemoSyn3115029tAtEmLog_020:40:355
1228639900,0EcMasterDemoSyn1229629tAtEmLog_020:05:045
991439840,0EcMasterDemoSyn992829tAtEmLog_020:00:005
198039840,0EcMasterDemoSyn199029tAtEmLog_021:56:385
725539830,0EcMasterDemoSyn726529tAtEmLog_022:52:255
219539830,0EcMasterDemoSyn220729tAtEmLog_022:32:085
2540039820,0EcMasterDemoSyn2541029tAtEmLog_022:27:045
2061339820,0EcMasterDemoSyn2062329tAtEmLog_020:20:175
2039439820,0EcMasterDemoSyn2040429tAtEmLog_019:14:225
1609539820,0EcMasterDemoSyn1610529tAtEmLog_023:32:595
108939820,0EcMasterDemoSyn109929tAtEmLog_020:45:395
1059639820,0EcMasterDemoSyn1060629tAtEmLog_021:05:565
3015539810,0EcMasterDemoSyn3016529tAtEmLog_019:34:395
2513539810,0EcMasterDemoSyn2514529tAtEmLog_019:24:305
2275539810,0EcMasterDemoSyn2276529tAtEmLog_019:19:255
1802039810,0EcMasterDemoSyn1803029tAtEmLog_019:09:185
1499739810,0EcMasterDemoSyn1500729tAtEmLog_020:10:095
285262460,0sleep40-21swapper/423:04:344
1818699230,9cyclictest27920-21ssh23:39:573
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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