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2026-04-14 - 20:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Tue Apr 14, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31050391150,1EcMasterDemoSyn31056-21ps10:17:141
31050391150,1EcMasterDemoSyn31056-21ps10:17:141
1287039870,0EcMasterDemoSyn12876-21ps09:31:354
2666139820,0EcMasterDemoSyn2667129tAtEmLog_007:40:025
2549439820,0EcMasterDemoSyn2550429tAtEmLog_011:07:565
2473239820,0EcMasterDemoSyn2474229tAtEmLog_012:18:575
2253439820,0EcMasterDemoSyn2254429tAtEmLog_008:35:495
2144739820,0EcMasterDemoSyn2145729tAtEmLog_007:29:535
1761839820,0EcMasterDemoSyn0-21swapper/009:16:220
2962739810,0EcMasterDemoSyn2963729tAtEmLog_008:51:015
2236339810,0EcMasterDemoSyn2237329tAtEmLog_009:36:405
222739650,0EcMasterDemoSyn2235-21runintdemo5min11:13:012
12105992219,2cyclictest14315-21kworker/3:0+events12:03:433
1105039220,0EcMasterDemoSyn0-21swapper/511:53:345
84872210,1sleep10-21swapper/109:46:521
963329181,7tAtEmLog_011827-21chrt07:07:415
12106991814,2cyclictest11709-21munin-plugin-st10:25:014
1210299180,10cyclictest19092-21sh12:33:510
1210299180,10cyclictest14452-21sh11:37:250
1043629180,0tAtEmLog_00-21swapper/512:34:085
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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