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2026-05-10 - 18:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Sun May 10, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1099539970,0EcMasterDemoSyn11002-21runintdemo5min11:27:301
1690439930,0EcMasterDemoSyn1691429tAtEmLog_010:36:485
1135839900,0EcMasterDemoSyn1136829tAtEmLog_007:44:245
1679939850,0EcMasterDemoSyn1681029tAtEmLog_009:00:275
323239830,0EcMasterDemoSyn324229tAtEmLog_008:35:055
1847939830,0EcMasterDemoSyn1848929tAtEmLog_007:59:365
2511039820,0EcMasterDemoSyn2512229tAtEmLog_011:17:225
113482300,0sleep50-21swapper/511:45:185
409499180,15tDemoTimingTask4486-21chrt07:30:055
3033529180,7tAtEmLog_030673-21chrt08:25:085
2905699180,15tDemoTimingTask4421-21chrt12:17:175
26597991810,6cyclictest14962-21tail12:05:143
2659599180,10cyclictest29415-21runrttasks12:13:221
2659599180,10cyclictest26085-21sh10:05:551
2659299180,10cyclictest9681-21sh11:44:560
2659299180,10cyclictest9681-21sh11:44:560
2659299180,10cyclictest4463-21sh09:19:080
2659299180,10cyclictest25084-21sh11:17:210
2659299180,10cyclictest20720-21ssh10:39:290
1758399180,15tDemoTimingTask25440-21chrt10:05:275
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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