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2026-08-22 - 07:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Sat Aug 22, 2026 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3016139248880,0EcMasterDemoSyn0-21swapper/521:17:515
2576139204470,0EcMasterDemoSyn0-21swapper/523:56:135
1217339128450,0EcMasterDemoSyn0-21swapper/522:08:065
2380939104730,0EcMasterDemoSyn0-21swapper/520:10:265
69973983310,0EcMasterDemoSyn0-21swapper/521:36:265
65023983290,0EcMasterDemoSyn0-21swapper/523:33:155
245683983290,0EcMasterDemoSyn0-21swapper/521:30:155
162663983280,0EcMasterDemoSyn0-21swapper/521:25:535
274283983250,0EcMasterDemoSyn0-21swapper/523:28:105
193893983230,0EcMasterDemoSyn0-21swapper/522:11:015
94673983220,0EcMasterDemoSyn0-21swapper/522:21:125
170843983220,0EcMasterDemoSyn0-21swapper/519:28:315
71673983200,0EcMasterDemoSyn0-21swapper/519:52:575
260763983200,0EcMasterDemoSyn0-21swapper/522:43:465
183323983200,0EcMasterDemoSyn0-21swapper/523:38:435
258373983170,0EcMasterDemoSyn0-21swapper/523:12:525
18933983160,0EcMasterDemoSyn0-21swapper/520:58:325
107573983160,0EcMasterDemoSyn0-21swapper/522:51:025
58593983150,0EcMasterDemoSyn0-21swapper/521:01:505
26233983150,0EcMasterDemoSyn0-21swapper/520:23:555
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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