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2026-08-08 - 12:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Sat Aug 08, 2026 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1068839152860,1EcMasterDemoSyn0-21swapper/519:32:405
2188139148950,0EcMasterDemoSyn0-21swapper/521:33:375
1761239140380,0EcMasterDemoSyn0-21swapper/500:27:125
2430839132540,0EcMasterDemoSyn0-21swapper/523:16:365
1723639119370,0EcMasterDemoSyn0-21swapper/521:45:375
2092239108790,0EcMasterDemoSyn0-21swapper/519:09:215
237833983360,0EcMasterDemoSyn0-21swapper/522:03:275
268433983300,0EcMasterDemoSyn0-21swapper/500:31:125
168733983290,0EcMasterDemoSyn0-21swapper/521:16:285
155003983240,0EcMasterDemoSyn0-21swapper/523:42:055
239843983160,0EcMasterDemoSyn0-21swapper/519:46:525
239843983160,0EcMasterDemoSyn0-21swapper/519:46:525
236343983160,0EcMasterDemoSyn0-21swapper/519:10:485
52193983150,0EcMasterDemoSyn0-21swapper/500:35:565
234853983130,0EcMasterDemoSyn0-21swapper/520:57:555
29973983120,0EcMasterDemoSyn0-21swapper/523:36:155
302393983100,0EcMasterDemoSyn0-21swapper/519:19:115
324093983070,0EcMasterDemoSyn0-21swapper/519:55:375
199533983040,0EcMasterDemoSyn0-21swapper/523:59:095
283583982810,0EcMasterDemoSyn0-21swapper/523:04:135
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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