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2026-05-07 - 16:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Thu May 07, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20774391670,0EcMasterDemoSyn0-21swapper/311:32:133
12043391520,1EcMasterDemoSyn12049-21ps07:44:021
8278391030,0EcMasterDemoSyn8283-21runintdemo5min09:55:524
2992839840,0EcMasterDemoSyn2993729tAtEmLog_011:37:175
662339830,0EcMasterDemoSyn663329tAtEmLog_011:42:205
2147439830,0EcMasterDemoSyn2148729tAtEmLog_009:10:145
1701639830,0EcMasterDemoSyn1702329tAtEmLog_010:36:265
416039820,0EcMasterDemoSyn417029tAtEmLog_007:28:485
3140439820,0EcMasterDemoSyn3141429tAtEmLog_009:15:175
2656139820,0EcMasterDemoSyn2657129tAtEmLog_008:14:265
251239820,0EcMasterDemoSyn252229tAtEmLog_011:22:045
2179539820,0EcMasterDemoSyn2180529tAtEmLog_008:04:185
3077639810,0EcMasterDemoSyn3078629tAtEmLog_011:01:465
2710139810,0EcMasterDemoSyn2711129tAtEmLog_007:08:325
3130939580,0EcMasterDemoSyn3131929tAtEmLog_008:29:385
1575139390,0EcMasterDemoSyn15757-21runintdemo5min09:00:042
2179539300,1EcMasterDemoSyn21801-21ps08:04:193
1463639270,4EcMasterDemoSyn14642-21ps12:22:553
748539250,1EcMasterDemoSyn7494-21wc11:06:524
1974229250,0tAtEmLog_00-21swapper/512:12:465
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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