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2026-04-30 - 23:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Thu Apr 30, 2026 12:43:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
590139910,0EcMasterDemoSyn591129tAtEmLog_011:05:395
3261439830,0EcMasterDemoSyn3262429tAtEmLog_007:17:265
2917039830,0EcMasterDemoSyn2918229tAtEmLog_011:00:345
1964939820,0EcMasterDemoSyn1965929tAtEmLog_007:58:015
135439820,0EcMasterDemoSyn136429tAtEmLog_010:45:225
735739810,0EcMasterDemoSyn736729tAtEmLog_007:32:395
459739810,0EcMasterDemoSyn460729tAtEmLog_009:54:395
383339810,0EcMasterDemoSyn384329tAtEmLog_008:33:315
1781239810,0EcMasterDemoSyn1782229tAtEmLog_009:03:555
1307439810,0EcMasterDemoSyn1308429tAtEmLog_008:53:485
1699139800,0EcMasterDemoSyn1700129tAtEmLog_007:52:575
1699139800,0EcMasterDemoSyn1700129tAtEmLog_007:52:565
1781239620,1EcMasterDemoSyn17817-21runintdemo5min09:03:564
2362039290,1EcMasterDemoSyn23618-21ssh11:51:162
3025439260,0EcMasterDemoSyn30263-21wc07:12:222
2753439230,1EcMasterDemoSyn27539-21runintdemo5min12:11:343
2817199223,10cyclictest21359-21latency_hist11:15:010
2817199196,10cyclictest17649-21sh12:05:510
28171991911,6cyclictest648-21dbus-daemon08:41:560
1455099190,16tDemoTimingTask22097-21chrt10:39:365
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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