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2026-05-22 - 01:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Thu May 21, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
26903391190,0EcMasterDemoSyn221rcuc/007:45:410
2335539910,0EcMasterDemoSyn2336529tAtEmLog_009:57:335
1726939900,0EcMasterDemoSyn1727929tAtEmLog_007:25:255
240702850,0sleep40-21swapper/409:40:134
1451739840,0EcMasterDemoSyn1452729tAtEmLog_007:20:215
2794139830,0EcMasterDemoSyn2795129tAtEmLog_010:17:505
1199539830,0EcMasterDemoSyn1200529tAtEmLog_011:38:585
3116639820,0EcMasterDemoSyn3117629tAtEmLog_011:13:365
2557739820,0EcMasterDemoSyn2558729tAtEmLog_008:51:375
2198539820,0EcMasterDemoSyn2199529tAtEmLog_007:35:345
1962839820,0EcMasterDemoSyn1963829tAtEmLog_007:30:305
2824039810,0EcMasterDemoSyn2825029tAtEmLog_009:42:205
2793239810,0EcMasterDemoSyn2794229tAtEmLog_008:56:425
1847939810,0EcMasterDemoSyn1848929tAtEmLog_008:36:255
1110239800,0EcMasterDemoSyn1111229tAtEmLog_008:21:125
1962839750,0EcMasterDemoSyn0-21swapper/007:30:300
2113539670,0EcMasterDemoSyn2114529tAtEmLog_011:49:055
1295239670,0EcMasterDemoSyn0-21swapper/411:03:294
35002300,0sleep30-21swapper/312:27:493
30302210,0sleep40-21swapper/412:09:594
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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