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2026-06-17 - 20:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Wed Jun 17, 2026 12:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
8485391270,1EcMasterDemoSyn50-21ksoftirqd/312:39:303
2984839930,0EcMasterDemoSyn2985829tAtEmLog_010:27:395
2073139910,0EcMasterDemoSyn2074129tAtEmLog_010:22:355
3037739840,0EcMasterDemoSyn3038729tAtEmLog_008:25:575
2613839840,0EcMasterDemoSyn2614929tAtEmLog_009:31:525
2271939830,0EcMasterDemoSyn2272929tAtEmLog_012:29:215
777439820,0EcMasterDemoSyn778629tAtEmLog_009:21:435
541939820,0EcMasterDemoSyn542929tAtEmLog_008:41:095
40212820,1sleep30-21swapper/310:30:393
2327339820,0EcMasterDemoSyn2328329tAtEmLog_008:10:445
227639820,0EcMasterDemoSyn228829tAtEmLog_010:47:565
2132839820,0EcMasterDemoSyn2133829tAtEmLog_009:47:055
778339810,0EcMasterDemoSyn779329tAtEmLog_008:46:145
3163739810,0EcMasterDemoSyn3164729tAtEmLog_007:25:055
1955939810,0EcMasterDemoSyn1956929tAtEmLog_011:33:345
1695639810,0EcMasterDemoSyn1696629tAtEmLog_009:26:485
1649139810,0EcMasterDemoSyn1650129tAtEmLog_010:02:175
303939800,0EcMasterDemoSyn304929tAtEmLog_008:36:065
1047239330,1EcMasterDemoSyn10478-21ps07:45:231
1047239330,1EcMasterDemoSyn10478-21ps07:45:221
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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