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2026-07-22 - 20:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Wed Jul 22, 2026 12:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10125391790,0EcMasterDemoSyn0-21swapper/308:44:333
1250139830,0EcMasterDemoSyn1251129tAtEmLog_009:40:195
2832539820,0EcMasterDemoSyn2833529tAtEmLog_008:14:075
2330939820,0EcMasterDemoSyn2331929tAtEmLog_008:03:595
1857439820,0EcMasterDemoSyn1858429tAtEmLog_007:53:505
148439820,0EcMasterDemoSyn149429tAtEmLog_007:18:225
1350739820,0EcMasterDemoSyn1351729tAtEmLog_007:43:435
387039810,0EcMasterDemoSyn388029tAtEmLog_007:23:255
3108839810,0EcMasterDemoSyn3109829tAtEmLog_009:14:585
1755139810,0EcMasterDemoSyn1756129tAtEmLog_008:59:465
54012580,1sleep25400-21ssh09:36:112
98382270,0sleep40-21swapper/411:46:424
2940999190,15cyclictest3423-21/usr/sbin/munin08:30:164
2940999190,15cyclictest3423-21/usr/sbin/munin08:30:164
29405991810,6cyclictest12762-21tail11:30:153
2939199180,9cyclictest780-21runrttasks12:13:170
2939199180,15cyclictest10448-21sh09:57:400
2939199180,14cyclictest7893-21sh09:38:010
2939199180,14cyclictest15703-21sh12:26:580
2939199180,10cyclictest29669-21sh12:16:200
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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