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2026-01-15 - 20:56
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Thu Jan 15, 2026 12:44:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
17106391670,0EcMasterDemoSyn17113-21grep09:51:170
29570391180,1EcMasterDemoSyn29577-21runintdemo5min10:52:080
12970391090,0EcMasterDemoSyn1298029tAtEmLog_008:20:015
181921040,0sleep30-21swapper/310:55:123
2028121020,0sleep50-21swapper/512:16:185
497539940,0EcMasterDemoSyn498529tAtEmLog_012:08:125
344639910,0EcMasterDemoSyn345629tAtEmLog_009:25:555
1636939830,0EcMasterDemoSyn1637929tAtEmLog_007:19:105
299039820,0EcMasterDemoSyn299929tAtEmLog_010:01:265
1018439820,0EcMasterDemoSyn1019429tAtEmLog_011:52:585
892139810,0EcMasterDemoSyn893129tAtEmLog_012:28:295
629139810,0EcMasterDemoSyn630129tAtEmLog_010:57:115
427439810,0EcMasterDemoSyn428429tAtEmLog_009:05:395
304239810,0EcMasterDemoSyn305229tAtEmLog_007:59:445
2624939810,0EcMasterDemoSyn2625929tAtEmLog_009:56:215
1635239810,0EcMasterDemoSyn1636229tAtEmLog_010:26:475
794739320,0EcMasterDemoSyn0-21swapper/109:46:121
124382300,3sleep50-21swapper/509:13:485
1408939250,1EcMasterDemoSyn14097-21runintdemo5min12:13:162
204272240,0sleep30-21swapper/311:05:153
2201799180,8tDemoTimingTask22817-21taskset09:36:365
1180799181,13cyclictest16-1pr/legacy10:31:501
1180299186,9cyclictest31187-21sh11:29:150
1180299185,10cyclictest23423-21sshd10:13:020
1180299180,10cyclictest13122-21sh10:07:080
2667229170,15tAtEmLog_027861-21chrt09:21:405
1181399178,7cyclictest17112-21ps09:51:173
1180999170,9cyclictest1209-21ssh10:18:522
1180799179,6cyclictest6408-21grep11:15:131
1180799170,9cyclictest831-21runrttasks10:24:461
1180299171,7cyclictest25344-21sh11:07:540
1180299170,9cyclictest4017-21sh11:14:240
1180299170,14cyclictest831-21runrttasks10:31:400
1180299170,14cyclictest19430-21sed11:04:590
63539160,2EcMasterDemoSyn652-21grep07:54:403
542829160,10tAtEmLog_05433-21taskset08:04:475
3195699160,9tDemoTimingTask31987-21chrt08:55:345
2930099160,9tDemoTimingTask29304-21taskset08:50:275
2347799160,9tDemoTimingTask23846-21taskset07:35:005
1875999160,9tDemoTimingTask18787-21chrt07:24:165
1820629160,6tAtEmLog_020045-21chrt08:32:295
1218099160,9tDemoTimingTask8152-21sleep10:09:555
11813991612,3cyclictest19257-21runintdemo5min11:58:033
1181399160,8cyclictest27358-21sh12:02:263
1181399160,10cyclictest23449-21sh12:35:523
1181399160,10cyclictest10609-21ssh10:05:243
1180999165,8cyclictest30498-21runrttasks07:46:272
1180299168,6cyclictest20080-21wc09:35:150
1180299165,8cyclictest32742-21hddtemp_smartct10:00:150
1180299160,9cyclictest831-21runrttasks08:27:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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