You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-21 - 20:14
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Sun Jun 21, 2026 12:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20789391490,1EcMasterDemoSyn20797-21runintdemo5min08:34:060
19635391470,0EcMasterDemoSyn0-21swapper/410:10:264
9057391140,0EcMasterDemoSyn9066-21runintdemo5min11:16:223
32095391130,0EcMasterDemoSyn0-21swapper/411:11:174
32095391130,0EcMasterDemoSyn0-21swapper/411:11:174
21527391050,0EcMasterDemoSyn0-21swapper/212:17:132
969539980,0EcMasterDemoSyn9704-21runintdemo5min10:40:534
2152739830,0EcMasterDemoSyn2153729tAtEmLog_012:17:125
1463439830,0EcMasterDemoSyn1464429tAtEmLog_010:25:395
64139820,0EcMasterDemoSyn66029tAtEmLog_010:00:195
45139820,0EcMasterDemoSyn46129tAtEmLog_010:35:485
416739820,0EcMasterDemoSyn417729tAtEmLog_007:58:375
2745939820,0EcMasterDemoSyn2746929tAtEmLog_009:40:015
2314739820,0EcMasterDemoSyn2315729tAtEmLog_008:39:115
2078939820,0EcMasterDemoSyn2079929tAtEmLog_008:34:065
1957639820,0EcMasterDemoSyn1958629tAtEmLog_007:23:075
1314539820,0EcMasterDemoSyn1315529tAtEmLog_011:36:385
492139810,0EcMasterDemoSyn493129tAtEmLog_009:09:365
469339810,0EcMasterDemoSyn470429tAtEmLog_010:56:065
403239810,0EcMasterDemoSyn404229tAtEmLog_011:31:355
2552539810,0EcMasterDemoSyn2553529tAtEmLog_008:44:155
2283539810,0EcMasterDemoSyn2284429tAtEmLog_009:19:445
181039810,0EcMasterDemoSyn182029tAtEmLog_007:53:325
987139800,0EcMasterDemoSyn988129tAtEmLog_010:05:225
2293539730,1EcMasterDemoSyn22942-21runintdemo5min11:06:131
301839700,0EcMasterDemoSyn0-21swapper/112:07:041
158892360,1sleep40-21swapper/412:32:054
12676992926,2cyclictest8033-21kworker/4:2+events12:10:254
12676992823,3cyclictest18732-21kworker/4:1+events08:11:574
12667992826,2cyclictest16192-21kworker/2:2+events07:49:432
12663992623,2cyclictest9836-21kworker/1:0+events09:50:411
12676992523,2cyclictest8033-21kworker/4:2+events09:32:134
12676992523,2cyclictest8033-21kworker/4:2+events09:32:134
12672992521,3cyclictest15958-21kworker/3:2+events12:02:183
12667992421,2cyclictest16192-21kworker/2:2+events08:02:332
12676992321,2cyclictest18732-21kworker/4:1+events08:24:574
12676992320,2cyclictest18732-21kworker/4:1+events07:20:314
1265899230,16cyclictest0-21swapper/010:16:050
12676992219,2cyclictest8033-21kworker/4:2+events09:52:264
12667992219,2cyclictest16192-21kworker/2:2+events07:54:472
12658992220,2cyclictest23050irq/32-nvkm08:26:480
12658992217,5cyclictest60250irq/18-enp6s009:21:290
12658992210,8cyclictest31148-21gltestperf10:35:160
12676992116,4cyclictest8033-21kworker/4:2+events11:31:594
1267699210,12cyclictest31905-21rm09:41:594
12663992118,2cyclictest9836-21kworker/1:0+events10:55:511
1265899210,7cyclictest191721sh09:53:020
41122200,1sleep3481rcuc/310:55:413
1267699202,9cyclictest5322-21sh10:20:294
12676992017,2cyclictest18732-21kworker/4:1+events08:57:204
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional