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2026-01-17 - 00:41
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Fri Jan 16, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2637339830,0EcMasterDemoSyn2638329tAtEmLog_007:49:415
688139820,0EcMasterDemoSyn689129tAtEmLog_009:31:075
370939820,0EcMasterDemoSyn372129tAtEmLog_011:53:065
1644139820,0EcMasterDemoSyn1645129tAtEmLog_007:29:265
1102239820,0EcMasterDemoSyn1103229tAtEmLog_008:25:115
3095239810,0EcMasterDemoSyn3096229tAtEmLog_012:08:195
1147739810,0EcMasterDemoSyn1148729tAtEmLog_009:51:235
1082039680,1EcMasterDemoSyn10829-21runintdemo5min11:02:240
103242600,0sleep4581rcuc/412:32:314
2110239380,0EcMasterDemoSyn0-21swapper/112:38:441
308562240,0sleep10-21swapper/111:32:161
1572839230,0EcMasterDemoSyn0-21swapper/510:11:415
708099210,10cyclictest19260-21sh12:01:240
708099184,10cyclictest10565-21sh11:39:250
708099180,15cyclictest14547-21sh11:40:490
708099180,15cyclictest14527-21sh09:17:490
708099180,10cyclictest4685-21sh09:30:140
708099180,10cyclictest4412-21sh12:10:530
708099180,10cyclictest19076-21sh10:49:290
692799180,13tDemoTimingTask7014-21taskset07:09:555
2036999180,8tDemoTimingTask28800-21chrt10:36:345
709799170,10cyclictest831-21runrttasks09:34:014
709799170,10cyclictest11346-21sh11:57:134
708099178,7cyclictest21673-21tail10:15:140
708099175,9cyclictest19588-21sh10:31:260
708099171,7cyclictest1562-21taskset10:04:280
708099170,9cyclictest25153-21sh11:46:440
708099170,9cyclictest18136-21sh12:36:380
708099170,13cyclictest831-21runrttasks08:57:570
708099170,13cyclictest831-21runrttasks08:57:560
288199170,15tDemoTimingTask8101-21taskset12:30:565
1277999170,10tDemoTimingTask12876-21chrt11:58:145
930329160,7tAtEmLog_011505-21taskset07:17:265
847599160,12tDemoTimingTask8479-21taskset08:20:075
709799168,6cyclictest30315-21tail09:05:154
709799165,8cyclictest17366-21basename12:00:204
709399164,8cyclictest9848-21timerwakeupswit09:50:233
709399160,9cyclictest14516-21ssh10:46:173
709399160,12cyclictest455-21fschecks_time09:10:143
709399160,10cyclictest31165-21ssh10:38:123
709399160,10cyclictest13431-21ssh10:28:263
7088991612,3cyclictest31123-21gltestperf10:20:142
708899160,9cyclictest15500-21ssh11:41:292
708599164,9cyclictest4341-21perl08:10:141
708599160,9cyclictest831-21runrttasks08:52:261
708099163,9cyclictest831-21runrttasks11:22:550
708099160,10cyclictest6608-21sh09:13:430
341739160,10EcMasterDemoSyn5754-21chrt08:14:545
2402629160,9tAtEmLog_024076-21taskset07:44:555
2036999160,7tDemoTimingTask22048-21taskset10:33:095
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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