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2025-09-18 - 17:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Thu Sep 18, 2025 12:45:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6697292150,213tAtEmLog_0668539EcMasterDemoSyn12:12:127
22512292020,201tAtEmLog_02250239EcMasterDemoSyn09:19:487
14175291990,198tAtEmLog_01416539EcMasterDemoSyn08:08:497
13610291980,197tAtEmLog_01360039EcMasterDemoSyn09:09:407
20566291920,191tAtEmLog_02055639EcMasterDemoSyn11:41:477
6534291900,189tAtEmLog_0652439EcMasterDemoSyn07:53:367
27531291840,183tAtEmLog_02752139EcMasterDemoSyn08:34:107
6433291800,179tAtEmLog_0642339EcMasterDemoSyn10:15:357
16327291720,171tAtEmLog_01631739EcMasterDemoSyn10:00:227
5008291700,169tAtEmLog_0499839EcMasterDemoSyn11:51:557
16720291700,169tAtEmLog_01671039EcMasterDemoSyn08:13:547
16720291700,169tAtEmLog_01671039EcMasterDemoSyn08:13:547
8589291690,168tAtEmLog_0857939EcMasterDemoSyn12:32:297
5972291600,159tAtEmLog_0596239EcMasterDemoSyn08:54:277
3275391300,0EcMasterDemoSyn0-21swapper/011:26:350
11611291210,120tAtEmLog_01160139EcMasterDemoSyn08:03:457
28503291150,114tAtEmLog_02849339EcMasterDemoSyn07:33:197
6524391110,0EcMasterDemoSyn6533-21runintdemo5min07:48:340
2382339990,0EcMasterDemoSyn2383329tAtEmLog_012:17:187
1522239980,0EcMasterDemoSyn1523229tAtEmLog_010:35:537
642339970,0EcMasterDemoSyn643329tAtEmLog_010:10:307
499839970,0EcMasterDemoSyn500829tAtEmLog_011:46:527
2210939970,0EcMasterDemoSyn2211929tAtEmLog_008:18:597
596239960,0EcMasterDemoSyn597229tAtEmLog_008:49:247
327539960,0EcMasterDemoSyn328129tAtEmLog_011:26:357
2055639950,0EcMasterDemoSyn2056629tAtEmLog_011:36:437
2055639950,0EcMasterDemoSyn2056629tAtEmLog_011:36:437
2752139940,0EcMasterDemoSyn2753129tAtEmLog_008:29:077
1360039920,0EcMasterDemoSyn1361029tAtEmLog_009:04:377
652439910,0EcMasterDemoSyn653429tAtEmLog_007:48:347
384239910,0EcMasterDemoSyn385229tAtEmLog_009:24:547
3160639910,0EcMasterDemoSyn3161629tAtEmLog_010:05:277
857939900,0EcMasterDemoSyn858929tAtEmLog_012:27:267
843839900,0EcMasterDemoSyn844829tAtEmLog_009:50:157
668539900,0EcMasterDemoSyn669729tAtEmLog_012:07:097
336539900,0EcMasterDemoSyn337529tAtEmLog_008:44:207
2181139900,0EcMasterDemoSyn2182129tAtEmLog_010:20:407
2053839900,0EcMasterDemoSyn2054829tAtEmLog_007:13:047
1839139900,0EcMasterDemoSyn1840129tAtEmLog_009:35:017
1160139900,0EcMasterDemoSyn1161129tAtEmLog_007:58:427
1103839900,0EcMasterDemoSyn1104829tAtEmLog_008:59:337
392839890,0EcMasterDemoSyn393829tAtEmLog_007:43:297
3026039890,0EcMasterDemoSyn3027029tAtEmLog_010:25:447
2595139890,0EcMasterDemoSyn2596129tAtEmLog_007:23:127
2565039890,0EcMasterDemoSyn2566029tAtEmLog_009:40:067
2565039890,0EcMasterDemoSyn2566029tAtEmLog_009:40:067
2308439890,0EcMasterDemoSyn2309429tAtEmLog_007:18:087
2198539890,0EcMasterDemoSyn2199529tAtEmLog_011:57:007
1855139890,0EcMasterDemoSyn1856129tAtEmLog_011:16:277
1631739890,0EcMasterDemoSyn1632729tAtEmLog_009:55:197
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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