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2026-02-26 - 09:50
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Thu Feb 26, 2026 00:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2255321530,0sleep50-21swapper/523:50:425
8762391280,0EcMasterDemoSyn0-21swapper/121:55:561
8762391280,0EcMasterDemoSyn0-21swapper/121:55:561
13006391190,3EcMasterDemoSyn13012-21ps20:55:042
248042960,0sleep40-21swapper/422:40:284
3053839920,0EcMasterDemoSyn3054829tAtEmLog_020:24:395
284839830,0EcMasterDemoSyn285929tAtEmLog_020:34:475
2741339820,1EcMasterDemoSyn2742329tAtEmLog_019:08:345
1162839820,0EcMasterDemoSyn1163829tAtEmLog_019:44:055
2816039810,0EcMasterDemoSyn2817029tAtEmLog_020:19:355
2583339810,0EcMasterDemoSyn2584329tAtEmLog_023:17:045
2579239810,0EcMasterDemoSyn2580229tAtEmLog_020:14:295
2432739810,0EcMasterDemoSyn2433729tAtEmLog_000:28:045
1633939810,0EcMasterDemoSyn1634929tAtEmLog_019:54:125
63662310,1sleep10-21swapper/123:42:011
168872240,6sleep132-21ksoftirqd/121:00:241
27628992010,8cyclictest32761-21cron22:10:012
2762899200,7cyclictest2566-21chrt20:31:072
403329190,0tAtEmLog_00-21swapper/521:40:415
2762899193,6cyclictest17211-21fschecks_time19:55:132
2762899190,8cyclictest31109-21sh23:38:102
2762899190,7cyclictest61750cat20:30:012
2762899190,7cyclictest20750-21basename21:10:122
27621991915,3cyclictest17428-21turbostat21:05:000
2762899185,6cyclictest716-21snmpd22:25:202
2762899184,7cyclictest15840-21cut23:30:002
2762899181,13cyclictest16-1pr/legacy21:20:252
2762899181,13cyclictest16-1pr/legacy19:33:542
2762899180,7cyclictest21108-21ssh23:32:282
2762899180,10cyclictest25998-21ssh00:10:242
2762899180,10cyclictest18735-21sh23:13:242
2762199185,9cyclictest8007-21sh21:20:180
2762199180,14cyclictest4999-21sh23:41:020
2762199180,10cyclictest32228-21ssh21:34:150
925999170,10tDemoTimingTask9354-21chrt19:39:555
858399170,7tDemoTimingTask9054-21chrt21:20:445
819299170,7tDemoTimingTask9689-21chrt22:32:265
819299170,7tDemoTimingTask16972-21chrt22:36:165
2763699175,9cyclictest6524-21cut21:55:154
2763699175,9cyclictest6524-21cut21:55:144
2763299171,12cyclictest16-1pr/legacy19:54:123
2762899174,6cyclictest765-21fw_packets19:20:142
2762899174,6cyclictest2573-21cut19:25:122
2762899173,6cyclictest30420-21cpuspeed19:15:112
2762899171,9cyclictest5712-21sh00:00:042
2762899171,9cyclictest19790-21diskmemload23:55:222
2762899171,9cyclictest19790-21diskmemload23:55:222
2762899170,9cyclictest9541-21sh00:20:062
2762899170,9cyclictest17524-21latency_hist21:04:592
2762899170,7cyclictest23753-21ssh23:15:362
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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