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2026-05-03 - 17:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Sun May 03, 2026 12:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15002391290,3EcMasterDemoSyn651irq_work/512:22:275
30685391210,0EcMasterDemoSyn0-21swapper/309:14:493
29284391070,0EcMasterDemoSyn0-21swapper/312:12:173
905339940,0EcMasterDemoSyn906129tAtEmLog_010:30:535
8942930,0sleep10-21swapper/109:33:451
255342900,0sleep50-21swapper/509:29:425
50632840,0sleep40-21swapper/412:35:124
1231339840,0EcMasterDemoSyn1232229tAtEmLog_009:40:115
400839820,0EcMasterDemoSyn401829tAtEmLog_007:23:155
400839820,0EcMasterDemoSyn401829tAtEmLog_007:23:155
2631539820,0EcMasterDemoSyn2632529tAtEmLog_009:30:015
255239820,0EcMasterDemoSyn256229tAtEmLog_008:29:105
1857639820,0EcMasterDemoSyn1858629tAtEmLog_010:00:275
1600039820,0EcMasterDemoSyn1601029tAtEmLog_007:48:365
1466939820,0EcMasterDemoSyn1467929tAtEmLog_008:54:315
1364039820,0EcMasterDemoSyn1365029tAtEmLog_007:43:335
1012339820,0EcMasterDemoSyn1013329tAtEmLog_012:37:405
451839810,0EcMasterDemoSyn452829tAtEmLog_010:10:355
2779139810,0EcMasterDemoSyn2780129tAtEmLog_010:05:325
1940439810,0EcMasterDemoSyn1941429tAtEmLog_009:04:415
1364039300,1EcMasterDemoSyn13647-21grep07:43:322
1225939230,0EcMasterDemoSyn12268-21runintdemo5min11:26:400
1225939230,0EcMasterDemoSyn12268-21runintdemo5min11:26:390
2926299200,7cyclictest1918-21ssh10:27:254
29260992017,2cyclictest29645-21kworker/3:1+events11:16:293
400839180,1EcMasterDemoSyn4014-21ps07:23:162
400839180,1EcMasterDemoSyn4014-21ps07:23:152
2926299184,6cyclictest18845-21aten2_r5power_e07:55:124
2926299181,7cyclictest30353-21latency_hist08:20:014
2926299181,7cyclictest24467-21sh12:27:454
29262991815,2cyclictest11059-21kworker/4:0+events10:30:524
2926299181,12cyclictest16-1pr/legacy10:10:344
29262991810,6cyclictest12008-21tail10:15:154
2926299180,7cyclictest9924-21ssh11:43:464
2926299180,7cyclictest30416-21aten2_r5power_v11:55:144
2926299180,12cyclictest25021-21sh11:15:344
2925299184,10cyclictest12181-21sh12:02:490
2925299180,14cyclictest23535-21sh11:33:160
2925299180,14cyclictest23535-21sh11:33:150
2925299180,10cyclictest9789-21sh09:55:390
2925299180,10cyclictest28127-21sh11:00:020
2925299180,10cyclictest23076-21sh12:26:490
411599170,10tDemoTimingTask4230-21chrt10:46:095
3182699170,10tDemoTimingTask32058-21chrt09:50:235
3023699170,7tDemoTimingTask32410-21chrt08:21:355
2926299179,6cyclictest13237-21runintdemo5min10:51:094
2926299174,6cyclictest21738-21cpuspeed_turbos09:45:124
2926299173,7cyclictest10818-21fschecks_time08:45:164
2926299170,8cyclictest10771-21cut12:20:144
2926299170,7cyclictest28238-21ssh10:41:374
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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