You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-21 - 19:40
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Wed Jan 21, 2026 12:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1209739970,0EcMasterDemoSyn1210829tAtEmLog_010:22:245
2138039920,0EcMasterDemoSyn2139029tAtEmLog_010:27:295
1490439920,0EcMasterDemoSyn1491429tAtEmLog_008:05:305
687939910,0EcMasterDemoSyn688929tAtEmLog_012:08:545
312722910,1sleep20-21swapper/207:35:142
1962739830,0EcMasterDemoSyn1963729tAtEmLog_008:15:395
1791639830,0EcMasterDemoSyn1792629tAtEmLog_011:38:295
1627039830,0EcMasterDemoSyn1628029tAtEmLog_010:42:425
3100539820,0EcMasterDemoSyn3101529tAtEmLog_007:35:055
3070939820,0EcMasterDemoSyn3071929tAtEmLog_010:32:335
1726039820,0EcMasterDemoSyn1727029tAtEmLog_008:10:345
1919339810,0EcMasterDemoSyn1920329tAtEmLog_009:31:435
2481739800,0EcMasterDemoSyn2482729tAtEmLog_012:19:035
245742750,0sleep30-21swapper/309:35:123
3194639380,5EcMasterDemoSyn31953-21grep09:57:044
281012330,0sleep50-21swapper/511:44:225
1209739230,1EcMasterDemoSyn0-21swapper/410:22:254
18641992117,3cyclictest23329-21turbostat07:20:010
1864199180,9cyclictest18739-21sh11:56:510
1864199180,10cyclictest9518-21sh11:51:340
1864199180,10cyclictest8468-21sh12:27:500
1864199180,10cyclictest5567-21sh10:36:240
1864199180,10cyclictest2412-21sh10:53:160
1243699180,8tDemoTimingTask14375-21chrt11:54:595
855229170,7tAtEmLog_014451-21taskset10:05:195
729999170,10tDemoTimingTask7316-21chrt10:37:385
322632170,2sleep30-21swapper/309:20:333
2091029170,10tAtEmLog_021251-21taskset07:15:015
1918929170,15tAtEmLog_024963-21chrt12:37:035
1866099174,9cyclictest744-21snmpd09:41:133
1866099174,9cyclictest17396-21vmstat09:30:263
1864199175,9cyclictest744-21snmpd11:25:120
1864199170,9cyclictest864-21runintdemo5min10:07:120
1864199170,9cyclictest831-21runrttasks09:23:310
1864199170,9cyclictest5857-21sh11:13:220
1864199170,9cyclictest24892-21sh11:42:050
1864199170,9cyclictest24625-21sh10:10:550
1864199170,9cyclictest20880-21sh09:32:520
1864199170,9cyclictest14700-21sh09:29:480
1864199170,14cyclictest22728-21sh11:22:460
1864199170,13cyclictest831-21runrttasks08:19:160
141199170,10tDemoTimingTask2956-21taskset12:25:015
1243699170,7tDemoTimingTask18402-21chrt11:56:365
1034699170,7tDemoTimingTask15540-21chrt12:31:375
2800899160,9tDemoTimingTask28638-21taskset07:30:035
2515629160,14tAtEmLog_0515-21taskset10:51:595
1866499160,9cyclictest30836-21sh11:09:254
1866099164,8cyclictest28602-21packagekitd07:35:073
1864899164,8cyclictest23687-21cut07:20:121
18648991612,3cyclictest1711-21gltestperf09:40:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional