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2026-01-12 - 18:11
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Mon Jan 12, 2026 12:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3116639930,0EcMasterDemoSyn3117629tAtEmLog_007:08:415
502939920,0EcMasterDemoSyn503929tAtEmLog_008:29:485
305792880,1sleep330566-21apt-get12:30:103
2718939860,1EcMasterDemoSyn27194-21runintdemo5min09:45:534
740139840,0EcMasterDemoSyn741129tAtEmLog_011:22:135
740139840,0EcMasterDemoSyn741129tAtEmLog_011:22:135
820739830,0EcMasterDemoSyn821729tAtEmLog_010:46:445
2967439830,0EcMasterDemoSyn2968429tAtEmLog_011:52:395
2730039830,0EcMasterDemoSyn2731029tAtEmLog_010:21:225
2230439830,0EcMasterDemoSyn2231429tAtEmLog_010:36:345
1805539830,0EcMasterDemoSyn1806529tAtEmLog_012:23:045
143039830,0EcMasterDemoSyn144029tAtEmLog_007:13:445
1342939830,0EcMasterDemoSyn1343929tAtEmLog_007:39:065
350239820,0EcMasterDemoSyn351229tAtEmLog_009:15:275
3239539820,0EcMasterDemoSyn3240529tAtEmLog_008:19:405
2452139820,0EcMasterDemoSyn2453129tAtEmLog_012:07:515
1237839820,0EcMasterDemoSyn1238829tAtEmLog_011:07:015
1089439820,0EcMasterDemoSyn1090429tAtEmLog_007:34:025
403839810,0EcMasterDemoSyn404829tAtEmLog_010:26:275
379639810,0EcMasterDemoSyn380629tAtEmLog_007:18:505
236439810,0EcMasterDemoSyn237429tAtEmLog_008:24:455
2329839810,0EcMasterDemoSyn2330829tAtEmLog_009:05:185
1581439810,0EcMasterDemoSyn1582429tAtEmLog_007:44:115
892639210,1EcMasterDemoSyn8933-21grep12:18:001
2730039210,1EcMasterDemoSyn27306-21ps10:21:220
198882210,0sleep20-21swapper/209:42:202
3137399196,9cyclictest5897-21sh10:27:450
3137399180,14cyclictest8183-21sh10:10:440
3137399180,10cyclictest31851-21sh11:54:100
3137399180,10cyclictest10915-21sh11:24:420
3137399180,10cyclictest10915-21sh11:24:420
119299181,10tDemoTimingTask1216-21chrt12:12:575
842739170,0EcMasterDemoSyn0-21swapper/509:35:445
3138599170,10cyclictest26657-21sh10:04:043
3137799170,9cyclictest19853-21rm09:42:181
3137399179,6cyclictest18621-21grep11:10:200
3137399170,9cyclictest27362-21sh12:28:070
3137399170,9cyclictest18844-21grep10:35:120
3137399170,9cyclictest17550-21ssh12:22:450
3137399170,14cyclictest2418-21sh11:01:210
3003529170,10tAtEmLog_030142-21chrt08:15:015
2720099170,10tDemoTimingTask27215-21chrt09:45:535
2565629170,7tAtEmLog_027442-21chrt11:33:375
234629170,10tAtEmLog_05880-21taskset11:39:565
3139099164,9cyclictest744-21snmpd12:13:464
3138599161,12cyclictest16-1pr/legacy11:22:123
3138599161,12cyclictest16-1pr/legacy11:22:113
3138299165,8cyclictest648-21systemd-logind08:05:212
3138299160,9cyclictest9163-21sh11:05:172
3137799164,9cyclictest327-21systemd-journal07:12:371
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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