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2026-02-25 - 20:55
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Wed Feb 25, 2026 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1196739840,0EcMasterDemoSyn1197729tAtEmLog_007:49:065
1600239830,0EcMasterDemoSyn1601229tAtEmLog_011:32:145
349339820,0EcMasterDemoSyn350329tAtEmLog_008:39:495
2356039820,0EcMasterDemoSyn2357029tAtEmLog_010:06:025
2356039820,0EcMasterDemoSyn2357029tAtEmLog_010:06:015
2225739820,0EcMasterDemoSyn2226729tAtEmLog_010:41:305
1877139820,0EcMasterDemoSyn1878129tAtEmLog_012:28:015
2485839810,0EcMasterDemoSyn2486829tAtEmLog_007:08:335
1315739810,0EcMasterDemoSyn1316729tAtEmLog_010:36:275
2141439580,0EcMasterDemoSyn2142429tAtEmLog_008:14:265
55739560,0EcMasterDemoSyn0-21swapper/512:17:525
166542470,45sleep46047-21kworker/u24:1+flush-9:009:44:434
25083992624,2cyclictest26292-21kworker/4:1+events10:41:304
25083992420,3cyclictest16326-21turbostat11:15:004
1210939220,2EcMasterDemoSyn12106-21ssh11:11:573
2631529180,7tAtEmLog_02109-21chrt11:06:155
2506699181,13cyclictest780-21runrttasks07:55:590
2506699180,9cyclictest28024-21sh10:26:470
2506699180,9cyclictest16436-21sh09:44:320
2506699180,10cyclictest6528-21sh11:09:230
912399170,7tDemoTimingTask10756-21chrt10:17:185
811829170,15tAtEmLog_09348-21chrt10:52:315
624899170,10tDemoTimingTask6363-21taskset09:55:565
2918899170,7tDemoTimingTask30634-21chrt11:58:365
2918899170,7tDemoTimingTask2025-21chrt12:00:195
2508399171,12cyclictest16-1pr/legacy08:44:524
2508399170,9cyclictest6761-21taskset09:20:374
2507899174,9cyclictest3497-21sed08:44:513
2507399179,6cyclictest1795-21grep10:30:172
2507399175,9cyclictest2693-21vmstat12:00:252
2506699170,9cyclictest27614-21sh11:02:420
2506699170,9cyclictest26856-21sh12:32:240
2506699170,14cyclictest4675-21sh12:38:220
2506699170,13cyclictest7287-21sh10:51:060
1820829170,7tAtEmLog_020777-21chrt10:23:025
165229170,7tAtEmLog_04899-21chrt11:44:405
1566929170,7tAtEmLog_017967-21chrt09:27:035
2508399160,9cyclictest780-21runrttasks11:38:074
2507899163,9cyclictest6657-21perl10:15:153
2507899161,7cyclictest1678750latency_hist08:00:013
25078991612,3cyclictest23332-21sh11:55:003
2507399165,8cyclictest326-21systemd-journal10:28:192
2507399160,10cyclictest13442-21grep10:00:142
2506699167,6cyclictest151ktimers/012:28:560
2506699162,7cyclictest14-21ksoftirqd/011:35:110
2506699160,9cyclictest780-21runrttasks07:31:070
2506699160,9cyclictest21889-21idleruntime-cro11:00:000
2506699160,13cyclictest3246-21sh12:19:440
2506699160,11cyclictest25949-21ssh12:14:110
1212099160,7tDemoTimingTask16332-21sleep11:15:005
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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