You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-09 - 05:14
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot1.osadl.org (updated Mon Feb 09, 2026 00:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3043539910,0EcMasterDemoSyn3044529tAtEmLog_000:04:595
924039830,0EcMasterDemoSyn925029tAtEmLog_021:12:355
468439820,0EcMasterDemoSyn469429tAtEmLog_020:01:345
353339820,0EcMasterDemoSyn354329tAtEmLog_023:14:175
3102939820,0EcMasterDemoSyn3103929tAtEmLog_020:57:215
294739820,0EcMasterDemoSyn295729tAtEmLog_023:49:465
294739820,0EcMasterDemoSyn295729tAtEmLog_023:49:465
1922239820,0EcMasterDemoSyn1923229tAtEmLog_020:32:015
1829739820,0EcMasterDemoSyn1830729tAtEmLog_022:28:385
1768539820,0EcMasterDemoSyn1769529tAtEmLog_023:04:085
796039810,0EcMasterDemoSyn797029tAtEmLog_023:34:345
440139810,0EcMasterDemoSyn441129tAtEmLog_022:03:175
3235539810,0EcMasterDemoSyn3236529tAtEmLog_019:51:265
275539810,0EcMasterDemoSyn276629tAtEmLog_000:25:165
2526339810,0EcMasterDemoSyn2527329tAtEmLog_019:36:145
2218039810,0EcMasterDemoSyn2219029tAtEmLog_023:24:255
248022600,0sleep224801-21ssh23:43:402
248022600,0sleep224801-21ssh23:43:402
219772330,0sleep00-21swapper/022:30:180
2867439240,1EcMasterDemoSyn28682-21runintdemo5min20:52:184
421329190,0tAtEmLog_00-21swapper/522:43:505
2527499180,8tDemoTimingTask27604-21chrt19:40:585
1083999181,13cyclictest16-1pr/legacy21:22:423
1083999181,13cyclictest16-1pr/legacy00:25:153
1083199185,6cyclictest326-21systemd-journal22:31:421
1083199181,10cyclictest20973-21sendmail_mailst20:35:181
1083199180,8cyclictest10452-21runrttasks00:11:021
1083199180,7cyclictest3202650latency_hist23:30:001
1083199180,7cyclictest26905-21ssh00:02:291
1083199180,7cyclictest19055-21sh00:15:451
1083199180,11cyclictest15985-21/usr/sbin/munin22:10:011
1083199180,10cyclictest30489-21sh23:10:251
1083199180,10cyclictest23874-21sh22:14:091
1083199180,10cyclictest15743-21sh23:56:041
1083199180,10cyclictest14435-21sh21:33:121
1082799180,10cyclictest19874-21sh22:47:020
1082799180,10cyclictest19828-21sh23:58:560
10843991713,3cyclictest21386-21install00:00:004
1084399171,11cyclictest16-1pr/legacy19:36:134
1083199177,2cyclictest0-21swapper/119:25:151
1083199174,6cyclictest1998-21cut22:55:161
1083199174,6cyclictest18823-21cat20:30:231
1083199174,5cyclictest11720-21processes23:00:191
1083199173,6cyclictest6955-21seq20:05:401
1083199171,9cyclictest27935-21taskset19:44:491
1083199171,9cyclictest13090-21sh21:15:001
1083199171,8cyclictest16-1pr/legacy20:16:471
1083199170,9cyclictest9957-21idleruntime23:35:151
1083199170,9cyclictest9061-21sh21:12:281
1083199170,9cyclictest13604-21sh00:30:441
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional