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2026-03-25 - 22:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Wed Mar 25, 2026 12:57:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
457599789532,254cyclictest0-21swapper/711:52:517
45699978161,84cyclictest0-21swapper/110:21:171
45699970163,465cyclictest0-21swapper/112:38:171
45699969216,473cyclictest0-21swapper/110:08:241
45739966531,383cyclictest0-21swapper/509:47:085
45699966368,592cyclictest0-21swapper/109:58:361
456999662110,380cyclictest0-21swapper/111:36:031
45689965822,83cyclictest29604-21runrttasks12:38:000
45699965623,2cyclictest0-21swapper/109:29:571
45759965117,2cyclictest0-21swapper/709:47:077
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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