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2026-04-25 - 04:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sat Apr 25, 2026 00:53:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19001997642,211cyclictest0-21swapper/721:30:027
189969968084,127cyclictest121rcu_preempt22:56:582
190019967536,550cyclictest121rcu_preempt21:55:047
189979964143,296cyclictest0-21swapper/321:54:233
1899599621583,36cyclictest231rcuc/122:34:091
190009959482,296cyclictest0-21swapper/623:29:206
18999995940,84cyclictest0-21swapper/522:33:445
18998995940,84cyclictest64450irq/122-eth022:33:444
189979959339,339cyclictest41-21ksoftirqd/323:39:253
189979959339,339cyclictest41-21ksoftirqd/323:39:253
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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