You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-08 - 15:43
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sat Aug 08, 2026 12:56:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
182809979269,508cyclictest0-21swapper/311:11:433
182809979269,508cyclictest0-21swapper/311:11:433
18280997680,42cyclictest0-21swapper/311:31:253
182809971639,593cyclictest0-21swapper/311:27:353
1827699708197,296cyclictest0-21swapper/011:45:010
1827699669118,211cyclictest0-21swapper/012:11:130
182849966831,634cyclictest0-21swapper/607:48:526
182849966831,634cyclictest0-21swapper/607:48:526
1827799659617,40cyclictest241ktimersoftd/109:18:131
182839964916,126cyclictest0-21swapper/509:34:535
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional