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2026-06-20 - 06:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sat Jun 20, 2026 00:57:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22016998041,510cyclictest0-21swapper/023:27:220
22017997951,3cyclictest0-21swapper/123:27:221
22018997676,2cyclictest0-21swapper/223:27:222
2201799746111,168cyclictest0-21swapper/100:17:401
2201699719125,591cyclictest9335-1kworker/u17:000:20:020
220209970627,84cyclictest0-21swapper/400:37:104
220239970568,634cyclictest0-21swapper/700:17:307
220169970425,676cyclictest0-21swapper/022:36:440
220219969115,340cyclictest24173-21ssh23:27:225
22021996869,126cyclictest0-21swapper/521:53:575
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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