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2026-04-24 - 03:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Fri Apr 24, 2026 00:58:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
66559975172,676cyclictest0-21swapper/422:04:014
66559971636,677cyclictest0-21swapper/419:23:364
6654996428,2cyclictest0-21swapper/322:14:053
665199636124,380cyclictest0-21swapper/022:00:230
6652996351,2cyclictest3343-21ssh22:14:051
665599632122,380cyclictest0-21swapper/422:16:544
665799630246,295cyclictest0-21swapper/621:57:056
665799630246,295cyclictest0-21swapper/621:57:056
665799630246,295cyclictest0-21swapper/621:57:056
665799630246,295cyclictest0-21swapper/621:57:056
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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