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2026-03-29 - 09:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sun Mar 29, 2026 00:57:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
93879990415,126cyclictest0-21swapper/221:59:082
93879986112,846cyclictest0-21swapper/223:18:082
9392997221,126cyclictest0-21swapper/700:23:037
9388997201,84cyclictest0-21swapper/321:29:143
93879969864,550cyclictest0-21swapper/223:58:572
93879967335,550cyclictest0-21swapper/222:30:272
93919966266,381cyclictest0-21swapper/621:41:446
93889965217,126cyclictest14881-21sh21:41:443
93859964449,380cyclictest0-21swapper/000:34:030
9389996408,416cyclictest0-21swapper/422:29:144
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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