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2026-05-03 - 11:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sun May 03, 2026 00:57:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1021299833113,380cyclictest0-21swapper/623:21:106
102119970365,635cyclictest0-21swapper/522:24:295
102119969313,677cyclictest0-21swapper/523:13:355
10211996801,676cyclictest0-21swapper/521:52:445
101969967340,2cyclictest23804-21chrt22:43:030
102009966126,296cyclictest31191-21kworker/u16:222:16:481
102139965116,3cyclictest1651-21ntpd22:43:037
102109965017,2cyclictest0-21swapper/423:44:234
1021399646304,339cyclictest28990-1kworker/u17:122:23:127
10213996384,383cyclictest0-21swapper/723:44:237
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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