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2026-04-26 - 05:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sun Apr 26, 2026 00:57:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
44679985910,846cyclictest0-21swapper/722:35:187
4464996770,84cyclictest0-21swapper/422:52:304
44679967478,381cyclictest0-21swapper/722:19:487
44679967436,635cyclictest0-21swapper/723:08:237
44649966775,168cyclictest0-21swapper/423:05:354
44679966266,593cyclictest0-21swapper/722:52:127
44679965319,2cyclictest0-21swapper/723:03:587
4461996416,127cyclictest0-21swapper/100:08:441
446599629290,85cyclictest10459-21kworker/u16:222:53:025
44609962328,338cyclictest0-21swapper/022:33:280
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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