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2026-08-22 - 16:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sat Aug 22, 2026 12:55:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
63899710114,380cyclictest0-21swapper/109:36:201
6389964912,634cyclictest0-21swapper/110:59:421
6389964912,634cyclictest0-21swapper/110:59:421
6479964490,254cyclictest0-21swapper/710:39:327
6479964490,254cyclictest0-21swapper/710:39:327
64099634208,296cyclictest0-21swapper/211:35:152
6439963180,169cyclictest0-21swapper/409:27:354
6379962332,380cyclictest0-21swapper/009:43:030
6459961869,84cyclictest0-21swapper/511:00:005
6459961869,84cyclictest0-21swapper/511:00:005
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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