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2026-06-01 - 00:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sun May 31, 2026 12:53:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22710997661,762cyclictest0-21swapper/311:22:403
22710997661,762cyclictest0-21swapper/311:22:403
2271199670373,295cyclictest64450irq/122-eth011:33:294
2271199663280,253cyclictest13104-21sh11:51:164
227119963439,592cyclictest0-21swapper/411:43:434
227119963379,423cyclictest22705-21cyclictest09:14:304
227109962628,85cyclictest0-21swapper/309:14:513
227099961865,343cyclictest0-21swapper/209:15:232
227109961721,593cyclictest0-21swapper/311:42:553
2270999617150,295cyclictest0-21swapper/211:51:292
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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