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2026-05-16 - 17:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sat May 16, 2026 12:54:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1321299714119,84cyclictest25534-21taskset07:28:230
13218996790,84cyclictest0-21swapper/610:39:336
132159967478,381cyclictest0-21swapper/311:58:213
132159967478,381cyclictest0-21swapper/311:58:213
1321899631123,505cyclictest21337-21ssh09:58:416
132189962977,380cyclictest13210-21cyclictest10:48:366
132149961322,338cyclictest0-21swapper/209:38:172
1321999611101,508cyclictest0-21swapper/710:23:007
132189961019,383cyclictest0-21swapper/607:48:136
132159961099,296cyclictest0-21swapper/309:58:533
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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