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2026-06-10 - 08:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Wed Jun 10, 2026 00:55:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
129139976442,719cyclictest0-21swapper/721:30:007
129139971980,84cyclictest0-21swapper/721:58:327
129139971980,84cyclictest0-21swapper/721:58:327
129139966026,598cyclictest0-21swapper/722:24:087
129139966026,598cyclictest0-21swapper/722:24:087
129139966026,598cyclictest0-21swapper/722:24:077
129139966026,598cyclictest0-21swapper/722:24:077
12913996402,42cyclictest0-21swapper/721:48:507
1291399617364,41cyclictest0-21swapper/721:23:247
129079960812,381cyclictest0-21swapper/121:29:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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