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2026-05-13 - 01:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Tue May 12, 2026 12:56:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
251559974422,719cyclictest0-21swapper/212:17:572
251559967783,84cyclictest0-21swapper/212:10:302
2516099663108,381cyclictest0-21swapper/711:58:537
25160996370,211cyclictest0-21swapper/712:08:177
251559963438,423cyclictest0-21swapper/209:33:382
251559962730,127cyclictest0-21swapper/209:58:322
251559962332,513cyclictest0-21swapper/211:07:262
251559962129,508cyclictest0-21swapper/209:48:492
251539962029,84cyclictest0-21swapper/011:58:370
251559961927,338cyclictest0-21swapper/212:32:542
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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