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2026-04-06 - 00:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sun Apr 05, 2026 12:55:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28409972084,83cyclictest0-21swapper/511:53:135
283699671123,337cyclictest0-21swapper/110:50:001
283899664625,3cyclictest391rcuc/312:24:593
28429962875,380cyclictest0-21swapper/711:39:297
2835996019,383cyclictest0-21swapper/009:53:520
2841995987,126cyclictest0-21swapper/612:04:526
2842995940,84cyclictest0-21swapper/709:54:167
2839995920,84cyclictest64450irq/122-eth010:13:294
283999589168,2cyclictest64450irq/122-eth012:01:484
284099586116,127cyclictest57-21ksoftirqd/511:56:175
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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