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2026-04-21 - 02:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Tue Apr 21, 2026 00:51:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1331899695184,211cyclictest0-21swapper/222:36:582
1331799633208,126cyclictest121rcu_preempt21:05:161
133229960896,508cyclictest0-21swapper/521:05:185
133219955040,507cyclictest0-21swapper/400:31:164
133219954130,508cyclictest0-21swapper/420:43:374
133219954130,508cyclictest0-21swapper/420:43:374
133219954130,508cyclictest0-21swapper/400:18:014
133209952614,296cyclictest0-21swapper/300:30:493
13321995132,168cyclictest21411-21ssh00:10:304
13324995103,256cyclictest0-21swapper/700:37:167
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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