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2026-05-11 - 00:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sun May 10, 2026 12:56:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
25532997630,126cyclictest31846-21ssh09:25:090
2553299668115,338cyclictest121rcu_preempt09:05:220
255359965924,383cyclictest0-21swapper/307:44:323
255369965623,382cyclictest0-21swapper/407:44:324
2553999625115,508cyclictest0-21swapper/711:23:587
255389961360,550cyclictest0-21swapper/611:03:496
255389961322,382cyclictest0-21swapper/607:44:326
255359960652,381cyclictest0-21swapper/311:43:003
2553499594125,346cyclictest1553-21runrttasks12:22:472
25534995940,85cyclictest0-21swapper/211:53:332
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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