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2026-04-30 - 06:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Wed Apr 29, 2026 12:55:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
159999756121,126cyclictest0-21swapper/312:19:063
15989975475,676cyclictest0-21swapper/210:29:102
159899750113,84cyclictest0-21swapper/212:21:532
15989973513,719cyclictest0-21swapper/210:01:122
15989973454,677cyclictest0-21swapper/211:44:032
1598997319,42cyclictest0-21swapper/212:07:162
15989970466,635cyclictest0-21swapper/211:53:022
15989970466,635cyclictest0-21swapper/211:53:022
15979969314,296cyclictest0-21swapper/111:51:351
15979969314,296cyclictest0-21swapper/111:51:351
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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