You are here: Home / Projects / QA Farm Realtime / Latency plots / 
2020-12-05 - 08:51
[ 43.105] (II) VESA: driver for VESA chipsets: vesa

Intel(R) Xeon(R) CPU E3-1578L v5 @ 2.00GHz, Linux 4.19.1-rt3 (Profile)

Latency plot of system in rack #5, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot3.osadl.org (updated Sat Dec 05, 2020 00:49:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15378994141,0cyclictest0-21swapper/420:00:094
1536699400,1cyclictest5891-21cut20:50:093
15388993910,28cyclictest0-21swapper/520:55:155
15366993938,0cyclictest0-21swapper/321:00:033
15388993810,27cyclictest0-21swapper/520:05:025
15388993810,24cyclictest0-21swapper/520:20:005
1538899380,37cyclictest0-21swapper/500:10:115
15400993736,1cyclictest0-21swapper/619:40:086
15388993711,23cyclictest0-21swapper/519:25:015
15366993636,0cyclictest0-21swapper/319:20:083
15400993534,0cyclictest0-21swapper/621:50:026
1540099350,34cyclictest0-21swapper/619:50:096
15388993433,1cyclictest0-21swapper/520:30:035
15388993310,3cyclictest0-21swapper/519:45:005
15388993310,19cyclictest0-21swapper/521:48:295
15411993230,1cyclictest0-21swapper/721:50:037
15388993232,0cyclictest0-21swapper/521:55:115
15411993131,0cyclictest0-21swapper/719:40:087
15388993111,18cyclictest0-21swapper/519:55:015
15388993010,13cyclictest0-21swapper/521:00:125
15411992929,0cyclictest0-21swapper/719:50:087
15388992810,18cyclictest0-21swapper/519:40:025
15400992725,1cyclictest0-21swapper/619:20:026
15388992710,3cyclictest0-21swapper/520:25:155
15378992727,0cyclictest0-21swapper/400:35:234
15297992710,3cyclictest0-21swapper/020:55:150
1538899262,2cyclictest0-21swapper/521:05:035
15388992610,16cyclictest0-21swapper/520:20:165
15388992610,15cyclictest0-21swapper/520:50:145
15388992610,15cyclictest0-21swapper/519:20:015
15378992612,2cyclictest0-21swapper/419:40:034
15297992626,0cyclictest0-21swapper/019:30:090
15388992510,9cyclictest0-21swapper/519:55:135
15378992525,0cyclictest0-21swapper/421:01:034
15388992410,5cyclictest0-21swapper/500:05:035
15388992410,3cyclictest0-21swapper/500:38:285
15388992410,2cyclictest0-21swapper/500:33:055
15388992310,11cyclictest0-21swapper/500:21:395
15378992323,0cyclictest0-21swapper/400:24:504
15349992321,1cyclictest0-21swapper/221:50:022
15297992322,0cyclictest0-21swapper/020:00:030
1529799230,9cyclictest0-21swapper/019:25:030
15411992220,1cyclictest0-21swapper/719:20:027
15388992210,7cyclictest0-21swapper/520:00:155
15388992210,4cyclictest0-21swapper/522:05:155
15388992210,11cyclictest0-21swapper/500:27:075
15388992210,10cyclictest0-21swapper/522:21:095
15378992210,6cyclictest0-21swapper/400:18:054
15366992210,4cyclictest0-21swapper/319:50:133
15349992222,0cyclictest0-21swapper/219:40:082
15316992222,0cyclictest0-21swapper/120:25:091
15411992110,7cyclictest0-21swapper/721:46:367
15400992119,1cyclictest0-21swapper/620:20:156
15400992119,1cyclictest0-21swapper/619:15:056
15388992110,9cyclictest0-21swapper/522:56:435
15388992110,9cyclictest0-21swapper/522:53:205
15388992110,9cyclictest0-21swapper/521:54:175
15388992110,9cyclictest0-21swapper/521:24:125
15388992110,8cyclictest0-21swapper/522:25:385
15388992110,8cyclictest0-21swapper/521:31:135
15388992110,7cyclictest0-21swapper/521:40:145
15349992121,0cyclictest0-21swapper/219:50:092
15411992013,4cyclictest9954-21/usr/sbin/munin21:00:137
15388992010,8cyclictest22028-21ssh21:13:235
15388992010,8cyclictest0-21swapper/523:55:575
15388992010,8cyclictest0-21swapper/523:52:535
15388992010,8cyclictest0-21swapper/523:46:135
15388992010,8cyclictest0-21swapper/523:40:255
15388992010,8cyclictest0-21swapper/523:35:185
15388992010,8cyclictest0-21swapper/523:31:265
15388992010,8cyclictest0-21swapper/523:25:545
15388992010,8cyclictest0-21swapper/523:20:115
15388992010,8cyclictest0-21swapper/523:11:345
15388992010,8cyclictest0-21swapper/523:00:415
15388992010,8cyclictest0-21swapper/522:47:385
15388992010,8cyclictest0-21swapper/522:37:245
15388992010,8cyclictest0-21swapper/522:15:375
15388992010,8cyclictest0-21swapper/522:10:305
15388992010,8cyclictest0-21swapper/522:02:355
15388992010,8cyclictest0-21swapper/521:37:005
15388992010,8cyclictest0-21swapper/521:28:345
15388992010,8cyclictest0-21swapper/521:15:415
15388992010,8cyclictest0-21swapper/520:40:145
15388992010,8cyclictest0-21swapper/519:25:005
15388992010,7cyclictest0-21swapper/523:17:145
15388992010,7cyclictest0-21swapper/523:06:005
15388992010,7cyclictest0-21swapper/522:40:065
15388992010,7cyclictest0-21swapper/500:15:435
15388992010,7cyclictest0-21swapper/500:00:035
15316992010,5cyclictest0-21swapper/119:15:041
15316992010,4cyclictest0-21swapper/121:00:041
1540099194,5cyclictest0-21swapper/620:58:516
15400991910,0cyclictest0-21swapper/621:47:056
15388991910,8cyclictest0-21swapper/519:30:485
15388991910,7cyclictest0-21swapper/522:30:175
15388991910,7cyclictest0-21swapper/520:45:135
15388991910,7cyclictest0-21swapper/520:10:105
15388991910,7cyclictest0-21swapper/519:45:575
15388991910,5cyclictest29220-21cstates20:35:045
15378991910,5cyclictest0-21swapper/421:46:324
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional